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2 mjames 1
/**
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  ******************************************************************************
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  * @file    stm32f0xx.h
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  * @author  MCD Application Team
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  * @brief   CMSIS STM32F0xx Device Peripheral Access Layer Header File.          
6
  *            
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  *          The file is the unique include file that the application programmer
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  *          is using in the C source code, usually in main.c. This file contains:
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  *           - Configuration section that allows to select:
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  *              - The STM32F0xx device used in the target application
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  *              - To use or not the peripheral’s drivers in application code(i.e.
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  *                code will be based on direct access to peripheral’s registers
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  *                rather than drivers API), this option is controlled by
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  *                "#define USE_HAL_DRIVER"
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  *  
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  ******************************************************************************
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  * @attention
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  *
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  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
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  * All rights reserved.</center></h2>
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  *
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  * This software component is licensed by ST under BSD 3-Clause license,
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  * the "License"; You may not use this file except in compliance with the
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  * License. You may obtain a copy of the License at:
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  *                        opensource.org/licenses/BSD-3-Clause
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  *
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  ******************************************************************************
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  */
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/** @addtogroup CMSIS
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  * @{
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  */
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/** @addtogroup stm32f0xx
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  * @{
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  */
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#ifndef __STM32F0xx_H
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#define __STM32F0xx_H
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#ifdef __cplusplus
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 extern "C" {
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#endif /* __cplusplus */
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/** @addtogroup Library_configuration_section
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  * @{
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  */
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/**
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  * @brief STM32 Family
51
  */
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#if !defined  (STM32F0)
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#define STM32F0
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#endif /* STM32F0 */
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/** Uncomment the line below according to the target STM32 device used in your application.
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  * stm32f0xxxx.h file contains:
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  * - All the peripheral register's definitions, bits definitions and memory mapping for STM32F0xxxx devices
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  * - IRQ channel definition
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  * - Peripheral memory mapping and physical registers address definition
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  * - Peripheral pointer declaration and driver header file inclusion
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  * - Product miscellaneous configuration: assert macros…
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  * Note: These CMSIS drivers (stm32f0xxxx.h) are always supporting features of the sub-family’s superset.
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  */
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#if !defined (STM32F030x6) && !defined (STM32F030x8) &&                           \
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    !defined (STM32F031x6) && !defined (STM32F038xx) &&                           \
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    !defined (STM32F042x6) && !defined (STM32F048xx) && !defined (STM32F070x6) && \
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    !defined (STM32F051x8) && !defined (STM32F058xx) &&                           \
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    !defined (STM32F071xB) && !defined (STM32F072xB) && !defined (STM32F078xx) && !defined (STM32F070xB) && \
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    !defined (STM32F091xC) && !defined (STM32F098xx) && !defined (STM32F030xC)
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  /* #define STM32F030x6 */  /*!< STM32F030x4, STM32F030x6 Devices (STM32F030xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
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  /* #define STM32F030x8 */  /*!< STM32F030x8 Devices (STM32F030xx microcontrollers where the Flash memory is 64 Kbytes)                                              */
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  /* #define STM32F031x6 */  /*!< STM32F031x4, STM32F031x6 Devices (STM32F031xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
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  /* #define STM32F038xx */  /*!< STM32F038xx Devices (STM32F038xx microcontrollers where the Flash memory is 32 Kbytes)                                              */
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  /* #define STM32F042x6 */  /*!< STM32F042x4, STM32F042x6 Devices (STM32F042xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)              */
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  /* #define STM32F048xx */  /*!< STM32F048xx Devices (STM32F048xx microcontrollers where the Flash memory is 32 Kbytes)                                              */
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  /* #define STM32F051x8 */  /*!< STM32F051x4, STM32F051x6, STM32F051x8 Devices (STM32F051xx microcontrollers where the Flash memory ranges between 16 and 64 Kbytes) */
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  /* #define STM32F058xx */  /*!< STM32F058xx Devices (STM32F058xx microcontrollers where the Flash memory is 64 Kbytes)                                              */
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  /* #define STM32F070x6 */  /*!< STM32F070x6 Devices (STM32F070x6 microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)                           */
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  /* #define STM32F070xB */  /*!< STM32F070xB Devices (STM32F070xB microcontrollers where the Flash memory ranges between 64 and 128 Kbytes)                          */
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  /* #define STM32F071xB */  /*!< STM32F071x8, STM32F071xB Devices (STM32F071xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes)             */
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  /* #define STM32F072xB */  /*!< STM32F072x8, STM32F072xB Devices (STM32F072xx microcontrollers where the Flash memory ranges between 64 and 128 Kbytes)             */
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  /* #define STM32F078xx */  /*!< STM32F078xx Devices (STM32F078xx microcontrollers where the Flash memory is 128 Kbytes)                                             */
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  /* #define STM32F030xC */  /*!< STM32F030xC Devices (STM32F030xC microcontrollers where the Flash memory is 256 Kbytes)                                             */  
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  /* #define STM32F091xC */  /*!< STM32F091xB, STM32F091xC Devices (STM32F091xx microcontrollers where the Flash memory ranges between 128 and 256 Kbytes)            */
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  /* #define STM32F098xx */  /*!< STM32F098xx Devices (STM32F098xx microcontrollers where the Flash memory is 256 Kbytes)                                             */
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#endif
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/* Legacy aliases */
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#if defined (STM32F048x6)
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 #define STM32F048xx 
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#endif /* STM32F048x6 */
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/*  Tip: To avoid modifying this file each time you need to switch between these
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        devices, you can define the device in your toolchain compiler preprocessor.
96
  */
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#if !defined  (USE_HAL_DRIVER)
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/**
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 * @brief Comment the line below if you will not use the peripherals drivers.
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   In this case, these drivers will not be included and the application code will
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   be based on direct access to peripherals registers
102
   */
103
  /*#define USE_HAL_DRIVER */
104
#endif /* USE_HAL_DRIVER */
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106
/**
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  * @brief CMSIS Device version number V2.3.6
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  */
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#define __STM32F0_DEVICE_VERSION_MAIN   (0x02) /*!< [31:24] main version */
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#define __STM32F0_DEVICE_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
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#define __STM32F0_DEVICE_VERSION_SUB2   (0x06) /*!< [15:8]  sub2 version */
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#define __STM32F0_DEVICE_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
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#define __STM32F0_DEVICE_VERSION        ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
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                                        |(__STM32F0_DEVICE_VERSION_SUB1 << 16)\
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                                        |(__STM32F0_DEVICE_VERSION_SUB2 << 8 )\
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                                        |(__STM32F0_DEVICE_VERSION_RC))
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118
/**
119
  * @}
120
  */
121
 
122
/** @addtogroup Device_Included
123
  * @{
124
  */
125
 
126
#if defined(STM32F030x6)
127
  #include "stm32f030x6.h"
128
#elif defined(STM32F030x8)
129
  #include "stm32f030x8.h"
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#elif defined(STM32F031x6)
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  #include "stm32f031x6.h"
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#elif defined(STM32F038xx)
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  #include "stm32f038xx.h"
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#elif defined(STM32F042x6)
135
  #include "stm32f042x6.h"
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#elif defined(STM32F048xx)
137
  #include "stm32f048xx.h"
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#elif defined(STM32F051x8)
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  #include "stm32f051x8.h"
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#elif defined(STM32F058xx)
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  #include "stm32f058xx.h"
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#elif defined(STM32F070x6)
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  #include "stm32f070x6.h"
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#elif defined(STM32F070xB)
145
  #include "stm32f070xb.h"
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#elif defined(STM32F071xB)
147
  #include "stm32f071xb.h"
148
#elif defined(STM32F072xB)
149
  #include "stm32f072xb.h"
150
#elif defined(STM32F078xx)
151
  #include "stm32f078xx.h"
152
#elif defined(STM32F091xC)
153
  #include "stm32f091xc.h"
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#elif defined(STM32F098xx)
155
  #include "stm32f098xx.h"
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#elif defined(STM32F030xC)
157
  #include "stm32f030xc.h"    
158
#else
159
 #error "Please select first the target STM32F0xx device used in your application (in stm32f0xx.h file)"
160
#endif
161
 
162
/**
163
  * @}
164
  */
165
 
166
/** @addtogroup Exported_types
167
  * @{
168
  */
169
typedef enum
170
{
171
  RESET = 0U,
172
  SET = !RESET
173
} FlagStatus, ITStatus;
174
 
175
typedef enum
176
{
177
  DISABLE = 0U,
178
  ENABLE = !DISABLE
179
} FunctionalState;
180
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
181
 
182
typedef enum
183
{
184
  SUCCESS = 0U,
185
  ERROR = !SUCCESS
186
} ErrorStatus;
187
 
188
/**
189
  * @}
190
  */
191
 
192
 
193
/** @addtogroup Exported_macros
194
  * @{
195
  */
196
#define SET_BIT(REG, BIT)     ((REG) |= (BIT))
197
 
198
#define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
199
 
200
#define READ_BIT(REG, BIT)    ((REG) & (BIT))
201
 
202
#define CLEAR_REG(REG)        ((REG) = (0x0))
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204
#define WRITE_REG(REG, VAL)   ((REG) = (VAL))
205
 
206
#define READ_REG(REG)         ((REG))
207
 
208
#define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
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/* Use of interrupt control for register exclusive access */
211
/* Atomic 32-bit register access macro to set one or several bits */
212
#define ATOMIC_SET_BIT(REG, BIT)                             \
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  do {                                                       \
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    uint32_t primask;                                        \
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    primask = __get_PRIMASK();                               \
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    __set_PRIMASK(1);                                        \
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    SET_BIT((REG), (BIT));                                   \
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    __set_PRIMASK(primask);                                  \
219
  } while(0)
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/* Atomic 32-bit register access macro to clear one or several bits */
222
#define ATOMIC_CLEAR_BIT(REG, BIT)                           \
223
  do {                                                       \
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    uint32_t primask;                                        \
225
    primask = __get_PRIMASK();                               \
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    __set_PRIMASK(1);                                        \
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    CLEAR_BIT((REG), (BIT));                                 \
228
    __set_PRIMASK(primask);                                  \
229
  } while(0)
230
 
231
/* Atomic 32-bit register access macro to clear and set one or several bits */
232
#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)            \
233
  do {                                                       \
234
    uint32_t primask;                                        \
235
    primask = __get_PRIMASK();                               \
236
    __set_PRIMASK(1);                                        \
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    MODIFY_REG((REG), (CLEARMSK), (SETMASK));                \
238
    __set_PRIMASK(primask);                                  \
239
  } while(0)
240
 
241
/* Atomic 16-bit register access macro to set one or several bits */
242
#define ATOMIC_SETH_BIT(REG, BIT) ATOMIC_SET_BIT(REG, BIT)                                   \
243
 
244
/* Atomic 16-bit register access macro to clear one or several bits */
245
#define ATOMIC_CLEARH_BIT(REG, BIT) ATOMIC_CLEAR_BIT(REG, BIT)                               \
246
 
247
/* Atomic 16-bit register access macro to clear and set one or several bits */
248
#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
249
 
2 mjames 250
/**
251
  * @}
252
  */
253
 
254
#if defined (USE_HAL_DRIVER)
255
 #include "stm32f0xx_hal.h"
256
#endif /* USE_HAL_DRIVER */
257
 
258
 
259
#ifdef __cplusplus
260
}
261
#endif /* __cplusplus */
262
 
263
#endif /* __STM32F0xx_H */
264
/**
265
  * @}
266
  */
267
 
268
/**
269
  * @}
270
  */
271
 
272
 
273
 
274
 
275
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/