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Rev	Author	Line No.	Line
2	mjames	1	;/ ----------------------------------------------------------------------*
		2	; Copyright (C) 2010-2014 ARM Limited. All rights reserved.*
		3	;*
		4	; $Date: 19. March 2015*
		5	; $Revision: V.1.4.5*
		6	;*
		7	; Project: CMSIS DSP Library*
		8	; Title: arm_bitreversal2.S*
		9	;*
		10	; Description: This is the arm_bitreversal_32 function done in*
		11	; assembly for maximum speed. This function is called*
		12	; after doing an fft to reorder the output. The function*
		13	; is loop unrolled by 2. arm_bitreversal_16 as well.*
		14	;*
		15	; Target Processor: Cortex-M4/Cortex-M3/Cortex-M0*
		16	;*
		17	; Redistribution and use in source and binary forms, with or without*
		18	; modification, are permitted provided that the following conditions*
		19	; are met:*
		20	; - Redistributions of source code must retain the above copyright*
		21	; notice, this list of conditions and the following disclaimer.*
		22	; - Redistributions in binary form must reproduce the above copyright*
		23	; notice, this list of conditions and the following disclaimer in*
		24	; the documentation and/or other materials provided with the*
		25	; distribution.*
		26	; - Neither the name of ARM LIMITED nor the names of its contributors*
		27	; may be used to endorse or promote products derived from this*
		28	; software without specific prior written permission.*
		29	;*
		30	; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS*
		31	; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT*
		32	; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS*
		33	; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE*
		34	; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,*
		35	; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,*
		36	; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;*
		37	; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER*
		38	; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT*
		39	; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN*
		40	; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE*
		41	; POSSIBILITY OF SUCH DAMAGE.*
		42	; -------------------------------------------------------------------- /
		43	#if defined(__CC_ARM) // Keil
		44	#define CODESECT AREA \|\|.text\|\|, CODE, READONLY, ALIGN=2
		45	#define LABEL
		46	#elif defined(__IASMARM__) // IAR
		47	#define CODESECT SECTION `.text`:CODE
		48	#define PROC
		49	#define LABEL
		50	#define ENDP
		51	#define EXPORT PUBLIC
		52	#elif defined(__CSMC__) /* Cosmic */
		53	#define CODESECT switch .text
		54	#define THUMB
		55	#define EXPORT xdef
		56	#define PROC :
		57	#define LABEL :
		58	#define ENDP
		59	#define arm_bitreversal_32 _arm_bitreversal_32
		60	#elif defined (__GNUC__) // GCC
		61	#define THUMB .thumb
		62	#define CODESECT .section .text
		63	#define EXPORT .global
		64	#define PROC :
		65	#define LABEL :
		66	#define ENDP
		67	#define END
		68
		69	.syntax unified
		70	#endif
		71
		72	CODESECT
		73	THUMB
		74
		75	;/*
		76	; @brief In-place bit reversal function.*
		77	; @param[in, out] pSrc points to the in-place buffer of unknown 32-bit data type.
		78	; @param[in] bitRevLen bit reversal table length*
		79	; @param[in] pBitRevTab points to bit reversal table.
		80	; @return none.*
		81	;/*
		82	EXPORT arm_bitreversal_32
		83	EXPORT arm_bitreversal_16
		84
		85	#if defined(ARM_MATH_CM0) \|\| defined(ARM_MATH_CM0PLUS)
		86
		87	arm_bitreversal_32 PROC
		88	ADDS r3,r1,#1
		89	PUSH {r4-r6}
		90	ADDS r1,r2,#0
		91	LSRS r3,r3,#1
		92	arm_bitreversal_32_0 LABEL
		93	LDRH r2,[r1,#2]
		94	LDRH r6,[r1,#0]
		95	ADD r2,r0,r2
		96	ADD r6,r0,r6
		97	LDR r5,[r2,#0]
		98	LDR r4,[r6,#0]
		99	STR r5,[r6,#0]
		100	STR r4,[r2,#0]
		101	LDR r5,[r2,#4]
		102	LDR r4,[r6,#4]
		103	STR r5,[r6,#4]
		104	STR r4,[r2,#4]
		105	ADDS r1,r1,#4
		106	SUBS r3,r3,#1
		107	BNE arm_bitreversal_32_0
		108	POP {r4-r6}
		109	BX lr
		110	ENDP
		111
		112	arm_bitreversal_16 PROC
		113	ADDS r3,r1,#1
		114	PUSH {r4-r6}
		115	ADDS r1,r2,#0
		116	LSRS r3,r3,#1
		117	arm_bitreversal_16_0 LABEL
		118	LDRH r2,[r1,#2]
		119	LDRH r6,[r1,#0]
		120	LSRS r2,r2,#1
		121	LSRS r6,r6,#1
		122	ADD r2,r0,r2
		123	ADD r6,r0,r6
		124	LDR r5,[r2,#0]
		125	LDR r4,[r6,#0]
		126	STR r5,[r6,#0]
		127	STR r4,[r2,#0]
		128	ADDS r1,r1,#4
		129	SUBS r3,r3,#1
		130	BNE arm_bitreversal_16_0
		131	POP {r4-r6}
		132	BX lr
		133	ENDP
		134
		135	#else
		136
		137	arm_bitreversal_32 PROC
		138	ADDS r3,r1,#1
		139	CMP r3,#1
		140	IT LS
		141	BXLS lr
		142	PUSH {r4-r9}
		143	ADDS r1,r2,#2
		144	LSRS r3,r3,#2
		145	arm_bitreversal_32_0 LABEL ;/ loop unrolled by 2 /
		146	LDRH r8,[r1,#4]
		147	LDRH r9,[r1,#2]
		148	LDRH r2,[r1,#0]
		149	LDRH r12,[r1,#-2]
		150	ADD r8,r0,r8
		151	ADD r9,r0,r9
		152	ADD r2,r0,r2
		153	ADD r12,r0,r12
		154	LDR r7,[r9,#0]
		155	LDR r6,[r8,#0]
		156	LDR r5,[r2,#0]
		157	LDR r4,[r12,#0]
		158	STR r6,[r9,#0]
		159	STR r7,[r8,#0]
		160	STR r5,[r12,#0]
		161	STR r4,[r2,#0]
		162	LDR r7,[r9,#4]
		163	LDR r6,[r8,#4]
		164	LDR r5,[r2,#4]
		165	LDR r4,[r12,#4]
		166	STR r6,[r9,#4]
		167	STR r7,[r8,#4]
		168	STR r5,[r12,#4]
		169	STR r4,[r2,#4]
		170	ADDS r1,r1,#8
		171	SUBS r3,r3,#1
		172	BNE arm_bitreversal_32_0
		173	POP {r4-r9}
		174	BX lr
		175	ENDP
		176
		177	arm_bitreversal_16 PROC
		178	ADDS r3,r1,#1
		179	CMP r3,#1
		180	IT LS
		181	BXLS lr
		182	PUSH {r4-r9}
		183	ADDS r1,r2,#2
		184	LSRS r3,r3,#2
		185	arm_bitreversal_16_0 LABEL ;/ loop unrolled by 2 /
		186	LDRH r8,[r1,#4]
		187	LDRH r9,[r1,#2]
		188	LDRH r2,[r1,#0]
		189	LDRH r12,[r1,#-2]
		190	ADD r8,r0,r8,LSR #1
		191	ADD r9,r0,r9,LSR #1
		192	ADD r2,r0,r2,LSR #1
		193	ADD r12,r0,r12,LSR #1
		194	LDR r7,[r9,#0]
		195	LDR r6,[r8,#0]
		196	LDR r5,[r2,#0]
		197	LDR r4,[r12,#0]
		198	STR r6,[r9,#0]
		199	STR r7,[r8,#0]
		200	STR r5,[r12,#0]
		201	STR r4,[r2,#0]
		202	ADDS r1,r1,#8
		203	SUBS r3,r3,#1
		204	BNE arm_bitreversal_16_0
		205	POP {r4-r9}
		206	BX lr
		207	ENDP
		208
		209	#endif
		210
		211	END

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