Subversion Repositories LedShow

Rev

Details | Last modification | View Log | RSS feed

Rev Author Line No. Line
2 mjames 1
/* ----------------------------------------------------------------------    
2
* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
3
*    
4
* $Date:        19. March 2015
5
* $Revision:    V.1.4.5  
6
*    
7
* Project:          CMSIS DSP Library    
8
* Title:                arm_power_q15.c    
9
*    
10
* Description:  Sum of the squares of the elements of a Q15 vector.    
11
*    
12
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
13
*  
14
* Redistribution and use in source and binary forms, with or without
15
* modification, are permitted provided that the following conditions
16
* are met:
17
*   - Redistributions of source code must retain the above copyright
18
*     notice, this list of conditions and the following disclaimer.
19
*   - Redistributions in binary form must reproduce the above copyright
20
*     notice, this list of conditions and the following disclaimer in
21
*     the documentation and/or other materials provided with the
22
*     distribution.
23
*   - Neither the name of ARM LIMITED nor the names of its contributors
24
*     may be used to endorse or promote products derived from this
25
*     software without specific prior written permission.
26
*
27
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38
* POSSIBILITY OF SUCH DAMAGE.  
39
* -------------------------------------------------------------------- */
40
 
41
#include "arm_math.h"
42
 
43
/**    
44
 * @ingroup groupStats    
45
 */
46
 
47
/**    
48
 * @addtogroup power    
49
 * @{    
50
 */
51
 
52
/**    
53
 * @brief Sum of the squares of the elements of a Q15 vector.    
54
 * @param[in]       *pSrc points to the input vector    
55
 * @param[in]       blockSize length of the input vector    
56
 * @param[out]      *pResult sum of the squares value returned here    
57
 * @return none.    
58
 *    
59
 * @details    
60
 * <b>Scaling and Overflow Behavior:</b>    
61
 *    
62
 * \par    
63
 * The function is implemented using a 64-bit internal accumulator.    
64
 * The input is represented in 1.15 format.  
65
 * Intermediate multiplication yields a 2.30 format, and this    
66
 * result is added without saturation to a 64-bit accumulator in 34.30 format.    
67
 * With 33 guard bits in the accumulator, there is no risk of overflow, and the    
68
 * full precision of the intermediate multiplication is preserved.    
69
 * Finally, the return result is in 34.30 format.    
70
 *    
71
 */
72
 
73
void arm_power_q15(
74
  q15_t * pSrc,
75
  uint32_t blockSize,
76
  q63_t * pResult)
77
{
78
  q63_t sum = 0;                                 /* Temporary result storage */
79
 
80
#ifndef ARM_MATH_CM0_FAMILY
81
 
82
  /* Run the below code for Cortex-M4 and Cortex-M3 */
83
 
84
  q31_t in32;                                    /* Temporary variable to store input value */
85
  q15_t in16;                                    /* Temporary variable to store input value */
86
  uint32_t blkCnt;                               /* loop counter */
87
 
88
 
89
  /* loop Unrolling */
90
  blkCnt = blockSize >> 2u;
91
 
92
  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
93
   ** a second loop below computes the remaining 1 to 3 samples. */
94
  while(blkCnt > 0u)
95
  {
96
    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
97
    /* Compute Power and then store the result in a temporary variable, sum. */
98
    in32 = *__SIMD32(pSrc)++;
99
    sum = __SMLALD(in32, in32, sum);
100
    in32 = *__SIMD32(pSrc)++;
101
    sum = __SMLALD(in32, in32, sum);
102
 
103
    /* Decrement the loop counter */
104
    blkCnt--;
105
  }
106
 
107
  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
108
   ** No loop unrolling is used. */
109
  blkCnt = blockSize % 0x4u;
110
 
111
  while(blkCnt > 0u)
112
  {
113
    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
114
    /* Compute Power and then store the result in a temporary variable, sum. */
115
    in16 = *pSrc++;
116
    sum = __SMLALD(in16, in16, sum);
117
 
118
    /* Decrement the loop counter */
119
    blkCnt--;
120
  }
121
 
122
#else
123
 
124
  /* Run the below code for Cortex-M0 */
125
 
126
  q15_t in;                                      /* Temporary variable to store input value */
127
  uint32_t blkCnt;                               /* loop counter */
128
 
129
 
130
  /* Loop over blockSize number of values */
131
  blkCnt = blockSize;
132
 
133
  while(blkCnt > 0u)
134
  {
135
    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
136
    /* Compute Power and then store the result in a temporary variable, sum. */
137
    in = *pSrc++;
138
    sum += ((q31_t) in * in);
139
 
140
    /* Decrement the loop counter */
141
    blkCnt--;
142
  }
143
 
144
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
145
 
146
  /* Store the results in 34.30 format  */
147
  *pResult = sum;
148
}
149
 
150
/**    
151
 * @} end of power group    
152
 */