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2 | mjames | 1 | /* ---------------------------------------------------------------------- |
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. |
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3 | * |
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4 | * $Date: 19. March 2015 |
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5 | * $Revision: V.1.4.5 |
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6 | * |
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7 | * Project: CMSIS DSP Library |
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8 | * Title: arm_cmplx_mat_mult_q15.c |
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9 | * |
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10 | * Description: Q15 complex matrix multiplication. |
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11 | * |
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12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
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13 | * |
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14 | * Redistribution and use in source and binary forms, with or without |
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15 | * modification, are permitted provided that the following conditions |
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16 | * are met: |
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17 | * - Redistributions of source code must retain the above copyright |
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18 | * notice, this list of conditions and the following disclaimer. |
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19 | * - Redistributions in binary form must reproduce the above copyright |
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20 | * notice, this list of conditions and the following disclaimer in |
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21 | * the documentation and/or other materials provided with the |
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22 | * distribution. |
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23 | * - Neither the name of ARM LIMITED nor the names of its contributors |
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24 | * may be used to endorse or promote products derived from this |
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25 | * software without specific prior written permission. |
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26 | * |
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27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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38 | * POSSIBILITY OF SUCH DAMAGE. |
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39 | * -------------------------------------------------------------------- */ |
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40 | #include "arm_math.h" |
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41 | |||
42 | /** |
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43 | * @ingroup groupMatrix |
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44 | */ |
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45 | |||
46 | /** |
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47 | * @addtogroup CmplxMatrixMult |
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48 | * @{ |
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49 | */ |
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50 | |||
51 | |||
52 | /** |
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53 | * @brief Q15 Complex matrix multiplication |
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54 | * @param[in] *pSrcA points to the first input complex matrix structure |
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55 | * @param[in] *pSrcB points to the second input complex matrix structure |
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56 | * @param[out] *pDst points to output complex matrix structure |
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57 | * @param[in] *pScratch points to the array for storing intermediate results |
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58 | * @return The function returns either |
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59 | * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. |
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60 | * |
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61 | * \par Conditions for optimum performance |
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62 | * Input, output and state buffers should be aligned by 32-bit |
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63 | * |
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64 | * \par Restrictions |
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65 | * If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE |
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66 | * In this case input, output, scratch buffers should be aligned by 32-bit |
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67 | * |
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68 | * @details |
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69 | * <b>Scaling and Overflow Behavior:</b> |
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70 | * |
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71 | * \par |
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72 | * The function is implemented using a 64-bit internal accumulator. The inputs to the |
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73 | * multiplications are in 1.15 format and multiplications yield a 2.30 result. |
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74 | * The 2.30 intermediate |
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75 | * results are accumulated in a 64-bit accumulator in 34.30 format. This approach |
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76 | * provides 33 guard bits and there is no risk of overflow. The 34.30 result is then |
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77 | * truncated to 34.15 format by discarding the low 15 bits and then saturated to |
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78 | * 1.15 format. |
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79 | * |
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80 | * \par |
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81 | * Refer to <code>arm_mat_mult_fast_q15()</code> for a faster but less precise version of this function. |
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82 | * |
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83 | */ |
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84 | |||
85 | |||
86 | |||
87 | |||
88 | arm_status arm_mat_cmplx_mult_q15( |
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89 | const arm_matrix_instance_q15 * pSrcA, |
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90 | const arm_matrix_instance_q15 * pSrcB, |
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91 | arm_matrix_instance_q15 * pDst, |
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92 | q15_t * pScratch) |
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93 | { |
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94 | /* accumulator */ |
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95 | q15_t *pSrcBT = pScratch; /* input data matrix pointer for transpose */ |
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96 | q15_t *pInA = pSrcA->pData; /* input data matrix pointer A of Q15 type */ |
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97 | q15_t *pInB = pSrcB->pData; /* input data matrix pointer B of Q15 type */ |
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98 | q15_t *px; /* Temporary output data matrix pointer */ |
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99 | uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */ |
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100 | uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */ |
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101 | uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */ |
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102 | uint16_t numRowsB = pSrcB->numRows; /* number of rows of input matrix A */ |
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103 | uint16_t col, i = 0u, row = numRowsB, colCnt; /* loop counters */ |
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104 | arm_status status; /* status of matrix multiplication */ |
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105 | q63_t sumReal, sumImag; |
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106 | |||
107 | #ifdef UNALIGNED_SUPPORT_DISABLE |
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108 | q15_t in; /* Temporary variable to hold the input value */ |
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109 | q15_t a, b, c, d; |
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110 | #else |
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111 | q31_t in; /* Temporary variable to hold the input value */ |
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112 | q31_t prod1, prod2; |
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113 | q31_t pSourceA, pSourceB; |
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114 | #endif |
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115 | |||
116 | #ifdef ARM_MATH_MATRIX_CHECK |
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117 | /* Check for matrix mismatch condition */ |
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118 | if((pSrcA->numCols != pSrcB->numRows) || |
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119 | (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) |
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120 | { |
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121 | /* Set status as ARM_MATH_SIZE_MISMATCH */ |
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122 | status = ARM_MATH_SIZE_MISMATCH; |
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123 | } |
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124 | else |
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125 | #endif |
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126 | { |
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127 | /* Matrix transpose */ |
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128 | do |
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129 | { |
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130 | /* Apply loop unrolling and exchange the columns with row elements */ |
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131 | col = numColsB >> 2; |
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132 | |||
133 | /* The pointer px is set to starting address of the column being processed */ |
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134 | px = pSrcBT + i; |
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135 | |||
136 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. |
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137 | ** a second loop below computes the remaining 1 to 3 samples. */ |
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138 | while(col > 0u) |
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139 | { |
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140 | #ifdef UNALIGNED_SUPPORT_DISABLE |
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141 | /* Read two elements from the row */ |
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142 | in = *pInB++; |
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143 | *px = in; |
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144 | in = *pInB++; |
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145 | px[1] = in; |
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146 | |||
147 | /* Update the pointer px to point to the next row of the transposed matrix */ |
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148 | px += numRowsB * 2; |
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149 | |||
150 | /* Read two elements from the row */ |
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151 | in = *pInB++; |
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152 | *px = in; |
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153 | in = *pInB++; |
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154 | px[1] = in; |
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155 | |||
156 | /* Update the pointer px to point to the next row of the transposed matrix */ |
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157 | px += numRowsB * 2; |
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158 | |||
159 | /* Read two elements from the row */ |
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160 | in = *pInB++; |
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161 | *px = in; |
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162 | in = *pInB++; |
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163 | px[1] = in; |
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164 | |||
165 | /* Update the pointer px to point to the next row of the transposed matrix */ |
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166 | px += numRowsB * 2; |
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167 | |||
168 | /* Read two elements from the row */ |
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169 | in = *pInB++; |
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170 | *px = in; |
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171 | in = *pInB++; |
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172 | px[1] = in; |
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173 | |||
174 | /* Update the pointer px to point to the next row of the transposed matrix */ |
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175 | px += numRowsB * 2; |
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176 | |||
177 | /* Decrement the column loop counter */ |
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178 | col--; |
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179 | } |
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180 | |||
181 | /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here. |
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182 | ** No loop unrolling is used. */ |
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183 | col = numColsB % 0x4u; |
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184 | |||
185 | while(col > 0u) |
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186 | { |
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187 | /* Read two elements from the row */ |
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188 | in = *pInB++; |
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189 | *px = in; |
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190 | in = *pInB++; |
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191 | px[1] = in; |
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192 | #else |
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193 | |||
194 | /* Read two elements from the row */ |
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195 | in = *__SIMD32(pInB)++; |
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196 | |||
197 | *__SIMD32(px) = in; |
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198 | |||
199 | /* Update the pointer px to point to the next row of the transposed matrix */ |
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200 | px += numRowsB * 2; |
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201 | |||
202 | |||
203 | /* Read two elements from the row */ |
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204 | in = *__SIMD32(pInB)++; |
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205 | |||
206 | *__SIMD32(px) = in; |
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207 | |||
208 | /* Update the pointer px to point to the next row of the transposed matrix */ |
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209 | px += numRowsB * 2; |
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210 | |||
211 | /* Read two elements from the row */ |
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212 | in = *__SIMD32(pInB)++; |
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213 | |||
214 | *__SIMD32(px) = in; |
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215 | |||
216 | /* Update the pointer px to point to the next row of the transposed matrix */ |
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217 | px += numRowsB * 2; |
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218 | |||
219 | /* Read two elements from the row */ |
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220 | in = *__SIMD32(pInB)++; |
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221 | |||
222 | *__SIMD32(px) = in; |
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223 | |||
224 | /* Update the pointer px to point to the next row of the transposed matrix */ |
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225 | px += numRowsB * 2; |
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226 | |||
227 | /* Decrement the column loop counter */ |
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228 | col--; |
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229 | } |
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230 | |||
231 | /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here. |
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232 | ** No loop unrolling is used. */ |
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233 | col = numColsB % 0x4u; |
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234 | |||
235 | while(col > 0u) |
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236 | { |
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237 | /* Read two elements from the row */ |
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238 | in = *__SIMD32(pInB)++; |
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239 | |||
240 | *__SIMD32(px) = in; |
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241 | #endif |
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242 | |||
243 | /* Update the pointer px to point to the next row of the transposed matrix */ |
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244 | px += numRowsB * 2; |
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245 | |||
246 | /* Decrement the column loop counter */ |
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247 | col--; |
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248 | } |
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249 | |||
250 | i = i + 2u; |
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251 | |||
252 | /* Decrement the row loop counter */ |
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253 | row--; |
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254 | |||
255 | } while(row > 0u); |
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256 | |||
257 | /* Reset the variables for the usage in the following multiplication process */ |
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258 | row = numRowsA; |
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259 | i = 0u; |
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260 | px = pDst->pData; |
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261 | |||
262 | /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */ |
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263 | /* row loop */ |
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264 | do |
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265 | { |
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266 | /* For every row wise process, the column loop counter is to be initiated */ |
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267 | col = numColsB; |
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268 | |||
269 | /* For every row wise process, the pIn2 pointer is set |
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270 | ** to the starting address of the transposed pSrcB data */ |
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271 | pInB = pSrcBT; |
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272 | |||
273 | /* column loop */ |
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274 | do |
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275 | { |
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276 | /* Set the variable sum, that acts as accumulator, to zero */ |
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277 | sumReal = 0; |
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278 | sumImag = 0; |
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279 | |||
280 | /* Apply loop unrolling and compute 2 MACs simultaneously. */ |
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281 | colCnt = numColsA >> 1; |
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282 | |||
283 | /* Initiate the pointer pIn1 to point to the starting address of the column being processed */ |
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284 | pInA = pSrcA->pData + i * 2; |
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285 | |||
286 | |||
287 | /* matrix multiplication */ |
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288 | while(colCnt > 0u) |
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289 | { |
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290 | /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ |
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291 | |||
292 | #ifdef UNALIGNED_SUPPORT_DISABLE |
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293 | |||
294 | /* read real and imag values from pSrcA buffer */ |
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295 | a = *pInA; |
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296 | b = *(pInA + 1u); |
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297 | /* read real and imag values from pSrcB buffer */ |
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298 | c = *pInB; |
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299 | d = *(pInB + 1u); |
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300 | |||
301 | /* Multiply and Accumlates */ |
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302 | sumReal += (q31_t) a *c; |
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303 | sumImag += (q31_t) a *d; |
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304 | sumReal -= (q31_t) b *d; |
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305 | sumImag += (q31_t) b *c; |
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306 | |||
307 | /* read next real and imag values from pSrcA buffer */ |
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308 | a = *(pInA + 2u); |
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309 | b = *(pInA + 3u); |
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310 | /* read next real and imag values from pSrcB buffer */ |
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311 | c = *(pInB + 2u); |
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312 | d = *(pInB + 3u); |
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313 | |||
314 | /* update pointer */ |
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315 | pInA += 4u; |
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316 | |||
317 | /* Multiply and Accumlates */ |
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318 | sumReal += (q31_t) a *c; |
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319 | sumImag += (q31_t) a *d; |
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320 | sumReal -= (q31_t) b *d; |
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321 | sumImag += (q31_t) b *c; |
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322 | /* update pointer */ |
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323 | pInB += 4u; |
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324 | #else |
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325 | /* read real and imag values from pSrcA and pSrcB buffer */ |
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326 | pSourceA = *__SIMD32(pInA)++; |
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327 | pSourceB = *__SIMD32(pInB)++; |
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328 | |||
329 | /* Multiply and Accumlates */ |
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330 | #ifdef ARM_MATH_BIG_ENDIAN |
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331 | prod1 = -__SMUSD(pSourceA, pSourceB); |
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332 | #else |
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333 | prod1 = __SMUSD(pSourceA, pSourceB); |
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334 | #endif |
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335 | prod2 = __SMUADX(pSourceA, pSourceB); |
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336 | sumReal += (q63_t) prod1; |
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337 | sumImag += (q63_t) prod2; |
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338 | |||
339 | /* read real and imag values from pSrcA and pSrcB buffer */ |
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340 | pSourceA = *__SIMD32(pInA)++; |
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341 | pSourceB = *__SIMD32(pInB)++; |
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342 | |||
343 | /* Multiply and Accumlates */ |
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344 | #ifdef ARM_MATH_BIG_ENDIAN |
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345 | prod1 = -__SMUSD(pSourceA, pSourceB); |
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346 | #else |
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347 | prod1 = __SMUSD(pSourceA, pSourceB); |
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348 | #endif |
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349 | prod2 = __SMUADX(pSourceA, pSourceB); |
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350 | sumReal += (q63_t) prod1; |
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351 | sumImag += (q63_t) prod2; |
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352 | |||
353 | #endif /* #ifdef UNALIGNED_SUPPORT_DISABLE */ |
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354 | |||
355 | /* Decrement the loop counter */ |
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356 | colCnt--; |
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357 | } |
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358 | |||
359 | /* process odd column samples */ |
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360 | if((numColsA & 0x1u) > 0u) |
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361 | { |
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362 | /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */ |
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363 | |||
364 | #ifdef UNALIGNED_SUPPORT_DISABLE |
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365 | |||
366 | /* read real and imag values from pSrcA and pSrcB buffer */ |
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367 | a = *pInA++; |
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368 | b = *pInA++; |
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369 | c = *pInB++; |
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370 | d = *pInB++; |
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371 | |||
372 | /* Multiply and Accumlates */ |
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373 | sumReal += (q31_t) a *c; |
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374 | sumImag += (q31_t) a *d; |
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375 | sumReal -= (q31_t) b *d; |
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376 | sumImag += (q31_t) b *c; |
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377 | |||
378 | #else |
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379 | /* read real and imag values from pSrcA and pSrcB buffer */ |
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380 | pSourceA = *__SIMD32(pInA)++; |
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381 | pSourceB = *__SIMD32(pInB)++; |
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382 | |||
383 | /* Multiply and Accumlates */ |
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384 | #ifdef ARM_MATH_BIG_ENDIAN |
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385 | prod1 = -__SMUSD(pSourceA, pSourceB); |
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386 | #else |
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387 | prod1 = __SMUSD(pSourceA, pSourceB); |
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388 | #endif |
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389 | prod2 = __SMUADX(pSourceA, pSourceB); |
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390 | sumReal += (q63_t) prod1; |
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391 | sumImag += (q63_t) prod2; |
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392 | |||
393 | #endif /* #ifdef UNALIGNED_SUPPORT_DISABLE */ |
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394 | |||
395 | } |
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396 | |||
397 | /* Saturate and store the result in the destination buffer */ |
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398 | |||
399 | *px++ = (q15_t) (__SSAT(sumReal >> 15, 16)); |
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400 | *px++ = (q15_t) (__SSAT(sumImag >> 15, 16)); |
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401 | |||
402 | /* Decrement the column loop counter */ |
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403 | col--; |
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404 | |||
405 | } while(col > 0u); |
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406 | |||
407 | i = i + numColsA; |
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408 | |||
409 | /* Decrement the row loop counter */ |
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410 | row--; |
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411 | |||
412 | } while(row > 0u); |
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413 | |||
414 | /* set status as ARM_MATH_SUCCESS */ |
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415 | status = ARM_MATH_SUCCESS; |
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416 | } |
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417 | |||
418 | /* Return to application */ |
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419 | return (status); |
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420 | } |
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421 | |||
422 | /** |
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423 | * @} end of MatrixMult group |
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424 | */ |