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2 | mjames | 1 | /* ---------------------------------------------------------------------- |
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. |
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3 | * |
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4 | * $Date: 19. October 2015 |
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5 | * $Revision: V.1.4.5 a |
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6 | * |
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7 | * Project: CMSIS DSP Library |
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8 | * Title: arm_cmplx_mult_real_q15.c |
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9 | * |
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10 | * Description: Q15 complex by real multiplication |
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11 | * |
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12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
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13 | * |
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14 | * Redistribution and use in source and binary forms, with or without |
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15 | * modification, are permitted provided that the following conditions |
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16 | * are met: |
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17 | * - Redistributions of source code must retain the above copyright |
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18 | * notice, this list of conditions and the following disclaimer. |
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19 | * - Redistributions in binary form must reproduce the above copyright |
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20 | * notice, this list of conditions and the following disclaimer in |
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21 | * the documentation and/or other materials provided with the |
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22 | * distribution. |
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23 | * - Neither the name of ARM LIMITED nor the names of its contributors |
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24 | * may be used to endorse or promote products derived from this |
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25 | * software without specific prior written permission. |
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26 | * |
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27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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38 | * POSSIBILITY OF SUCH DAMAGE. |
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39 | * -------------------------------------------------------------------- */ |
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40 | |||
41 | #include "arm_math.h" |
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42 | |||
43 | /** |
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44 | * @ingroup groupCmplxMath |
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45 | */ |
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46 | |||
47 | /** |
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48 | * @addtogroup CmplxByRealMult |
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49 | * @{ |
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50 | */ |
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51 | |||
52 | |||
53 | /** |
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54 | * @brief Q15 complex-by-real multiplication |
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55 | * @param[in] *pSrcCmplx points to the complex input vector |
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56 | * @param[in] *pSrcReal points to the real input vector |
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57 | * @param[out] *pCmplxDst points to the complex output vector |
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58 | * @param[in] numSamples number of samples in each vector |
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59 | * @return none. |
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60 | * |
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61 | * <b>Scaling and Overflow Behavior:</b> |
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62 | * \par |
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63 | * The function uses saturating arithmetic. |
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64 | * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. |
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65 | */ |
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66 | |||
67 | void arm_cmplx_mult_real_q15( |
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68 | q15_t * pSrcCmplx, |
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69 | q15_t * pSrcReal, |
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70 | q15_t * pCmplxDst, |
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71 | uint32_t numSamples) |
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72 | { |
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73 | q15_t in; /* Temporary variable to store input value */ |
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74 | |||
75 | #ifndef ARM_MATH_CM0_FAMILY |
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76 | |||
77 | /* Run the below code for Cortex-M4 and Cortex-M3 */ |
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78 | uint32_t blkCnt; /* loop counters */ |
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79 | q31_t inA1, inA2; /* Temporary variables to hold input data */ |
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80 | q31_t inB1; /* Temporary variables to hold input data */ |
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81 | q15_t out1, out2, out3, out4; /* Temporary variables to hold output data */ |
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82 | q31_t mul1, mul2, mul3, mul4; /* Temporary variables to hold intermediate data */ |
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83 | |||
84 | /* loop Unrolling */ |
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85 | blkCnt = numSamples >> 2u; |
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86 | |||
87 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. |
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88 | ** a second loop below computes the remaining 1 to 3 samples. */ |
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89 | while(blkCnt > 0u) |
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90 | { |
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91 | /* C[2 * i] = A[2 * i] * B[i]. */ |
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92 | /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ |
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93 | /* read complex number both real and imaginary from complex input buffer */ |
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94 | inA1 = *__SIMD32(pSrcCmplx)++; |
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95 | /* read two real values at a time from real input buffer */ |
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96 | inB1 = *__SIMD32(pSrcReal)++; |
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97 | /* read complex number both real and imaginary from complex input buffer */ |
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98 | inA2 = *__SIMD32(pSrcCmplx)++; |
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99 | |||
100 | /* multiply complex number with real numbers */ |
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101 | #ifndef ARM_MATH_BIG_ENDIAN |
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102 | |||
103 | mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1)); |
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104 | mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1)); |
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105 | mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16)); |
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106 | mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16)); |
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107 | |||
108 | #else |
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109 | |||
110 | mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); |
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111 | mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16)); |
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112 | mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1); |
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113 | mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1); |
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114 | |||
115 | #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
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116 | |||
117 | /* saturate the result */ |
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118 | out1 = (q15_t) __SSAT(mul1 >> 15u, 16); |
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119 | out2 = (q15_t) __SSAT(mul2 >> 15u, 16); |
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120 | out3 = (q15_t) __SSAT(mul3 >> 15u, 16); |
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121 | out4 = (q15_t) __SSAT(mul4 >> 15u, 16); |
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122 | |||
123 | /* pack real and imaginary outputs and store them to destination */ |
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124 | *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16); |
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125 | *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16); |
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126 | |||
127 | inA1 = *__SIMD32(pSrcCmplx)++; |
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128 | inB1 = *__SIMD32(pSrcReal)++; |
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129 | inA2 = *__SIMD32(pSrcCmplx)++; |
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130 | |||
131 | #ifndef ARM_MATH_BIG_ENDIAN |
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132 | |||
133 | mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1)); |
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134 | mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1)); |
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135 | mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16)); |
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136 | mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16)); |
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137 | |||
138 | #else |
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139 | |||
140 | mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); |
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141 | mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16)); |
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142 | mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1); |
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143 | mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1); |
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144 | |||
145 | #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
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146 | |||
147 | out1 = (q15_t) __SSAT(mul1 >> 15u, 16); |
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148 | out2 = (q15_t) __SSAT(mul2 >> 15u, 16); |
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149 | out3 = (q15_t) __SSAT(mul3 >> 15u, 16); |
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150 | out4 = (q15_t) __SSAT(mul4 >> 15u, 16); |
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151 | |||
152 | *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16); |
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153 | *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16); |
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154 | |||
155 | /* Decrement the numSamples loop counter */ |
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156 | blkCnt--; |
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157 | } |
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158 | |||
159 | /* If the numSamples is not a multiple of 4, compute any remaining output samples here. |
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160 | ** No loop unrolling is used. */ |
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161 | blkCnt = numSamples % 0x4u; |
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162 | |||
163 | while(blkCnt > 0u) |
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164 | { |
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165 | /* C[2 * i] = A[2 * i] * B[i]. */ |
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166 | /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */ |
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167 | in = *pSrcReal++; |
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168 | /* store the result in the destination buffer. */ |
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169 | *pCmplxDst++ = |
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170 | (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16); |
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171 | *pCmplxDst++ = |
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172 | (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16); |
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173 | |||
174 | /* Decrement the numSamples loop counter */ |
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175 | blkCnt--; |
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176 | } |
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177 | |||
178 | #else |
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179 | |||
180 | /* Run the below code for Cortex-M0 */ |
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181 | |||
182 | while(numSamples > 0u) |
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183 | { |
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184 | /* realOut = realA * realB. */ |
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185 | /* imagOut = imagA * realB. */ |
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186 | in = *pSrcReal++; |
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187 | /* store the result in the destination buffer. */ |
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188 | *pCmplxDst++ = |
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189 | (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16); |
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190 | *pCmplxDst++ = |
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191 | (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16); |
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192 | |||
193 | /* Decrement the numSamples loop counter */ |
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194 | numSamples--; |
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195 | } |
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196 | |||
197 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
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198 | |||
199 | } |
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200 | |||
201 | /** |
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202 | * @} end of CmplxByRealMult group |
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203 | */ |