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/* ----------------------------------------------------------------------    
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* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
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*    
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* $Date:        19. March 2015
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* $Revision:    V.1.4.5
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*    
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* Project:          CMSIS DSP Library    
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* Title:            arm_cmplx_mult_cmplx_f32.c    
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*    
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* Description:  Floating-point complex-by-complex multiplication    
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*    
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* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
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*  
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*   - Redistributions of source code must retain the above copyright
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*     notice, this list of conditions and the following disclaimer.
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*   - Redistributions in binary form must reproduce the above copyright
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*     notice, this list of conditions and the following disclaimer in
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*     the documentation and/or other materials provided with the
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*     distribution.
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*   - Neither the name of ARM LIMITED nor the names of its contributors
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*     may be used to endorse or promote products derived from this
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*     software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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* -------------------------------------------------------------------- */
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#include "arm_math.h"
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/**        
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 * @ingroup groupCmplxMath        
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 */
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/**        
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 * @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication        
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 *        
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 * Multiplies a complex vector by another complex vector and generates a complex result.        
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 * The data in the complex arrays is stored in an interleaved fashion        
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 * (real, imag, real, imag, ...).        
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 * The parameter <code>numSamples</code> represents the number of complex        
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 * samples processed.  The complex arrays have a total of <code>2*numSamples</code>        
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 * real values.        
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 *        
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 * The underlying algorithm is used:        
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 *        
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 * <pre>        
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 * for(n=0; n<numSamples; n++) {        
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 *     pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];        
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 *     pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];        
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 * }        
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 * </pre>        
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 *        
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 * There are separate functions for floating-point, Q15, and Q31 data types.        
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 */
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/**        
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 * @addtogroup CmplxByCmplxMult        
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 * @{        
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 */
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/**        
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 * @brief  Floating-point complex-by-complex multiplication        
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 * @param[in]  *pSrcA points to the first input vector        
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 * @param[in]  *pSrcB points to the second input vector        
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 * @param[out]  *pDst  points to the output vector        
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 * @param[in]  numSamples number of complex samples in each vector        
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 * @return none.        
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 */
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void arm_cmplx_mult_cmplx_f32(
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  float32_t * pSrcA,
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  float32_t * pSrcB,
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  float32_t * pDst,
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  uint32_t numSamples)
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{
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  float32_t a1, b1, c1, d1;                      /* Temporary variables to store real and imaginary values */
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  uint32_t blkCnt;                               /* loop counters */
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#ifndef ARM_MATH_CM0_FAMILY
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  /* Run the below code for Cortex-M4 and Cortex-M3 */
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  float32_t a2, b2, c2, d2;                      /* Temporary variables to store real and imaginary values */
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  float32_t acc1, acc2, acc3, acc4;
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  /* loop Unrolling */
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  blkCnt = numSamples >> 2u;
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  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
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   ** a second loop below computes the remaining 1 to 3 samples. */
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  while(blkCnt > 0u)
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  {
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    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
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    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
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    a1 = *pSrcA;                /* A[2 * i] */
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    c1 = *pSrcB;                /* B[2 * i] */
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    b1 = *(pSrcA + 1);          /* A[2 * i + 1] */
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    acc1 = a1 * c1;             /* acc1 = A[2 * i] * B[2 * i] */
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    a2 = *(pSrcA + 2);          /* A[2 * i + 2] */
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    acc2 = (b1 * c1);           /* acc2 = A[2 * i + 1] * B[2 * i] */
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    d1 = *(pSrcB + 1);          /* B[2 * i + 1] */
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    c2 = *(pSrcB + 2);          /* B[2 * i + 2] */
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    acc1 -= b1 * d1;            /* acc1 =      A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
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    d2 = *(pSrcB + 3);          /* B[2 * i + 3] */
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    acc3 = a2 * c2;             /* acc3 =       A[2 * i + 2] * B[2 * i + 2] */
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    b2 = *(pSrcA + 3);          /* A[2 * i + 3] */
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    acc2 += (a1 * d1);          /* acc2 =      A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1] */
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    a1 = *(pSrcA + 4);          /* A[2 * i + 4] */
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    acc4 = (a2 * d2);           /* acc4 =   A[2 * i + 2] * B[2 * i + 3] */
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    c1 = *(pSrcB + 4);          /* B[2 * i + 4] */
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    acc3 -= (b2 * d2);          /* acc3 =       A[2 * i + 2] * B[2 * i + 2] - A[2 * i + 3] * B[2 * i + 3] */
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    *pDst = acc1;               /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
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    b1 = *(pSrcA + 5);          /* A[2 * i + 5] */
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    acc4 += b2 * c2;            /* acc4 =   A[2 * i + 2] * B[2 * i + 3] + A[2 * i + 3] * B[2 * i + 2] */
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    *(pDst + 1) = acc2;         /* C[2 * i + 1] = A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1]  */
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    acc1 = (a1 * c1);
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    d1 = *(pSrcB + 5);
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    acc2 = (b1 * c1);
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    *(pDst + 2) = acc3;
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    *(pDst + 3) = acc4;
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    a2 = *(pSrcA + 6);
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    acc1 -= (b1 * d1);
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    c2 = *(pSrcB + 6);
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    acc2 += (a1 * d1);
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    b2 = *(pSrcA + 7);
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    acc3 = (a2 * c2);
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    d2 = *(pSrcB + 7);
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    acc4 = (b2 * c2);
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    *(pDst + 4) = acc1;
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    pSrcA += 8u;
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    acc3 -= (b2 * d2);
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    acc4 += (a2 * d2);
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    *(pDst + 5) = acc2;
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    pSrcB += 8u;
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    *(pDst + 6) = acc3;
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    *(pDst + 7) = acc4;
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    pDst += 8u;
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    /* Decrement the numSamples loop counter */
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    blkCnt--;
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  }
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  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
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   ** No loop unrolling is used. */
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  blkCnt = numSamples % 0x4u;
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#else
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  /* Run the below code for Cortex-M0 */
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  blkCnt = numSamples;
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#endif /* #ifndef ARM_MATH_CM0_FAMILY */
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  while(blkCnt > 0u)
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  {
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    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
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    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
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    a1 = *pSrcA++;
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    b1 = *pSrcA++;
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    c1 = *pSrcB++;
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    d1 = *pSrcB++;
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    /* store the result in the destination buffer. */
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    *pDst++ = (a1 * c1) - (b1 * d1);
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    *pDst++ = (a1 * d1) + (b1 * c1);
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    /* Decrement the numSamples loop counter */
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    blkCnt--;
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  }
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}
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/**        
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 * @} end of CmplxByCmplxMult group        
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 */