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| 2 | mjames | 1 | /* ---------------------------------------------------------------------- |
| 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. |
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| 3 | * |
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| 4 | * $Date: 19. March 2015 |
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| 5 | * $Revision: V.1.4.5 |
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| 6 | * |
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| 7 | * Project: CMSIS DSP Library |
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| 8 | * Title: arm_shift_q31.c |
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| 9 | * |
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| 10 | * Description: Shifts the elements of a Q31 vector by a specified number of bits. |
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| 11 | * |
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| 12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
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| 13 | * |
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| 14 | * Redistribution and use in source and binary forms, with or without |
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| 15 | * modification, are permitted provided that the following conditions |
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| 16 | * are met: |
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| 17 | * - Redistributions of source code must retain the above copyright |
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| 18 | * notice, this list of conditions and the following disclaimer. |
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| 19 | * - Redistributions in binary form must reproduce the above copyright |
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| 20 | * notice, this list of conditions and the following disclaimer in |
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| 21 | * the documentation and/or other materials provided with the |
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| 22 | * distribution. |
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| 23 | * - Neither the name of ARM LIMITED nor the names of its contributors |
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| 24 | * may be used to endorse or promote products derived from this |
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| 25 | * software without specific prior written permission. |
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| 26 | * |
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| 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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| 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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| 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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| 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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| 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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| 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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| 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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| 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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| 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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| 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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| 38 | * POSSIBILITY OF SUCH DAMAGE. |
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| 39 | * -------------------------------------------------------------------- */ |
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| 40 | |||
| 41 | #include "arm_math.h" |
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| 42 | |||
| 43 | /** |
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| 44 | * @ingroup groupMath |
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| 45 | */ |
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| 46 | /** |
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| 47 | * @defgroup shift Vector Shift |
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| 48 | * |
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| 49 | * Shifts the elements of a fixed-point vector by a specified number of bits. |
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| 50 | * There are separate functions for Q7, Q15, and Q31 data types. |
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| 51 | * The underlying algorithm used is: |
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| 52 | * |
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| 53 | * <pre> |
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| 54 | * pDst[n] = pSrc[n] << shift, 0 <= n < blockSize. |
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| 55 | * </pre> |
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| 56 | * |
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| 57 | * If <code>shift</code> is positive then the elements of the vector are shifted to the left. |
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| 58 | * If <code>shift</code> is negative then the elements of the vector are shifted to the right. |
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| 59 | * |
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| 60 | * The functions support in-place computation allowing the source and destination |
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| 61 | * pointers to reference the same memory buffer. |
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| 62 | */ |
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| 63 | |||
| 64 | /** |
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| 65 | * @addtogroup shift |
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| 66 | * @{ |
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| 67 | */ |
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| 68 | |||
| 69 | /** |
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| 70 | * @brief Shifts the elements of a Q31 vector a specified number of bits. |
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| 71 | * @param[in] *pSrc points to the input vector |
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| 72 | * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative value shifts right. |
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| 73 | * @param[out] *pDst points to the output vector |
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| 74 | * @param[in] blockSize number of samples in the vector |
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| 75 | * @return none. |
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| 76 | * |
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| 77 | * |
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| 78 | * <b>Scaling and Overflow Behavior:</b> |
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| 79 | * \par |
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| 80 | * The function uses saturating arithmetic. |
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| 81 | * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated. |
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| 82 | */ |
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| 83 | |||
| 84 | void arm_shift_q31( |
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| 85 | q31_t * pSrc, |
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| 86 | int8_t shiftBits, |
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| 87 | q31_t * pDst, |
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| 88 | uint32_t blockSize) |
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| 89 | { |
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| 90 | uint32_t blkCnt; /* loop counter */ |
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| 91 | uint8_t sign = (shiftBits & 0x80); /* Sign of shiftBits */ |
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| 92 | |||
| 93 | #ifndef ARM_MATH_CM0_FAMILY |
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| 94 | |||
| 95 | q31_t in1, in2, in3, in4; /* Temporary input variables */ |
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| 96 | q31_t out1, out2, out3, out4; /* Temporary output variables */ |
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| 97 | |||
| 98 | /*loop Unrolling */ |
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| 99 | blkCnt = blockSize >> 2u; |
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| 100 | |||
| 101 | |||
| 102 | if(sign == 0u) |
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| 103 | { |
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| 104 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. |
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| 105 | ** a second loop below computes the remaining 1 to 3 samples. */ |
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| 106 | while(blkCnt > 0u) |
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| 107 | { |
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| 108 | /* C = A << shiftBits */ |
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| 109 | /* Shift the input and then store the results in the destination buffer. */ |
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| 110 | in1 = *pSrc; |
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| 111 | in2 = *(pSrc + 1); |
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| 112 | out1 = in1 << shiftBits; |
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| 113 | in3 = *(pSrc + 2); |
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| 114 | out2 = in2 << shiftBits; |
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| 115 | in4 = *(pSrc + 3); |
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| 116 | if(in1 != (out1 >> shiftBits)) |
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| 117 | out1 = 0x7FFFFFFF ^ (in1 >> 31); |
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| 118 | |||
| 119 | if(in2 != (out2 >> shiftBits)) |
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| 120 | out2 = 0x7FFFFFFF ^ (in2 >> 31); |
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| 121 | |||
| 122 | *pDst = out1; |
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| 123 | out3 = in3 << shiftBits; |
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| 124 | *(pDst + 1) = out2; |
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| 125 | out4 = in4 << shiftBits; |
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| 126 | |||
| 127 | if(in3 != (out3 >> shiftBits)) |
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| 128 | out3 = 0x7FFFFFFF ^ (in3 >> 31); |
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| 129 | |||
| 130 | if(in4 != (out4 >> shiftBits)) |
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| 131 | out4 = 0x7FFFFFFF ^ (in4 >> 31); |
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| 132 | |||
| 133 | *(pDst + 2) = out3; |
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| 134 | *(pDst + 3) = out4; |
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| 135 | |||
| 136 | /* Update destination pointer to process next sampels */ |
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| 137 | pSrc += 4u; |
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| 138 | pDst += 4u; |
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| 139 | |||
| 140 | /* Decrement the loop counter */ |
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| 141 | blkCnt--; |
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| 142 | } |
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| 143 | } |
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| 144 | else |
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| 145 | { |
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| 146 | |||
| 147 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. |
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| 148 | ** a second loop below computes the remaining 1 to 3 samples. */ |
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| 149 | while(blkCnt > 0u) |
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| 150 | { |
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| 151 | /* C = A >> shiftBits */ |
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| 152 | /* Shift the input and then store the results in the destination buffer. */ |
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| 153 | in1 = *pSrc; |
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| 154 | in2 = *(pSrc + 1); |
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| 155 | in3 = *(pSrc + 2); |
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| 156 | in4 = *(pSrc + 3); |
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| 157 | |||
| 158 | *pDst = (in1 >> -shiftBits); |
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| 159 | *(pDst + 1) = (in2 >> -shiftBits); |
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| 160 | *(pDst + 2) = (in3 >> -shiftBits); |
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| 161 | *(pDst + 3) = (in4 >> -shiftBits); |
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| 162 | |||
| 163 | |||
| 164 | pSrc += 4u; |
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| 165 | pDst += 4u; |
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| 166 | |||
| 167 | blkCnt--; |
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| 168 | } |
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| 169 | |||
| 170 | } |
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| 171 | |||
| 172 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here. |
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| 173 | ** No loop unrolling is used. */ |
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| 174 | blkCnt = blockSize % 0x4u; |
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| 175 | |||
| 176 | #else |
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| 177 | |||
| 178 | /* Run the below code for Cortex-M0 */ |
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| 179 | |||
| 180 | |||
| 181 | /* Initialize blkCnt with number of samples */ |
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| 182 | blkCnt = blockSize; |
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| 183 | |||
| 184 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
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| 185 | |||
| 186 | |||
| 187 | while(blkCnt > 0u) |
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| 188 | { |
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| 189 | /* C = A (>> or <<) shiftBits */ |
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| 190 | /* Shift the input and then store the result in the destination buffer. */ |
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| 191 | *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) : |
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| 192 | (*pSrc++ >> -shiftBits); |
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| 193 | |||
| 194 | /* Decrement the loop counter */ |
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| 195 | blkCnt--; |
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| 196 | } |
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| 197 | |||
| 198 | |||
| 199 | } |
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| 200 | |||
| 201 | /** |
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| 202 | * @} end of shift group |
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| 203 | */ |