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2 | mjames | 1 | /* ---------------------------------------------------------------------- |
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. |
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3 | * |
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4 | * $Date: 19. March 2015 |
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5 | * $Revision: V.1.4.5 |
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6 | * |
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7 | * Project: CMSIS DSP Library |
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8 | * Title: arm_scale_q15.c |
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9 | * |
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10 | * Description: Multiplies a Q15 vector by a scalar. |
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11 | * |
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12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
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13 | * |
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14 | * Redistribution and use in source and binary forms, with or without |
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15 | * modification, are permitted provided that the following conditions |
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16 | * are met: |
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17 | * - Redistributions of source code must retain the above copyright |
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18 | * notice, this list of conditions and the following disclaimer. |
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19 | * - Redistributions in binary form must reproduce the above copyright |
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20 | * notice, this list of conditions and the following disclaimer in |
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21 | * the documentation and/or other materials provided with the |
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22 | * distribution. |
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23 | * - Neither the name of ARM LIMITED nor the names of its contributors |
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24 | * may be used to endorse or promote products derived from this |
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25 | * software without specific prior written permission. |
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26 | * |
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27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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38 | * POSSIBILITY OF SUCH DAMAGE. |
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39 | * -------------------------------------------------------------------- */ |
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40 | |||
41 | #include "arm_math.h" |
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42 | |||
43 | /** |
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44 | * @ingroup groupMath |
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45 | */ |
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46 | |||
47 | /** |
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48 | * @addtogroup scale |
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49 | * @{ |
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50 | */ |
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51 | |||
52 | /** |
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53 | * @brief Multiplies a Q15 vector by a scalar. |
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54 | * @param[in] *pSrc points to the input vector |
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55 | * @param[in] scaleFract fractional portion of the scale value |
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56 | * @param[in] shift number of bits to shift the result by |
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57 | * @param[out] *pDst points to the output vector |
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58 | * @param[in] blockSize number of samples in the vector |
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59 | * @return none. |
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60 | * |
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61 | * <b>Scaling and Overflow Behavior:</b> |
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62 | * \par |
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63 | * The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format. |
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64 | * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format. |
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65 | */ |
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66 | |||
67 | |||
68 | void arm_scale_q15( |
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69 | q15_t * pSrc, |
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70 | q15_t scaleFract, |
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71 | int8_t shift, |
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72 | q15_t * pDst, |
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73 | uint32_t blockSize) |
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74 | { |
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75 | int8_t kShift = 15 - shift; /* shift to apply after scaling */ |
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76 | uint32_t blkCnt; /* loop counter */ |
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77 | |||
78 | #ifndef ARM_MATH_CM0_FAMILY |
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79 | |||
80 | /* Run the below code for Cortex-M4 and Cortex-M3 */ |
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81 | q15_t in1, in2, in3, in4; |
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82 | q31_t inA1, inA2; /* Temporary variables */ |
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83 | q31_t out1, out2, out3, out4; |
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84 | |||
85 | |||
86 | /*loop Unrolling */ |
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87 | blkCnt = blockSize >> 2u; |
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88 | |||
89 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. |
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90 | ** a second loop below computes the remaining 1 to 3 samples. */ |
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91 | while(blkCnt > 0u) |
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92 | { |
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93 | /* Reading 2 inputs from memory */ |
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94 | inA1 = *__SIMD32(pSrc)++; |
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95 | inA2 = *__SIMD32(pSrc)++; |
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96 | |||
97 | /* C = A * scale */ |
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98 | /* Scale the inputs and then store the 2 results in the destination buffer |
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99 | * in single cycle by packing the outputs */ |
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100 | out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract); |
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101 | out2 = (q31_t) ((q15_t) inA1 * scaleFract); |
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102 | out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract); |
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103 | out4 = (q31_t) ((q15_t) inA2 * scaleFract); |
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104 | |||
105 | /* apply shifting */ |
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106 | out1 = out1 >> kShift; |
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107 | out2 = out2 >> kShift; |
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108 | out3 = out3 >> kShift; |
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109 | out4 = out4 >> kShift; |
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110 | |||
111 | /* saturate the output */ |
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112 | in1 = (q15_t) (__SSAT(out1, 16)); |
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113 | in2 = (q15_t) (__SSAT(out2, 16)); |
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114 | in3 = (q15_t) (__SSAT(out3, 16)); |
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115 | in4 = (q15_t) (__SSAT(out4, 16)); |
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116 | |||
117 | /* store the result to destination */ |
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118 | *__SIMD32(pDst)++ = __PKHBT(in2, in1, 16); |
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119 | *__SIMD32(pDst)++ = __PKHBT(in4, in3, 16); |
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120 | |||
121 | /* Decrement the loop counter */ |
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122 | blkCnt--; |
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123 | } |
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124 | |||
125 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here. |
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126 | ** No loop unrolling is used. */ |
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127 | blkCnt = blockSize % 0x4u; |
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128 | |||
129 | while(blkCnt > 0u) |
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130 | { |
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131 | /* C = A * scale */ |
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132 | /* Scale the input and then store the result in the destination buffer. */ |
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133 | *pDst++ = (q15_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 16)); |
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134 | |||
135 | /* Decrement the loop counter */ |
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136 | blkCnt--; |
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137 | } |
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138 | |||
139 | #else |
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140 | |||
141 | /* Run the below code for Cortex-M0 */ |
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142 | |||
143 | /* Initialize blkCnt with number of samples */ |
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144 | blkCnt = blockSize; |
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145 | |||
146 | while(blkCnt > 0u) |
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147 | { |
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148 | /* C = A * scale */ |
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149 | /* Scale the input and then store the result in the destination buffer. */ |
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150 | *pDst++ = (q15_t) (__SSAT(((q31_t) * pSrc++ * scaleFract) >> kShift, 16)); |
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151 | |||
152 | /* Decrement the loop counter */ |
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153 | blkCnt--; |
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154 | } |
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155 | |||
156 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
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157 | |||
158 | } |
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159 | |||
160 | /** |
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161 | * @} end of scale group |
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162 | */ |