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Rev	Author	Line No.	Line
2	mjames	1	/* ----------------------------------------------------------------------
		2	* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
		3	*
		4	* $Date: 19. March 2015
		5	* $Revision: V.1.4.5
		6	*
		7	* Project: CMSIS DSP Library
		8	* Title: arm_dot_prod_q7.c
		9	*
		10	* Description: Q7 dot product.
		11	*
		12	* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
		13	*
		14	* Redistribution and use in source and binary forms, with or without
		15	* modification, are permitted provided that the following conditions
		16	* are met:
		17	* - Redistributions of source code must retain the above copyright
		18	* notice, this list of conditions and the following disclaimer.
		19	* - Redistributions in binary form must reproduce the above copyright
		20	* notice, this list of conditions and the following disclaimer in
		21	* the documentation and/or other materials provided with the
		22	* distribution.
		23	* - Neither the name of ARM LIMITED nor the names of its contributors
		24	* may be used to endorse or promote products derived from this
		25	* software without specific prior written permission.
		26	*
		27	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
		28	* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
		29	* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
		30	* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
		31	* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
		32	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
		33	* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
		34	* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
		35	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
		36	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
		37	* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
		38	* POSSIBILITY OF SUCH DAMAGE.
		39	* -------------------------------------------------------------------- */
		40
		41	#include "arm_math.h"
		42
		43	/**
		44	* @ingroup groupMath
		45	*/
		46
		47	/**
		48	* @addtogroup dot_prod
		49	* @{
		50	*/
		51
		52	/**
		53	* @brief Dot product of Q7 vectors.
		54	* @param[in] *pSrcA points to the first input vector
		55	* @param[in] *pSrcB points to the second input vector
		56	* @param[in] blockSize number of samples in each vector
		57	* @param[out] *result output result returned here
		58	* @return none.
		59	*
		60	* <b>Scaling and Overflow Behavior:</b>
		61	* \par
		62	* The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
		63	* results are added to an accumulator in 18.14 format.
		64	* Nonsaturating additions are used and there is no danger of wrap around as long as
		65	* the vectors are less than 2^18 elements long.
		66	* The return result is in 18.14 format.
		67	*/
		68
		69	void arm_dot_prod_q7(
		70	q7_t * pSrcA,
		71	q7_t * pSrcB,
		72	uint32_t blockSize,
		73	q31_t * result)
		74	{
		75	uint32_t blkCnt; /* loop counter */
		76
		77	q31_t sum = 0; /* Temporary variables to store output */
		78
		79	#ifndef ARM_MATH_CM0_FAMILY
		80
		81	/* Run the below code for Cortex-M4 and Cortex-M3 */
		82
		83	q31_t input1, input2; /* Temporary variables to store input */
		84	q31_t inA1, inA2, inB1, inB2; /* Temporary variables to store input */
		85
		86
		87
		88	/loop Unrolling /
		89	blkCnt = blockSize >> 2u;
		90
		91	/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
		92	** a second loop below computes the remaining 1 to 3 samples. */
		93	while(blkCnt > 0u)
		94	{
		95	/* read 4 samples at a time from sourceA */
		96	input1 = *__SIMD32(pSrcA)++;
		97	/* read 4 samples at a time from sourceB */
		98	input2 = *__SIMD32(pSrcB)++;
		99
		100	/* extract two q7_t samples to q15_t samples */
		101	inA1 = __SXTB16(__ROR(input1, 8));
		102	/* extract reminaing two samples */
		103	inA2 = __SXTB16(input1);
		104	/* extract two q7_t samples to q15_t samples */
		105	inB1 = __SXTB16(__ROR(input2, 8));
		106	/* extract reminaing two samples */
		107	inB2 = __SXTB16(input2);
		108
		109	/* multiply and accumulate two samples at a time */
		110	sum = __SMLAD(inA1, inB1, sum);
		111	sum = __SMLAD(inA2, inB2, sum);
		112
		113	/* Decrement the loop counter */
		114	blkCnt--;
		115	}
		116
		117	/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
		118	** No loop unrolling is used. */
		119	blkCnt = blockSize % 0x4u;
		120
		121	while(blkCnt > 0u)
		122	{
		123	/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
		124	/* Dot product and then store the results in a temporary buffer. */
		125	sum = __SMLAD(pSrcA++, pSrcB++, sum);
		126
		127	/* Decrement the loop counter */
		128	blkCnt--;
		129	}
		130
		131	#else
		132
		133	/* Run the below code for Cortex-M0 */
		134
		135
		136
		137	/* Initialize blkCnt with number of samples */
		138	blkCnt = blockSize;
		139
		140	while(blkCnt > 0u)
		141	{
		142	/* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
		143	/* Dot product and then store the results in a temporary buffer. */
		144	sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++);
		145
		146	/* Decrement the loop counter */
		147	blkCnt--;
		148	}
		149
		150	#endif /* #ifndef ARM_MATH_CM0_FAMILY */
		151
		152
		153	/* Store the result in the destination buffer in 18.14 format */
		154	*result = sum;
		155	}
		156
		157	/**
		158	* @} end of dot_prod group
		159	*/

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