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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1 | mjames | 1 | /* $Header: c:/cvsroot/bart/rt_int.h,v 1.4 2004/03/10 20:13:45 mjames Exp $ */ |
| 2 | /* |
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| 3 | * $Log: rt_int.h,v $ |
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| 4 | * Revision 1.4 2004/03/10 20:13:45 mjames |
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| 5 | * Correcting hard flow |
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| 6 | * |
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| 7 | * Revision 1.3 2004/03/09 22:09:10 mjames |
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| 8 | * Hardware flow control implemented |
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| 9 | * |
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| 10 | * Revision 1.2 2004/03/06 12:17:48 mjames |
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| 11 | * Moved headers around, made it clearer that there are no configurable |
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| 12 | * parts to the OS unless it is rebuilt |
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| 13 | * |
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| 14 | */ |
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| 15 | |||
| 16 | /************************************************************************/ |
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| 17 | |||
| 18 | /** CPU clock */ |
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| 19 | #define SYSCLK 11052000 |
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| 20 | /** Option for X2 mode */ |
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| 21 | #define CPU_IS_X2 |
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| 22 | /** Option for serial */ |
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| 23 | #define SERIAL_IS_X2 |
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| 24 | |||
| 25 | /******************************************************************************/ |
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| 26 | |||
| 27 | /* the serial rates */ |
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| 28 | /** The full duplex interface can do */ |
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| 29 | #define SIO1_BAUD 19200 |
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| 30 | |||
| 31 | /** The half duplex interface */ |
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| 32 | #define SIO2_BAUD 4800 |
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| 33 | #undef SIO2_TX_EN /**< If turned on then the SIO2 will be a half duplex port */ |
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| 34 | |||
| 35 | /******************************************************************************/ |
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| 36 | /* Pin assignments on processor */ |
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| 37 | |||
| 38 | #undef SOFT_FLOW /**< If fdefined use XON/XOFF */ |
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| 39 | #define HARD_FLOW /**< If defined then use RTS/CTS */ |
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| 40 | |||
| 41 | #define SIO1_TXD TXD /**< This pin MUST remain fixed here */ |
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| 42 | #define SIO1_RXD RXD /**< This pin MUST remain fixed here */ |
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| 43 | |||
| 44 | /* flow control pin functions to do with serial */ |
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| 45 | #if defined HARD_FLOW |
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| 46 | #define SIO1_CTS P1_5 /**< flow out: This pin can be redefined */ |
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| 47 | #define SIO1_RTS P1_4 /**< flow in : This pin can be redefined */ |
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| 48 | #endif |
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| 49 | |||
| 50 | #define SIO2_RXD P1_1 /**< This pin MUST remain fixed here */ |
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| 51 | #define SIO2_TXD P1_6 /**< This pin can be redefined */ |
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| 52 | |||
| 53 | |||
| 54 | #define PRESCALE (SYSCLK/(32*6)) |
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| 55 | |||
| 56 | #define PRESCALE2 (SYSCLK/(12)) |
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| 57 |