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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32l1xx_hal_spi_ex.c |
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4 | * @author MCD Application Team |
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5 | * @version V1.2.0 |
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6 | * @date 01-July-2016 |
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7 | * @brief Extended SPI HAL module driver. |
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8 | * |
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9 | * This file provides firmware functions to manage the following |
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10 | * functionalities SPI extension peripheral: |
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11 | * + Extended Peripheral Control functions |
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12 | * |
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13 | ****************************************************************************** |
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14 | * @attention |
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15 | * |
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16 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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17 | * |
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18 | * Redistribution and use in source and binary forms, with or without modification, |
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19 | * are permitted provided that the following conditions are met: |
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20 | * 1. Redistributions of source code must retain the above copyright notice, |
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21 | * this list of conditions and the following disclaimer. |
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22 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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23 | * this list of conditions and the following disclaimer in the documentation |
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24 | * and/or other materials provided with the distribution. |
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25 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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26 | * may be used to endorse or promote products derived from this software |
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27 | * without specific prior written permission. |
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28 | * |
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29 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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30 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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31 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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32 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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33 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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34 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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35 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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37 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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38 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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39 | * |
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40 | ****************************************************************************** |
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41 | */ |
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42 | |||
43 | /* Includes ------------------------------------------------------------------*/ |
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44 | #include "stm32l1xx_hal.h" |
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45 | |||
46 | /** @addtogroup STM32L1xx_HAL_Driver |
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47 | * @{ |
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48 | */ |
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49 | |||
50 | /** @addtogroup SPI |
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51 | * @{ |
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52 | */ |
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53 | #ifdef HAL_SPI_MODULE_ENABLED |
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54 | |||
55 | /* Private typedef -----------------------------------------------------------*/ |
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56 | /* Private define ------------------------------------------------------------*/ |
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57 | /* Private macro -------------------------------------------------------------*/ |
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58 | /* Private variables ---------------------------------------------------------*/ |
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59 | /* Private function prototypes -----------------------------------------------*/ |
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60 | /* Private functions ---------------------------------------------------------*/ |
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61 | |||
62 | /** @addtogroup SPI_Exported_Functions |
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63 | * @{ |
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64 | */ |
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65 | |||
66 | /** @addtogroup SPI_Exported_Functions_Group1 |
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67 | * |
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68 | * @{ |
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69 | */ |
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70 | |||
71 | /** |
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72 | * @brief Initializes the SPI according to the specified parameters |
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73 | * in the SPI_InitTypeDef and create the associated handle. |
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74 | * @param hspi: pointer to a SPI_HandleTypeDef structure that contains |
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75 | * the configuration information for SPI module. |
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76 | * @retval HAL status |
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77 | */ |
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78 | HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) |
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79 | { |
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80 | /* Check the SPI handle allocation */ |
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81 | if(hspi == NULL) |
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82 | { |
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83 | return HAL_ERROR; |
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84 | } |
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85 | |||
86 | /* Check the parameters */ |
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87 | assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance)); |
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88 | assert_param(IS_SPI_MODE(hspi->Init.Mode)); |
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89 | assert_param(IS_SPI_DIRECTION_MODE(hspi->Init.Direction)); |
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90 | assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize)); |
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91 | assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity)); |
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92 | assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); |
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93 | assert_param(IS_SPI_NSS(hspi->Init.NSS)); |
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94 | assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); |
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95 | assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); |
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96 | assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); |
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97 | assert_param(IS_SPI_CRC_CALCULATION(hspi->Init.CRCCalculation)); |
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98 | assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial)); |
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99 | |||
100 | if(hspi->State == HAL_SPI_STATE_RESET) |
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101 | { |
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102 | /* Allocate lock resource and initialize it */ |
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103 | hspi->Lock = HAL_UNLOCKED; |
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104 | |||
105 | /* Init the low level hardware : GPIO, CLOCK, NVIC... */ |
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106 | HAL_SPI_MspInit(hspi); |
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107 | } |
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108 | |||
109 | hspi->State = HAL_SPI_STATE_BUSY; |
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110 | |||
111 | /* Disble the selected SPI peripheral */ |
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112 | __HAL_SPI_DISABLE(hspi); |
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113 | |||
114 | /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/ |
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115 | /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management, |
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116 | Communication speed, First bit and CRC calculation state */ |
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117 | hspi->Instance->CR1 = (hspi->Init.Mode | hspi->Init.Direction | hspi->Init.DataSize | |
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118 | hspi->Init.CLKPolarity | hspi->Init.CLKPhase | (hspi->Init.NSS & SPI_CR1_SSM) | |
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119 | hspi->Init.BaudRatePrescaler | hspi->Init.FirstBit | hspi->Init.CRCCalculation); |
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120 | |||
121 | /* Configure : NSS management */ |
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122 | hspi->Instance->CR2 = (((hspi->Init.NSS >> 16) & SPI_CR2_SSOE) | hspi->Init.TIMode); |
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123 | |||
124 | /*---------------------------- SPIx CRCPOLY Configuration ------------------*/ |
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125 | /* Configure : CRC Polynomial */ |
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126 | hspi->Instance->CRCPR = hspi->Init.CRCPolynomial; |
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127 | |||
128 | #if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) |
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129 | /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */ |
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130 | CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD); |
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131 | #endif |
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132 | |||
133 | hspi->ErrorCode = HAL_SPI_ERROR_NONE; |
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134 | hspi->State = HAL_SPI_STATE_READY; |
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135 | |||
136 | return HAL_OK; |
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137 | } |
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138 | |||
139 | /** |
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140 | * @} |
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141 | */ |
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142 | |||
143 | /** |
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144 | * @} |
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145 | */ |
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146 | |||
147 | #endif /* HAL_SPI_MODULE_ENABLED */ |
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148 | /** |
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149 | * @} |
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150 | */ |
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151 | |||
152 | /** |
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153 | * @} |
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154 | */ |
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155 | |||
156 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |