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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32l1xx_hal_flash_ramfunc.c |
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4 | * @author MCD Application Team |
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5 | * @brief FLASH RAMFUNC driver. |
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6 | * This file provides a Flash firmware functions which should be |
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7 | * executed from internal SRAM |
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8 | * |
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9 | * @verbatim |
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10 | |||
11 | *** ARM Compiler *** |
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12 | -------------------- |
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13 | [..] RAM functions are defined using the toolchain options. |
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14 | Functions that are be executed in RAM should reside in a separate |
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15 | source module. Using the 'Options for File' dialog you can simply change |
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16 | the 'Code / Const' area of a module to a memory space in physical RAM. |
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17 | Available memory areas are declared in the 'Target' tab of the |
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18 | Options for Target' dialog. |
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19 | |||
20 | *** ICCARM Compiler *** |
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21 | ----------------------- |
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22 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc". |
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23 | |||
24 | *** GNU Compiler *** |
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25 | -------------------- |
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26 | [..] RAM functions are defined using a specific toolchain attribute |
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27 | "__attribute__((section(".RamFunc")))". |
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28 | |||
29 | @endverbatim |
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30 | ****************************************************************************** |
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31 | * @attention |
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32 | * |
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28 | mjames | 33 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
34 | * All rights reserved.</center></h2> |
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2 | mjames | 35 | * |
28 | mjames | 36 | * This software component is licensed by ST under BSD 3-Clause license, |
37 | * the "License"; You may not use this file except in compliance with the |
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38 | * License. You may obtain a copy of the License at: |
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39 | * opensource.org/licenses/BSD-3-Clause |
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2 | mjames | 40 | * |
41 | ****************************************************************************** |
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42 | */ |
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43 | |||
44 | /* Includes ------------------------------------------------------------------*/ |
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45 | #include "stm32l1xx_hal.h" |
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46 | |||
47 | /** @addtogroup STM32L1xx_HAL_Driver |
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48 | * @{ |
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49 | */ |
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50 | |||
51 | #ifdef HAL_FLASH_MODULE_ENABLED |
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52 | |||
53 | /** @addtogroup FLASH |
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54 | * @{ |
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55 | */ |
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56 | /** @addtogroup FLASH_Private_Variables |
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57 | * @{ |
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58 | */ |
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59 | extern FLASH_ProcessTypeDef pFlash; |
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60 | /** |
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61 | * @} |
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62 | */ |
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63 | |||
64 | /** |
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65 | * @} |
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66 | */ |
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67 | |||
68 | /** @defgroup FLASH_RAMFUNC FLASH_RAMFUNC |
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69 | * @brief FLASH functions executed from RAM |
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70 | * @{ |
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71 | */ |
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72 | |||
73 | |||
74 | /* Private typedef -----------------------------------------------------------*/ |
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75 | /* Private define ------------------------------------------------------------*/ |
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76 | /* Private macro -------------------------------------------------------------*/ |
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77 | /* Private variables ---------------------------------------------------------*/ |
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78 | /* Private function prototypes -----------------------------------------------*/ |
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79 | /** @defgroup FLASH_RAMFUNC_Private_Functions FLASH RAM Private Functions |
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80 | * @{ |
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81 | */ |
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82 | |||
28 | mjames | 83 | static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_WaitForLastOperation(uint32_t Timeout); |
84 | static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_SetErrorCode(void); |
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2 | mjames | 85 | |
86 | /** |
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87 | * @} |
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88 | */ |
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89 | |||
90 | /* Private functions ---------------------------------------------------------*/ |
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91 | |||
92 | /** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH RAM Exported Functions |
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93 | * |
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94 | @verbatim |
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95 | =============================================================================== |
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96 | ##### ramfunc functions ##### |
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97 | =============================================================================== |
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98 | [..] |
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99 | This subsection provides a set of functions that should be executed from RAM |
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100 | transfers. |
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101 | |||
102 | @endverbatim |
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103 | * @{ |
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104 | */ |
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105 | |||
106 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions |
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107 | * @{ |
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108 | */ |
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109 | |||
110 | /** |
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111 | * @brief Enable the power down mode during RUN mode. |
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112 | * @note This function can be used only when the user code is running from Internal SRAM. |
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113 | * @retval HAL status |
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114 | */ |
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28 | mjames | 115 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableRunPowerDown(void) |
2 | mjames | 116 | { |
117 | /* Enable the Power Down in Run mode*/ |
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118 | __HAL_FLASH_POWER_DOWN_ENABLE(); |
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119 | |||
120 | return HAL_OK; |
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121 | } |
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122 | |||
123 | /** |
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124 | * @brief Disable the power down mode during RUN mode. |
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125 | * @note This function can be used only when the user code is running from Internal SRAM. |
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126 | * @retval HAL status |
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127 | */ |
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28 | mjames | 128 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableRunPowerDown(void) |
2 | mjames | 129 | { |
130 | /* Disable the Power Down in Run mode*/ |
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131 | __HAL_FLASH_POWER_DOWN_DISABLE(); |
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132 | |||
133 | return HAL_OK; |
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134 | } |
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135 | |||
136 | /** |
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137 | * @} |
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138 | */ |
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139 | |||
140 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group2 Programming and erasing operation functions |
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141 | * |
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142 | @verbatim |
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143 | @endverbatim |
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144 | * @{ |
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145 | */ |
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146 | |||
147 | #if defined(FLASH_PECR_PARALLBANK) |
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148 | /** |
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149 | * @brief Erases a specified 2 pages in program memory in parallel. |
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150 | * @note This function can be used only for STM32L151xD, STM32L152xD), STM32L162xD and Cat5 devices. |
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151 | * To correctly run this function, the @ref HAL_FLASH_Unlock() function |
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152 | * must be called before. |
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153 | * Call the @ref HAL_FLASH_Lock() to disable the flash memory access |
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154 | * (recommended to protect the FLASH memory against possible unwanted operation). |
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155 | * @param Page_Address1: The page address in program memory to be erased in |
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156 | * the first Bank (BANK1). This parameter should be between FLASH_BASE |
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157 | * and FLASH_BANK1_END. |
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158 | * @param Page_Address2: The page address in program memory to be erased in |
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159 | * the second Bank (BANK2). This parameter should be between FLASH_BANK2_BASE |
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160 | * and FLASH_BANK2_END. |
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161 | * @note A Page is erased in the Program memory only if the address to load |
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162 | * is the start address of a page (multiple of @ref FLASH_PAGE_SIZE bytes). |
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163 | * @retval HAL status |
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164 | */ |
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28 | mjames | 165 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EraseParallelPage(uint32_t Page_Address1, uint32_t Page_Address2) |
2 | mjames | 166 | { |
167 | HAL_StatusTypeDef status = HAL_OK; |
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168 | |||
169 | /* Wait for last operation to be completed */ |
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170 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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171 | |||
172 | if(status == HAL_OK) |
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173 | { |
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174 | /* Proceed to erase the page */ |
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175 | SET_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); |
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176 | SET_BIT(FLASH->PECR, FLASH_PECR_ERASE); |
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177 | SET_BIT(FLASH->PECR, FLASH_PECR_PROG); |
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178 | |||
179 | /* Write 00000000h to the first word of the first program page to erase */ |
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28 | mjames | 180 | *(__IO uint32_t *)Page_Address1 = 0x00000000U; |
2 | mjames | 181 | /* Write 00000000h to the first word of the second program page to erase */ |
28 | mjames | 182 | *(__IO uint32_t *)Page_Address2 = 0x00000000U; |
2 | mjames | 183 | |
184 | /* Wait for last operation to be completed */ |
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185 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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186 | |||
187 | /* If the erase operation is completed, disable the ERASE, PROG and PARALLBANK bits */ |
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188 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); |
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189 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE); |
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190 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); |
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191 | } |
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192 | /* Return the Erase Status */ |
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193 | return status; |
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194 | } |
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195 | |||
196 | /** |
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197 | * @brief Program 2 half pages in program memory in parallel (half page size is 32 Words). |
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198 | * @note This function can be used only for STM32L151xD, STM32L152xD), STM32L162xD and Cat5 devices. |
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199 | * @param Address1: specifies the first address to be written in the first bank |
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200 | * (BANK1). This parameter should be between FLASH_BASE and (FLASH_BANK1_END - FLASH_PAGE_SIZE). |
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201 | * @param pBuffer1: pointer to the buffer containing the data to be written |
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202 | * to the first half page in the first bank. |
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203 | * @param Address2: specifies the second address to be written in the second bank |
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204 | * (BANK2). This parameter should be between FLASH_BANK2_BASE and (FLASH_BANK2_END - FLASH_PAGE_SIZE). |
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205 | * @param pBuffer2: pointer to the buffer containing the data to be written |
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206 | * to the second half page in the second bank. |
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207 | * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function |
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208 | * must be called before. |
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209 | * Call the @ref HAL_FLASH_Lock() to disable the flash memory access |
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210 | * (recommended to protect the FLASH memory against possible unwanted operation). |
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211 | * @note Half page write is possible only from SRAM. |
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212 | * @note If there are more than 32 words to write, after 32 words another |
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213 | * Half Page programming operation starts and has to be finished. |
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214 | * @note A half page is written to the program memory only if the first |
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215 | * address to load is the start address of a half page (multiple of 128 |
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216 | * bytes) and the 31 remaining words to load are in the same half page. |
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217 | * @note During the Program memory half page write all read operations are |
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218 | * forbidden (this includes DMA read operations and debugger read |
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219 | * operations such as breakpoints, periodic updates, etc.). |
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220 | * @note If a PGAERR is set during a Program memory half page write, the |
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221 | * complete write operation is aborted. Software should then reset the |
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222 | * FPRG and PROG/DATA bits and restart the write operation from the |
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223 | * beginning. |
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224 | * @retval HAL status |
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225 | */ |
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28 | mjames | 226 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuffer1, uint32_t Address2, uint32_t* pBuffer2) |
2 | mjames | 227 | { |
28 | mjames | 228 | uint32_t primask_bit; |
229 | uint32_t count = 0U; |
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2 | mjames | 230 | HAL_StatusTypeDef status = HAL_OK; |
231 | |||
232 | /* Wait for last operation to be completed */ |
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233 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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234 | |||
235 | if(status == HAL_OK) |
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236 | { |
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28 | mjames | 237 | /* Disable all IRQs */ |
238 | primask_bit = __get_PRIMASK(); |
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239 | __disable_irq(); |
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240 | |||
2 | mjames | 241 | /* Proceed to program the new half page */ |
242 | SET_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); |
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243 | SET_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
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244 | SET_BIT(FLASH->PECR, FLASH_PECR_PROG); |
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245 | |||
28 | mjames | 246 | /* Write the first half page directly with 32 different words */ |
247 | while(count < 32U) |
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248 | { |
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249 | *(__IO uint32_t*) ((uint32_t)(Address1 + (4 * count))) = *pBuffer1; |
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250 | pBuffer1++; |
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251 | count ++; |
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252 | } |
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253 | |||
254 | /* Write the second half page directly with 32 different words */ |
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255 | count = 0U; |
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256 | while(count < 32U) |
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257 | { |
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258 | *(__IO uint32_t*) ((uint32_t)(Address2 + (4 * count))) = *pBuffer2; |
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259 | pBuffer2++; |
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260 | count ++; |
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261 | } |
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262 | |||
2 | mjames | 263 | /* Wait for last operation to be completed */ |
264 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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28 | mjames | 265 | |
2 | mjames | 266 | /* if the write operation is completed, disable the PROG, FPRG and PARALLBANK bits */ |
267 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); |
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268 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
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269 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); |
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28 | mjames | 270 | |
271 | /* Enable IRQs */ |
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272 | __set_PRIMASK(primask_bit); |
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2 | mjames | 273 | } |
274 | |||
275 | /* Return the Write Status */ |
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276 | return status; |
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277 | } |
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278 | #endif /* FLASH_PECR_PARALLBANK */ |
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279 | |||
280 | /** |
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281 | * @brief Program a half page in program memory. |
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28 | mjames | 282 | * @param Address specifies the address to be written. |
283 | * @param pBuffer pointer to the buffer containing the data to be written to |
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2 | mjames | 284 | * the half page. |
285 | * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function |
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286 | * must be called before. |
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287 | * Call the @ref HAL_FLASH_Lock() to disable the flash memory access |
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288 | * (recommended to protect the FLASH memory against possible unwanted operation) |
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289 | * @note Half page write is possible only from SRAM. |
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290 | * @note If there are more than 32 words to write, after 32 words another |
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291 | * Half Page programming operation starts and has to be finished. |
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292 | * @note A half page is written to the program memory only if the first |
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293 | * address to load is the start address of a half page (multiple of 128 |
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294 | * bytes) and the 31 remaining words to load are in the same half page. |
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295 | * @note During the Program memory half page write all read operations are |
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296 | * forbidden (this includes DMA read operations and debugger read |
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297 | * operations such as breakpoints, periodic updates, etc.). |
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298 | * @note If a PGAERR is set during a Program memory half page write, the |
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299 | * complete write operation is aborted. Software should then reset the |
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300 | * FPRG and PROG/DATA bits and restart the write operation from the |
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301 | * beginning. |
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302 | * @retval HAL status |
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303 | */ |
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28 | mjames | 304 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_HalfPageProgram(uint32_t Address, uint32_t* pBuffer) |
2 | mjames | 305 | { |
28 | mjames | 306 | uint32_t primask_bit; |
307 | uint32_t count = 0U; |
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2 | mjames | 308 | HAL_StatusTypeDef status = HAL_OK; |
309 | |||
310 | /* Wait for last operation to be completed */ |
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311 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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312 | |||
313 | if(status == HAL_OK) |
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314 | { |
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28 | mjames | 315 | /* Disable all IRQs */ |
316 | primask_bit = __get_PRIMASK(); |
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317 | __disable_irq(); |
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318 | |||
2 | mjames | 319 | /* Proceed to program the new half page */ |
320 | SET_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
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321 | SET_BIT(FLASH->PECR, FLASH_PECR_PROG); |
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322 | |||
323 | /* Write one half page directly with 32 different words */ |
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28 | mjames | 324 | while(count < 32U) |
2 | mjames | 325 | { |
326 | *(__IO uint32_t*) ((uint32_t)(Address + (4 * count))) = *pBuffer; |
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327 | pBuffer++; |
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328 | count ++; |
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329 | } |
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330 | |||
331 | /* Wait for last operation to be completed */ |
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332 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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333 | |||
334 | /* If the write operation is completed, disable the PROG and FPRG bits */ |
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335 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); |
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336 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
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28 | mjames | 337 | |
338 | /* Enable IRQs */ |
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339 | __set_PRIMASK(primask_bit); |
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2 | mjames | 340 | } |
28 | mjames | 341 | |
2 | mjames | 342 | /* Return the Write Status */ |
343 | return status; |
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344 | } |
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345 | |||
346 | /** |
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347 | * @} |
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348 | */ |
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349 | |||
350 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group3 Peripheral errors functions |
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351 | * @brief Peripheral errors functions |
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352 | * |
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353 | @verbatim |
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354 | =============================================================================== |
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355 | ##### Peripheral errors functions ##### |
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356 | =============================================================================== |
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357 | [..] |
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358 | This subsection permit to get in run-time errors of the FLASH peripheral. |
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359 | |||
360 | @endverbatim |
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361 | * @{ |
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362 | */ |
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363 | |||
364 | /** |
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365 | * @brief Get the specific FLASH errors flag. |
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366 | * @param Error pointer is the error value. It can be a mixed of: |
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367 | @if STM32L100xB |
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368 | @elif STM32L100xBA |
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369 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
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370 | @elif STM32L151xB |
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371 | @elif STM32L151xBA |
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372 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
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373 | @elif STM32L152xB |
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374 | @elif STM32L152xBA |
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375 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
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376 | @elif STM32L100xC |
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377 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
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378 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
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379 | @elif STM32L151xC |
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380 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
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381 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
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382 | @elif STM32L152xC |
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383 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
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384 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
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385 | @elif STM32L162xC |
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386 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
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387 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
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388 | @else |
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389 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
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390 | @endif |
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391 | * @arg @ref HAL_FLASH_ERROR_PGA FLASH Programming Alignment error flag |
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392 | * @arg @ref HAL_FLASH_ERROR_WRP FLASH Write protected error flag |
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393 | * @arg @ref HAL_FLASH_ERROR_OPTV FLASH Option valid error flag |
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394 | * @retval HAL Status |
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395 | */ |
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28 | mjames | 396 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_GetError(uint32_t * Error) |
2 | mjames | 397 | { |
398 | *Error = pFlash.ErrorCode; |
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399 | return HAL_OK; |
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400 | } |
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401 | |||
402 | /** |
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403 | * @} |
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404 | */ |
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405 | |||
406 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group4 DATA EEPROM functions |
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407 | * |
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408 | * @{ |
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409 | */ |
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410 | |||
411 | /** |
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412 | * @brief Erase a double word in data memory. |
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28 | mjames | 413 | * @param Address specifies the address to be erased. |
2 | mjames | 414 | * @note To correctly run this function, the HAL_FLASH_EEPROM_Unlock() function |
415 | * must be called before. |
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416 | * Call the HAL_FLASH_EEPROM_Lock() to he data EEPROM access |
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417 | * and Flash program erase control register access(recommended to protect |
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418 | * the DATA_EEPROM against possible unwanted operation). |
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419 | * @note Data memory double word erase is possible only from SRAM. |
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420 | * @note A double word is erased to the data memory only if the first address |
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421 | * to load is the start address of a double word (multiple of 8 bytes). |
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422 | * @note During the Data memory double word erase, all read operations are |
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423 | * forbidden (this includes DMA read operations and debugger read |
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424 | * operations such as breakpoints, periodic updates, etc.). |
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425 | * @retval HAL status |
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426 | */ |
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427 | |||
28 | mjames | 428 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_EraseDoubleWord(uint32_t Address) |
2 | mjames | 429 | { |
28 | mjames | 430 | uint32_t primask_bit; |
2 | mjames | 431 | HAL_StatusTypeDef status = HAL_OK; |
432 | |||
433 | /* Wait for last operation to be completed */ |
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434 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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435 | |||
436 | if(status == HAL_OK) |
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437 | { |
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28 | mjames | 438 | /* Disable all IRQs */ |
439 | primask_bit = __get_PRIMASK(); |
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440 | __disable_irq(); |
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441 | |||
2 | mjames | 442 | /* If the previous operation is completed, proceed to erase the next double word */ |
443 | /* Set the ERASE bit */ |
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444 | SET_BIT(FLASH->PECR, FLASH_PECR_ERASE); |
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445 | |||
446 | /* Set DATA bit */ |
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447 | SET_BIT(FLASH->PECR, FLASH_PECR_DATA); |
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448 | |||
449 | /* Write 00000000h to the 2 words to erase */ |
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28 | mjames | 450 | *(__IO uint32_t *)Address = 0x00000000U; |
451 | Address += 4U; |
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452 | *(__IO uint32_t *)Address = 0x00000000U; |
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2 | mjames | 453 | |
454 | /* Wait for last operation to be completed */ |
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455 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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456 | |||
457 | /* If the erase operation is completed, disable the ERASE and DATA bits */ |
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458 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE); |
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459 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_DATA); |
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28 | mjames | 460 | |
461 | /* Enable IRQs */ |
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462 | __set_PRIMASK(primask_bit); |
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463 | |||
2 | mjames | 464 | } |
28 | mjames | 465 | |
2 | mjames | 466 | /* Return the erase status */ |
467 | return status; |
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468 | } |
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469 | |||
470 | /** |
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471 | * @brief Write a double word in data memory without erase. |
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28 | mjames | 472 | * @param Address specifies the address to be written. |
473 | * @param Data specifies the data to be written. |
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2 | mjames | 474 | * @note To correctly run this function, the HAL_FLASH_EEPROM_Unlock() function |
475 | * must be called before. |
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476 | * Call the HAL_FLASH_EEPROM_Lock() to he data EEPROM access |
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477 | * and Flash program erase control register access(recommended to protect |
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478 | * the DATA_EEPROM against possible unwanted operation). |
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479 | * @note Data memory double word write is possible only from SRAM. |
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480 | * @note A data memory double word is written to the data memory only if the |
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481 | * first address to load is the start address of a double word (multiple |
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482 | * of double word). |
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483 | * @note During the Data memory double word write, all read operations are |
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484 | * forbidden (this includes DMA read operations and debugger read |
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485 | * operations such as breakpoints, periodic updates, etc.). |
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486 | * @retval HAL status |
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487 | */ |
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28 | mjames | 488 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_ProgramDoubleWord(uint32_t Address, uint64_t Data) |
2 | mjames | 489 | { |
28 | mjames | 490 | uint32_t primask_bit; |
2 | mjames | 491 | HAL_StatusTypeDef status = HAL_OK; |
492 | |||
493 | /* Wait for last operation to be completed */ |
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494 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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495 | |||
496 | if(status == HAL_OK) |
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497 | { |
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28 | mjames | 498 | /* Disable all IRQs */ |
499 | primask_bit = __get_PRIMASK(); |
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500 | __disable_irq(); |
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501 | |||
2 | mjames | 502 | /* If the previous operation is completed, proceed to program the new data*/ |
503 | SET_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
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504 | SET_BIT(FLASH->PECR, FLASH_PECR_DATA); |
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505 | |||
506 | /* Write the 2 words */ |
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507 | *(__IO uint32_t *)Address = (uint32_t) Data; |
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28 | mjames | 508 | Address += 4U; |
2 | mjames | 509 | *(__IO uint32_t *)Address = (uint32_t) (Data >> 32); |
28 | mjames | 510 | |
2 | mjames | 511 | /* Wait for last operation to be completed */ |
512 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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513 | |||
514 | /* If the write operation is completed, disable the FPRG and DATA bits */ |
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515 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
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516 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_DATA); |
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28 | mjames | 517 | |
518 | /* Enable IRQs */ |
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519 | __set_PRIMASK(primask_bit); |
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2 | mjames | 520 | } |
28 | mjames | 521 | |
2 | mjames | 522 | /* Return the Write Status */ |
523 | return status; |
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524 | } |
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525 | |||
526 | /** |
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527 | * @} |
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528 | */ |
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529 | |||
530 | /** |
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531 | * @} |
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532 | */ |
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533 | |||
534 | /** @addtogroup FLASH_RAMFUNC_Private_Functions |
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535 | * @{ |
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536 | */ |
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537 | |||
538 | /** |
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539 | * @brief Set the specific FLASH error flag. |
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540 | * @retval HAL Status |
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541 | */ |
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28 | mjames | 542 | static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_SetErrorCode(void) |
2 | mjames | 543 | { |
28 | mjames | 544 | uint32_t flags = 0U; |
2 | mjames | 545 | |
546 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) |
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547 | { |
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548 | pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; |
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549 | flags |= FLASH_FLAG_WRPERR; |
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550 | } |
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551 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) |
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552 | { |
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553 | pFlash.ErrorCode |= HAL_FLASH_ERROR_PGA; |
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554 | flags |= FLASH_FLAG_PGAERR; |
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555 | } |
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556 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) |
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557 | { |
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558 | pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; |
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559 | flags |= FLASH_FLAG_OPTVERR; |
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560 | } |
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561 | |||
562 | #if defined(FLASH_SR_RDERR) |
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563 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)) |
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564 | { |
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565 | pFlash.ErrorCode |= HAL_FLASH_ERROR_RD; |
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566 | flags |= FLASH_FLAG_RDERR; |
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567 | } |
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568 | #endif /* FLASH_SR_RDERR */ |
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569 | #if defined(FLASH_SR_OPTVERRUSR) |
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570 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERRUSR)) |
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571 | { |
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572 | pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTVUSR; |
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573 | flags |= FLASH_FLAG_OPTVERRUSR; |
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574 | } |
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575 | #endif /* FLASH_SR_OPTVERRUSR */ |
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576 | |||
577 | /* Clear FLASH error pending bits */ |
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578 | __HAL_FLASH_CLEAR_FLAG(flags); |
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579 | |||
580 | return HAL_OK; |
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581 | } |
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582 | |||
583 | /** |
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584 | * @brief Wait for a FLASH operation to complete. |
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28 | mjames | 585 | * @param Timeout maximum flash operationtimeout |
2 | mjames | 586 | * @retval HAL status |
587 | */ |
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28 | mjames | 588 | static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_WaitForLastOperation(uint32_t Timeout) |
2 | mjames | 589 | { |
590 | /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. |
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591 | Even if the FLASH operation fails, the BUSY flag will be reset and an error |
||
592 | flag will be set */ |
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593 | |||
28 | mjames | 594 | while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) && (Timeout != 0x00U)) |
2 | mjames | 595 | { |
596 | Timeout--; |
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597 | } |
||
598 | |||
28 | mjames | 599 | if(Timeout == 0x00U) |
2 | mjames | 600 | { |
601 | return HAL_TIMEOUT; |
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602 | } |
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603 | |||
604 | /* Check FLASH End of Operation flag */ |
||
605 | if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) |
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606 | { |
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607 | /* Clear FLASH End of Operation pending bit */ |
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608 | __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); |
||
609 | } |
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610 | |||
611 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || |
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612 | __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || |
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613 | #if defined(FLASH_SR_RDERR) |
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614 | __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) || |
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615 | #endif /* FLASH_SR_RDERR */ |
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616 | #if defined(FLASH_SR_OPTVERRUSR) |
||
617 | __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERRUSR) || |
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618 | #endif /* FLASH_SR_OPTVERRUSR */ |
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619 | __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) |
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620 | { |
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621 | /*Save the error code*/ |
||
622 | FLASHRAM_SetErrorCode(); |
||
623 | return HAL_ERROR; |
||
624 | } |
||
625 | |||
626 | /* There is no error flag set */ |
||
627 | return HAL_OK; |
||
628 | } |
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629 | |||
630 | /** |
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631 | * @} |
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632 | */ |
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633 | |||
634 | /** |
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635 | * @} |
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636 | */ |
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637 | |||
638 | #endif /* HAL_FLASH_MODULE_ENABLED */ |
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639 | /** |
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640 | * @} |
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641 | */ |
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642 | |||
643 | |||
644 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |