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2 mjames 1
/**
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  ******************************************************************************
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  * @file      startup_stm32l152xe.s
4
  * @author    MCD Application Team
5
  * @version   V2.2.0
6
  * @date      01-July-2016
7
  * @brief     STM32L152XE Devices vector table for 
8
  *            Atollic toolchain.
9
  *            This module performs:
10
  *                - Set the initial SP
11
  *                - Set the initial PC == Reset_Handler,
12
  *                - Set the vector table entries with the exceptions ISR address
13
  *                - Configure the clock system
14
  *                - Branches to main in the C library (which eventually
15
  *                  calls main()).
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  *            After Reset the Cortex-M3 processor is in Thread mode,
17
  *            priority is Privileged, and the Stack is set to Main.
18
  ******************************************************************************
19
  *
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  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
21
  *
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  * Redistribution and use in source and binary forms, with or without modification,
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  * are permitted provided that the following conditions are met:
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  *   1. Redistributions of source code must retain the above copyright notice,
25
  *      this list of conditions and the following disclaimer.
26
  *   2. Redistributions in binary form must reproduce the above copyright notice,
27
  *      this list of conditions and the following disclaimer in the documentation
28
  *      and/or other materials provided with the distribution.
29
  *   3. Neither the name of STMicroelectronics nor the names of its contributors
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  *      may be used to endorse or promote products derived from this software
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  *      without specific prior written permission.
32
  *
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  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
41
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
42
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43
  *
44
  ******************************************************************************
45
  */
46
 
47
  .syntax unified
48
  .cpu cortex-m3
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  .fpu softvfp
50
  .thumb
51
 
52
.global g_pfnVectors
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.global Default_Handler
54
 
55
/* start address for the initialization values of the .data section.
56
defined in linker script */
57
.word _sidata
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/* start address for the .data section. defined in linker script */
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.word _sdata
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/* end address for the .data section. defined in linker script */
61
.word _edata
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/* start address for the .bss section. defined in linker script */
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.word _sbss
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/* end address for the .bss section. defined in linker script */
65
.word _ebss
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.equ  BootRAM, 0xF108F85F
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/**
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 * @brief  This is the code that gets called when the processor first
70
 *          starts execution following a reset event. Only the absolutely
71
 *          necessary set is performed, after which the application
72
 *          supplied main() routine is called.
73
 * @param  None
74
 * @retval : None
75
*/
76
 
77
  .section .text.Reset_Handler
78
  .weak Reset_Handler
79
  .type Reset_Handler, %function
80
Reset_Handler:
81
 
82
/* Copy the data segment initializers from flash to SRAM */
83
  movs r1, #0
84
  b LoopCopyDataInit
85
 
86
CopyDataInit:
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  ldr r3, =_sidata
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  ldr r3, [r3, r1]
89
  str r3, [r0, r1]
90
  adds r1, r1, #4
91
 
92
LoopCopyDataInit:
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  ldr r0, =_sdata
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  ldr r3, =_edata
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  adds r2, r0, r1
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  cmp r2, r3
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  bcc CopyDataInit
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  ldr r2, =_sbss
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  b LoopFillZerobss
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/* Zero fill the bss segment. */
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FillZerobss:
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  movs r3, #0
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  str r3, [r2], #4
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105
LoopFillZerobss:
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  ldr r3, = _ebss
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  cmp r2, r3
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  bcc FillZerobss
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110
/* Call the clock system intitialization function.*/
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    bl  SystemInit
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/* Call static constructors */
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    bl __libc_init_array
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/* Call the application's entry point.*/
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  bl main
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  bx lr
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.size Reset_Handler, .-Reset_Handler
118
 
119
/**
120
 * @brief  This is the code that gets called when the processor receives an
121
 *         unexpected interrupt.  This simply enters an infinite loop, preserving
122
 *         the system state for examination by a debugger.
123
 *
124
 * @param  None
125
 * @retval : None
126
*/
127
    .section .text.Default_Handler,"ax",%progbits
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Default_Handler:
129
Infinite_Loop:
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  b Infinite_Loop
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  .size Default_Handler, .-Default_Handler
132
/******************************************************************************
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*
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* The minimal vector table for a Cortex M3.  Note that the proper constructs
135
* must be placed on this to ensure that it ends up at physical address
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* 0x0000.0000.
137
*
138
******************************************************************************/
139
   .section .isr_vector,"a",%progbits
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  .type g_pfnVectors, %object
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  .size g_pfnVectors, .-g_pfnVectors
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143
 
144
g_pfnVectors:
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  .word _estack
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  .word Reset_Handler
147
  .word NMI_Handler
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  .word HardFault_Handler
149
  .word MemManage_Handler
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  .word BusFault_Handler
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  .word UsageFault_Handler
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  .word 0
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  .word 0
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  .word 0
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  .word 0
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  .word SVC_Handler
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  .word DebugMon_Handler
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  .word 0
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  .word PendSV_Handler
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  .word SysTick_Handler
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  .word WWDG_IRQHandler
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  .word PVD_IRQHandler
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  .word TAMPER_STAMP_IRQHandler
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  .word RTC_WKUP_IRQHandler
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  .word FLASH_IRQHandler
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  .word RCC_IRQHandler
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  .word EXTI0_IRQHandler
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  .word EXTI1_IRQHandler
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  .word EXTI2_IRQHandler
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  .word EXTI3_IRQHandler
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  .word EXTI4_IRQHandler
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  .word DMA1_Channel1_IRQHandler
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  .word DMA1_Channel2_IRQHandler
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  .word DMA1_Channel3_IRQHandler
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  .word DMA1_Channel4_IRQHandler
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  .word DMA1_Channel5_IRQHandler
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  .word DMA1_Channel6_IRQHandler
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  .word DMA1_Channel7_IRQHandler
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  .word ADC1_IRQHandler
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  .word USB_HP_IRQHandler
181
  .word USB_LP_IRQHandler
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  .word DAC_IRQHandler
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  .word COMP_IRQHandler
184
  .word EXTI9_5_IRQHandler
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  .word LCD_IRQHandler  
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  .word TIM9_IRQHandler
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  .word TIM10_IRQHandler
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  .word TIM11_IRQHandler
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  .word TIM2_IRQHandler
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  .word TIM3_IRQHandler
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  .word TIM4_IRQHandler
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  .word I2C1_EV_IRQHandler
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  .word I2C1_ER_IRQHandler
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  .word I2C2_EV_IRQHandler
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  .word I2C2_ER_IRQHandler
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  .word SPI1_IRQHandler
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  .word SPI2_IRQHandler
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  .word USART1_IRQHandler
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  .word USART2_IRQHandler
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  .word USART3_IRQHandler
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  .word EXTI15_10_IRQHandler
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  .word RTC_Alarm_IRQHandler
203
  .word USB_FS_WKUP_IRQHandler
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  .word TIM6_IRQHandler
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  .word TIM7_IRQHandler
206
  .word 0
207
  .word TIM5_IRQHandler
208
  .word SPI3_IRQHandler
209
  .word UART4_IRQHandler
210
  .word UART5_IRQHandler
211
  .word DMA2_Channel1_IRQHandler
212
  .word DMA2_Channel2_IRQHandler
213
  .word DMA2_Channel3_IRQHandler
214
  .word DMA2_Channel4_IRQHandler
215
  .word DMA2_Channel5_IRQHandler
216
  .word 0
217
  .word COMP_ACQ_IRQHandler
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  .word 0
219
  .word 0
220
  .word 0
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  .word 0
222
  .word 0
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  .word BootRAM          /* @0x108. This is for boot in RAM mode for 
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                            STM32L152XE devices. */
225
 
226
/*******************************************************************************
227
*
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* Provide weak aliases for each Exception handler to the Default_Handler.
229
* As they are weak aliases, any function with the same name will override
230
* this definition.
231
*
232
*******************************************************************************/
233
 
234
  .weak NMI_Handler
235
  .thumb_set NMI_Handler,Default_Handler
236
 
237
  .weak HardFault_Handler
238
  .thumb_set HardFault_Handler,Default_Handler
239
 
240
  .weak MemManage_Handler
241
  .thumb_set MemManage_Handler,Default_Handler
242
 
243
  .weak BusFault_Handler
244
  .thumb_set BusFault_Handler,Default_Handler
245
 
246
  .weak UsageFault_Handler
247
  .thumb_set UsageFault_Handler,Default_Handler
248
 
249
  .weak SVC_Handler
250
  .thumb_set SVC_Handler,Default_Handler
251
 
252
  .weak DebugMon_Handler
253
  .thumb_set DebugMon_Handler,Default_Handler
254
 
255
  .weak PendSV_Handler
256
  .thumb_set PendSV_Handler,Default_Handler
257
 
258
  .weak SysTick_Handler
259
  .thumb_set SysTick_Handler,Default_Handler
260
 
261
  .weak WWDG_IRQHandler
262
  .thumb_set WWDG_IRQHandler,Default_Handler
263
 
264
  .weak PVD_IRQHandler
265
  .thumb_set PVD_IRQHandler,Default_Handler
266
 
267
  .weak TAMPER_STAMP_IRQHandler
268
  .thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
269
 
270
  .weak RTC_WKUP_IRQHandler
271
  .thumb_set RTC_WKUP_IRQHandler,Default_Handler
272
 
273
  .weak FLASH_IRQHandler
274
  .thumb_set FLASH_IRQHandler,Default_Handler
275
 
276
  .weak RCC_IRQHandler
277
  .thumb_set RCC_IRQHandler,Default_Handler
278
 
279
  .weak EXTI0_IRQHandler
280
  .thumb_set EXTI0_IRQHandler,Default_Handler
281
 
282
  .weak EXTI1_IRQHandler
283
  .thumb_set EXTI1_IRQHandler,Default_Handler
284
 
285
  .weak EXTI2_IRQHandler
286
  .thumb_set EXTI2_IRQHandler,Default_Handler
287
 
288
  .weak EXTI3_IRQHandler
289
  .thumb_set EXTI3_IRQHandler,Default_Handler
290
 
291
  .weak EXTI4_IRQHandler
292
  .thumb_set EXTI4_IRQHandler,Default_Handler
293
 
294
  .weak DMA1_Channel1_IRQHandler
295
  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
296
 
297
  .weak DMA1_Channel2_IRQHandler
298
  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
299
 
300
  .weak DMA1_Channel3_IRQHandler
301
  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
302
 
303
  .weak DMA1_Channel4_IRQHandler
304
  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
305
 
306
  .weak DMA1_Channel5_IRQHandler
307
  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
308
 
309
  .weak DMA1_Channel6_IRQHandler
310
  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
311
 
312
  .weak DMA1_Channel7_IRQHandler
313
  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
314
 
315
  .weak ADC1_IRQHandler
316
  .thumb_set ADC1_IRQHandler,Default_Handler
317
 
318
  .weak USB_HP_IRQHandler
319
  .thumb_set USB_HP_IRQHandler,Default_Handler
320
 
321
  .weak USB_LP_IRQHandler
322
  .thumb_set USB_LP_IRQHandler,Default_Handler
323
 
324
  .weak DAC_IRQHandler
325
  .thumb_set DAC_IRQHandler,Default_Handler
326
 
327
  .weak COMP_IRQHandler
328
  .thumb_set COMP_IRQHandler,Default_Handler
329
 
330
  .weak EXTI9_5_IRQHandler
331
  .thumb_set EXTI9_5_IRQHandler,Default_Handler
332
 
333
  .weak LCD_IRQHandler
334
  .thumb_set LCD_IRQHandler,Default_Handler  
335
 
336
  .weak TIM9_IRQHandler
337
  .thumb_set TIM9_IRQHandler,Default_Handler
338
 
339
  .weak TIM10_IRQHandler
340
  .thumb_set TIM10_IRQHandler,Default_Handler
341
 
342
  .weak TIM11_IRQHandler
343
  .thumb_set TIM11_IRQHandler,Default_Handler
344
 
345
  .weak TIM2_IRQHandler
346
  .thumb_set TIM2_IRQHandler,Default_Handler
347
 
348
  .weak TIM3_IRQHandler
349
  .thumb_set TIM3_IRQHandler,Default_Handler
350
 
351
  .weak TIM4_IRQHandler
352
  .thumb_set TIM4_IRQHandler,Default_Handler
353
 
354
  .weak I2C1_EV_IRQHandler
355
  .thumb_set I2C1_EV_IRQHandler,Default_Handler
356
 
357
  .weak I2C1_ER_IRQHandler
358
  .thumb_set I2C1_ER_IRQHandler,Default_Handler
359
 
360
  .weak I2C2_EV_IRQHandler
361
  .thumb_set I2C2_EV_IRQHandler,Default_Handler
362
 
363
  .weak I2C2_ER_IRQHandler
364
  .thumb_set I2C2_ER_IRQHandler,Default_Handler
365
 
366
  .weak SPI1_IRQHandler
367
  .thumb_set SPI1_IRQHandler,Default_Handler
368
 
369
  .weak SPI2_IRQHandler
370
  .thumb_set SPI2_IRQHandler,Default_Handler
371
 
372
  .weak USART1_IRQHandler
373
  .thumb_set USART1_IRQHandler,Default_Handler
374
 
375
  .weak USART2_IRQHandler
376
  .thumb_set USART2_IRQHandler,Default_Handler
377
 
378
  .weak USART3_IRQHandler
379
  .thumb_set USART3_IRQHandler,Default_Handler
380
 
381
  .weak EXTI15_10_IRQHandler
382
  .thumb_set EXTI15_10_IRQHandler,Default_Handler
383
 
384
  .weak RTC_Alarm_IRQHandler
385
  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
386
 
387
  .weak USB_FS_WKUP_IRQHandler
388
  .thumb_set USB_FS_WKUP_IRQHandler,Default_Handler
389
 
390
  .weak TIM6_IRQHandler
391
  .thumb_set TIM6_IRQHandler,Default_Handler
392
 
393
  .weak TIM7_IRQHandler
394
  .thumb_set TIM7_IRQHandler,Default_Handler
395
 
396
  .weak TIM5_IRQHandler
397
  .thumb_set TIM5_IRQHandler,Default_Handler
398
 
399
  .weak SPI3_IRQHandler
400
  .thumb_set SPI3_IRQHandler,Default_Handler
401
 
402
  .weak UART4_IRQHandler
403
  .thumb_set UART4_IRQHandler,Default_Handler
404
 
405
  .weak UART5_IRQHandler
406
  .thumb_set UART5_IRQHandler,Default_Handler
407
 
408
  .weak DMA2_Channel1_IRQHandler
409
  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
410
 
411
  .weak DMA2_Channel2_IRQHandler
412
  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
413
 
414
  .weak DMA2_Channel3_IRQHandler
415
  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
416
 
417
  .weak DMA2_Channel4_IRQHandler
418
  .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
419
 
420
  .weak DMA2_Channel5_IRQHandler
421
  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
422
 
423
  .weak COMP_ACQ_IRQHandler
424
   .thumb_set COMP_ACQ_IRQHandler,Default_Handler
425
 
426
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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