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2 mjames 1
/*
2
 * $id: c:\\cygwin\\cvsroot/vertical/cmdexec2.c,v 1.26 2001/10/31 16:23:22 mjames Exp $
3
 *
4
 * $Log: cmdexec2.c,v $
5
 * Revision 1.1.1.1  2003/11/04 23:34:57  mjames
6
 * Imported into local repositrory
7
 *
8
 * Revision 1.40  2003/01/02 21:37:14  mjames
9
 * Experiment on creating NOT_ROUTABLE_H and NOT_ROUTABLE_L
10
 * properties on the nets so that pin jumpers can be made without a problem.
11
 *
12
 * Still need to sort out pin assignments made to these not_routable nets
13
 * which will become legal in some cases so that pullups and pulldown
14
 * pins can be used on the FPGA.
15
 *
16
 * Revision 1.39  2002/09/30 13:23:53  MJAMES
17
 * Tidied up the set par , set all_par and del par commands to make them
18
 * all consistent with each other.
19
 *
20
 * Revision 1.38  2002/09/09 10:20:31  mjames
21
 * Removed set generic range and replaced it with a set generic value command
22
 * that takes both integers and ranges.
23
 *
24
 * Revision 1.37  2002/08/23 14:20:09  mjames
25
 * Added Require command,
26
 * modified edit ident and edit type commands comments to be more
27
 * helpful.
28
 *
29
 * Revision 1.36  2002/08/06 12:53:03  mjames
30
 * Merge in from latest version
31
 *
32
 * Revision 1.36  2002/03/08 14:56:14  mjames
33
 * Edited all of the commands in the cmdexec1.c and cmdexec2.c files
34
 * so that they can be read by doc2.pl
35
 *
36
 * Revision 1.35  2001/12/24 21:13:59  mjames
37
 * Added header includes to get correct declarations for all functions
38
 * called from command handlers
39
 *
40
 * Revision 1.34  2001/12/24 20:08:11  mjames
41
 * Added more information about ensure template command to help message
42
 *
43
 * Revision 1.33  2001/12/11 20:32:45  mjames
44
 * Implemented  regular expression pin  name editing
45
 *
46
 * Revision 1.32  2001/11/19 10:41:53  mjames
47
 * Merged back DTC release
48
 *
49
 * Revision 1.31  2001/11/19 10:39:47  mjames
50
 * Merge conflict resolution
51
 *
52
 * Revision 1.30  2001/11/09 22:14:44  mjames
53
 * Added in delete chip node connection command
54
 * In order to remove small number of chip pins in a large board
55
 * which have been damaged.
56
 *
57
 * Revision 1.29.2.1  2001/11/16 15:12:23  mjames
58
 * Altered modify_names command in response to TH request.
59
 *
60
 * Revision 1.29  2001/11/01 11:08:05  mjames
61
 * Changed help message on extract_templates call
62
 *
63
 * Revision 1.28  2001/10/31 22:28:27  mjames
64
 * Problems with regular expression argument lists.
65
 *
66
 * Revision 1.27  2001/10/31 22:20:00  mjames
67
 * Tidying up problematical comments caused by CVS
68
 * 'intelligent' comment guessing
69
 *
70
 * Revision 1.26  2001/10/31 16:23:22  mjames
71
 * Added a datastructure to hide regular expression information from programs.
72
 * Changed call to regexec to indicate 0 subexpressions to be matched
73
 * rather than a number dependent on strlen(string) which was wrong.
74
 *
75
 * Revision 1.25  2001/10/23 21:14:28  mjames
76
 * Added match_template command : purpose to remove connections
77
 * to device pins which do not exist in the template of that device.
78
 *
79
 * Modified set type_id to use wildcards (the only case where this applies)
80
 *
81
 * Revision 1.24  2001/10/18 21:36:01  mjames
82
 * Added modify pins command : nets inherit identifier from selected socket and pin on that
83
 *socket to ease cross referencing.
84
 *
85
 * Revision 1.23  2001/10/11 16:10:17  mjames
86
 * Corrections to the SWAP command, and printout so that
87
 * WRITE net now outputs all chips in the design so that their generics
88
 * can be passed forward to the next phase.
89
 *
90
 * Revision 1.22  2001/10/10 20:19:19  mjames
91
 * added echoq command to give quoted arguments for checking
92
 *
93
 * Revision 1.21  2001/10/07 20:50:54  mjames
94
 * Added wildcard checking (warn user about
95
 * using wildcard '*' on the end of a string in stead of wildcard '.*')
96
 *
97
 * Revision 1.20  2001/10/02 20:55:18  mjames
98
 * Edited help files to try and get them more up to date.
99
 *
100
 * Revision 1.19  2001/09/25 23:15:24  mjames
101
 * Converted wildcards to use proper regexp pattern match library
102
 *
103
 * Revision 1.18  2001/09/13 21:08:54  mjames
104
 * Added initial bundle/unbundle commands.
105
 *
106
 * Revision 1.17  2001/08/23 21:34:27  mjames
107
 * Added version command to list out all of the tags
108
 *
109
 * Revision 1.16  2001/08/23 20:34:12  mjames
110
 * Made sure that attempts to create duplicate socket identifiers or names fails with the set
111
 *id and set name commands.
112
 *
113
 * Revision 1.15  2001/08/23 20:06:30  mjames
114
 * Added 'reserve' command for use with preroute commands.
115
 * This command provides the 'correct' documented pin reservation
116
 * behaviour.
117
 *
118
 * Revision 1.14  2001/07/20 10:47:43  mjames
119
 * Allowed setting of pin routing group properties on pins on nets
120
 * by the "set pin" command
121
 *
122
 * Revision 1.13  2001/07/02 21:21:31  mjames
123
 * Added logging to standard output as well as standard error
124
 * in the 'echoe' command
125
 *
126
 * Revision 1.12  2001/06/21 10:52:43  mjames
127
 * Added "echoe" command which echos an error string to the output file.
128
 * Also added command documentation for some more of the command line commands.
129
 *
130
 * Revision 1.11  2001/06/19 05:24:34  mjames
131
 * Created a trap_fopen to overcome trying to write to read only files.
132
 * If this attempted in NT the file can be opened but not written to.
133
 *
134
 * Revision 1.10  2001/06/06 12:10:25  mjames
135
 * Move from HPUX
136
 *
137
 * Revision 1.9  2001/04/09 14:58:29  mjames
138
 * Added capability to delete generics from specific sockets.
139
 *
140
 * Revision 1.8  2001/04/06 22:47:01  mjames
141
 * Added doc2, the creator of documentation to Vertical scripts uses PERL
142
 *
143
 *
144
 * Also correcting generic behaviour and the printing of Verilog.
145
 *
146
 * Revision 1.7  2001/04/04 22:12:31  mjames
147
 * Added some online documentation to the C program command handler
148
 * THis is scanned by a utility called 'doc' that currently creates
149
 * simple HTML from part formatted C comments
150
 *
151
 * Also working well on printing VERILOG
152
 *
153
 * still have problems with C comments and VERTICAL pragmas.
154
 *
155
 * Revision 1.6  2001/03/29 22:08:55  mjames
156
 * Modified to define the scope of set generic commands : now can be global
157
 * or defined for a socket or a simple wildcarded list of sockets.
158
 *
159
 * In addition the is_FPGA property has been activated so that FPGA components
160
 * are not listed out when used in a Verilog (.vb) file.
161
 *
162
 * Version raised to 11.02
163
 *
164
 * Revision 1.5  2001/01/26 21:50:10  mjames
165
 * Managed to get vertical non TCL to compile again
166
 *
167
 * Conversion to argv, argc[] mode of operation continues
168
 *
169
 * Revision 1.4  2001/01/04 21:26:54  mjames
170
 * Modifications to add in the TCL style
171
 * argument list to all of the functions
172
 * .
173
 *
174
 * Revision 1.3  2001/01/02 07:53:51  mjames
175
 * Made changes to allow for interface with TCL/Tk
176
 *
177
 * Revision 1.2  2000/11/29 23:25:39  mjames
178
 * Corrected a failure to cope with integer type ports on entities
179
 * in acf_yacc.y
180
 *
181
 * Altered the elaborate command to call up the template command aw well
182
 *
183
 * Altered equivalent pins handler to cope with the absence of any templates
184
 *
185
 * Altered printout routines to use correct datatype for expansion of
186
 * VHDL constants
187
 *
188
 * Revision 1.1.1.1  2000/10/19 21:58:35  mjames
189
 * Mike put it here
190
 *
191
 *
192
 *
193
 *****************************************************************************/
194
 
195
#include "acf_lex_ext.h"
196
#include "acf_yacc.h"
197
#include "bundle.h"
198
#include "chck_names.h"
199
#include "cmdexec.h"
200
#include "cmdlog.h"
201
#include "cmdparse.h"
202
#include "cmdutil.h"
203
#include "database.h"
204
#include "equivalent.h"
205
#include "expression.h"
206
#include "ext_nets.h"
207
#include "generic.h"
208
#include "jumpering.h"
209
#include "partition.h"
210
#include "printout.h"
211
#include "rename.h"
212
#include "routing.h"
213
#include "sorting.h"
214
#include "statistics.h"
215
#include "template.h"
216
#include "unrouted.h"
217
#include "vertcl_main.h"
218
 
219
#include <ctype.h>
220
#include <regex.h>
221
#include <stdio.h>
222
#include <stdlib.h>
223
#include <string.h>
224
#include <sys/types.h>
225
 
226
#ident                                                                                        \
227
    "@(#)$Header: c:\\cygwin\\cvsroot/Vert03/vertlib/cmdexec2.c,v 1.1.1.1 2003/11/04 23:34:57 mjames Exp $"
228
 
229
/************************************************************************/
230
/* Command handling code                                                */
231
/************************************************************************/
232
 
233
/*********************** Set id (of) <name> (to) <id>Command  ***************************/
234
/*
235
@title
236
set ID_of_name <device_name> <new_id>
237
@application vertical_pin
238
@application vertical_pcb
239
@text
240
Set Identifier for Name. Change the identifier for a named
241
socket. This is used when VERTICAL invents identifiers e.g.
242
'ID1', and you would rather call it e.g. 'U101'.
243
Assuming chip 'multiplier' is in socket 'ID1'
244
@listing
245
set id multiplier U101
246
@text
247
Command will fail if there is already a device with the new
248
identifier.
249
@end
250
*/
251
int SetIdOfNameHandler (ET_TCLARGS)
252
{
253
        socket_t *chip;
254
        if (argc < 2)
255
                return (TCL_ERROR);
256
 
257
        /* safety catch code added : is the ident already in use ? */
258
        chip = find_socket (Ident, argv[1], Search, &socket_head);
259
        if (chip)
260
        {
261
                Log (
262
                    LOG_ERROR,
263
                    "Changing socket id for name='%s' fails : id '%s' in use already\n",
264
                    argv[0],
265
                    argv[1]);
266
                return (TCL_ERROR);
267
        };
268
 
269
        chip = find_socket (Name, argv[0], Search, &socket_head);
270
        if (!chip)
271
        {
272
                Log (LOG_ERROR, "Changing ID: Cannot find socket with name='%s'\n", argv[0]);
273
                return (TCL_ERROR);
274
        };
275
        set_socket (chip, Ident, argv[1]);
276
        Log (LOG_GENERAL, "# Set ident of socket name='%s' to be '%s'\n", argv[0], argv[1]);
277
        return (TCL_OK);
278
}
279
/*********************** Set type (of) <name> (to) <type> Command  ***************************/
280
/*
281
@title
282
set TYpe_name <device_name> <new_type>
283
@text
284
@application vertical_pin
285
@application vertical_hdl
286
@application vertical_pcb
287
Provides a means of assigning a device type to a socket where
288
the socket contains a design e.g. an FPGA. This can then be
289
used to tag sockets for the application of pin templates.
290
@end
291
*/
292
int SetTypeOfNameHandler (ET_TCLARGS)
293
{
294
        socket_t *chip;
295
        if (argc < 2)
296
                return (TCL_ERROR);
297
        chip = find_socket (Name, argv[0], Search, &socket_head);
298
        if (!chip)
299
        {
300
                Log (LOG_GENERAL, "Cannot find socket with name='%s'\n", argv[0]);
301
                return (TCL_ERROR);
302
        };
303
        set_socket (chip, Type, argv[1]);
304
        Log (LOG_GENERAL, "# Set type of socket name='%s' to be '%s'\n", argv[0], argv[1]);
305
        return (TCL_OK);
306
}
307
/*********************** Set type (of) <ident> (to) <type> Command ***************************/
308
/*
309
@title
310
set TYPE_Id <device_id> <new_type>
311
@application vertical_pin
312
@application vertical_hdl
313
@application vertical_pcb
314
@text
315
Provides a means of assigning a device type to a socket where
316
the socket does not necessarily contain a design e.g. a
317
resistor pack. This can then be used to tag sockets for the
318
application of pin templates. This has been converted to wildcard usage, as this means
319
all Rxxx can be made type 'resistor'.
320
 
321
@end
322
*/
323
int SetTypeOfIDHandler (ET_TCLARGS)
324
{
325
        socket_t *skt;
326
        int rc;
327
        /* compile regular expression */
328
        vert_regex_t *preg;
329
        char *pattern;
330
 
331
        if (argc < 2)
332
        {
333
                Log (LOG_ERROR, "-- Need a device ID and a type\n");
334
                return (TCL_ERROR);
335
        }
336
 
337
        pattern = argv[0];
338
        Log (LOG_GENERAL, "-- Beginning setting pin template: prefix '%s' --\n", pattern);
339
 
340
        rc = vert_regcomp (&preg, pattern);
341
 
342
        if (rc != 0)
343
        {
344
                char errbuff[100];
345
                regerror (rc, preg->preg, errbuff, 100);
346
                Log (
347
                    LOG_ERROR,
348
                    "-- Problem (rc=%d) %s with '%s' as regular expression\n",
349
                    rc,
350
                    errbuff,
351
                    pattern);
352
 
353
                return TCL_ERROR;
354
        }
355
        else
356
        {
357
                Log (LOG_GENERAL, "-- Using '%s' as match pattern\n", pattern);
358
        }
359
 
360
        skt = socket_head;
361
        while (skt)
362
        {
363
                int found;
364
                found = regexec (preg->preg, skt->identifier, 0, preg->regpatt, 0);
365
 
366
                if (!found)
367
                {
368
                        set_socket (skt, Type, argv[1]);
369
                        if (level & 1)
370
                        {
371
                                Log (
372
                                    LOG_GENERAL,
373
                                    "# Set type of socket Ident='%s' to be '%s'\n",
374
                                    skt->identifier,
375
                                    argv[1]);
376
                        }
377
                }
378
                skt = skt->next;
379
        }
380
        vert_regfree (&preg);
381
        return (TCL_OK);
382
}
383
/*********************** Set Partition Command  ***************************/
384
/*
385
@title
386
set PARtition <socket_name> <socket_name> ......
387
@application vertical_pin
388
@application vertical_hdl
389
@application vertical_pcb
390
@text
391
Sets partition list to be the following named chip sockets,
392
the names being those used in the CHIP declarations in the
393
acfp file. Wildcarding can be used to select related groups of
394
sockets. All this does is select a socket/entity as being a member of the
395
set of socket/entities that will be selected in this partition.
396
@break
397
@If no arguments are given this is the same as the set all_par command, in that
398
It routes the design before selecting the partition
399
@end
400
*/
401
int SetPartHandler (ET_TCLARGS)
402
{
403
        int i = 0;
404
        int Status = TCL_OK;
405
        if (argc == 0)
406
        {
407
                name_routed_nets ();
408
                Status = set_clear_partition (".*", 1);
409
        }
410
        else
411
        {
412
                for (i = 0; i < argc && Status == TCL_OK; i++)
413
                {
414
                        Status = set_clear_partition (argv[i], 1);
415
                }
416
        }
417
        if (Status != TCL_OK)
418
        {
419
                Log (LOG_ERROR, "-- ERROR with pattern '%s'\n", argv[i]);
420
        }
421
        return (TCL_OK);
422
}
423
 
424
/*********************** Set Partition Command  ***************************/
425
/*
426
@title
427
set all_par
428
@application vertical_hdl
429
@text
430
All sockets are selected for the partition. This can be used
431
as part of the process of creating a top level wrapper for the
432
entire design in VHDL.
433
@break
434
This is now no different from
435
@listing
436
set partition
437
@end
438
*/
439
int SetPartAllHandler (ET_TCLARGS)
440
{
441
        name_routed_nets ();
442
        return set_clear_partition (".*", 1);
443
}
444
 
445
/*********************** Set name (of)  <id> (to) <name> Command  ***************************/
446
/*
447
@title
448
set NAme_of_id <device_id> <new_name>
449
@application vertical_pin
450
@application vertical_hdl
451
@application vertical_pcb
452
@text
453
Sets name for socket identified by identifier e.g. 'U1' etc.
454
This is used as a means of assigning chip names given in CHIP
455
declarations in an ACF file to actual PCB socket positions. It
456
is usable as an alternative to the COMPONENTS block in the
457
ACFplus file.
458
@break
459
One an ACFplus file is written (write acf) then the COMPONENTS
460
block will be updated with the CHIP to socket assignment given
461
by this command.
462
@break
463
Fails if the name is already in use in the design.
464
@end
465
*/
466
int SetNameOfIdHandler (ET_TCLARGS)
467
{
468
        socket_t *chip;
469
        if (argc < 2)
470
                return (TCL_ERROR);
471
 
472
        /* safety catch code added : is the name already in use ? */
473
        chip = find_socket (Name, argv[1], Search, &socket_head);
474
        if (chip)
475
        {
476
                Log (
477
                    LOG_ERROR,
478
                    "Renaming socket id='%s' fails : name '%s' in use already\n",
479
                    argv[0],
480
                    argv[1]);
481
                return (TCL_ERROR);
482
        };
483
 
484
        chip = find_socket (Ident, argv[0], Search, &socket_head);
485
        if (!chip)
486
        {
487
                Log (LOG_ERROR, "Cannot find socket with ident='%s' to rename\n", argv[0]);
488
                return (TCL_ERROR);
489
        };
490
        set_socket (chip, Name, argv[1]);
491
        Log (LOG_GENERAL, "# Set name of socket ident='%s' to be '%s'\n", argv[0], argv[1]);
492
        return (TCL_OK);
493
}
494
/*********************** Set Port Command  ***************************/
495
/* Forces the port to leave the partition */
496
/*
497
@title
498
set PORt <net_name>
499
@application vertical_hdl
500
@text
501
Forces port on the exterior of a partition if the net is used
502
inside. This is used in VHDL partitioning.
503
@break
504
This is used when a net completes its connection from source
505
to all destinations entirely within the partition. Set port
506
ensures the net is observable via an output port on the
507
exterior of the partition.
508
@break
509
For example: to observe an internal clock signal at the top
510
level of the partition. Note this only works for nets which
511
are visible at the top level of a created entity representing
512
a partition of the design.
513
@listing
514
partition
515
set port divided_clock
516
@end
517
*/
518
int SetPortHandler (ET_TCLARGS)
519
{
520
        int i;
521
 
522
        for (i = 0; i < argc; i++)
523
        {
524
                force_port (argv[i]);
525
        }
526
        return (TCL_OK);
527
}
528
 
529
/*********************** Set Routable Command  ***************************/
530
/* Sets nets to be routable  */
531
/*
532
@title
533
set routable <net> <net> <net>
534
@application vertical_pin
535
@application vertical_pcb
536
@text
537
Sets the routable flags on wildcarded nets.
538
VERTICAL will see these nets as routable and therefore
539
use them for logic signal assignments.
540
@end
541
*/
542
int SetRouteHandler (ET_TCLARGS)
543
{
544
        int i;
545
 
546
        for (i = 0; i < argc; i++)
547
        {
548
                force_route (argv[i], Free);
549
        }
550
        return (TCL_OK);
551
}
552
/*********************** Set High Command  ***************************/
553
/* Sets nets to be not routable  */
554
/*
555
@title
556
set high <net> <net> <net>
557
@application vertical_pin
558
@application vertical_pcb
559
@text
560
Sets the routing flags on wildcarded nets as Not_Routable_H
561
VERTICAL will see these nets as generally not routable for signals
562
but pulled up to a logic '1'.
563
@end
564
*/
565
int SetHighHandler (ET_TCLARGS)
566
{
567
        int i;
568
 
569
        for (i = 0; i < argc; i++)
570
        {
571
                force_route (argv[i], Not_Routable_H);
572
        }
573
        return (TCL_OK);
574
}
575
 
576
/*********************** Set Low Command  ***************************/
577
/* Sets nets to be routable  */
578
/*
579
@title
580
set low <net> <net> <net>
581
@application vertical_pin
582
@application vertical_pcb
583
@text
584
Sets the routing flags on wildcarded nets as Not_Routable_L
585
VERTICAL will see these nets as generally not routable for signals
586
but pulled up to a logic '0'.
587
@end
588
*/
589
int SetLowHandler (ET_TCLARGS)
590
{
591
        int i;
592
 
593
        for (i = 0; i < argc; i++)
594
        {
595
                force_route (argv[i], Not_Routable_L);
596
        }
597
        return (TCL_OK);
598
}
599
 
600
/*********************** Set Group ***************************/
601
/* Sets FastTrack routing flags */
602
/*
603
@title
604
set group <control> <socket> [ <socket> * ]
605
@application vertical_hdl
606
@text
607
Control is an integer value. Socket is a wildcard
608
@break
609
Pin group control flags are setup for each socket:
610
for each pin on that socket , while routing , if
611
@listing
612
<pin group pin A> & <control>  == <pin group pin B> & <control>
613
@text
614
Then the pins are seen to be interchangeable within their groups. This allows for the
615
scrambling of a databus for e.g. a RAM chip where data in and out are shared. Some address pins
616
could also be shared in this case.
617
@break
618
Quite often a pin would be given a pin group which is a power of 2:
619
interchangeable address pins might be placed in group 1, interchangeable data pins in group 2.
620
 
621
@end
622
*/
623
int SetGroupHandler (ET_TCLARGS)
624
{
625
        int i;
626
        long num;
627
        if (argc == 0)
628
                return TCL_ERROR;
629
        num = atoi (argv[0]); /* 16 bit number */
630
        for (i = 1; i < argc; i++)
631
        {
632
                set_group_route_flags (argv[i], (int) num);
633
        }
634
        return TCL_OK;
635
}
636
 
637
/*********************** Set Group ***************************/
638
/* Sets FastTrack pin group membership on device pins */
639
/*
640
@title
641
set pin_group <control> <socket_id>[(<pin_id>)]
642
@application vertical_pin
643
@text
644
Control is an integer value.
645
@break
646
Pin group memberships are setup for each pin on each socket. Socket identifier and pin
647
identifiers can be wildcarded. The pin identifier is wrapped by "()" brackets.
648
@listing
649
set pin_group 11 X.*(.*a)
650
@text
651
All pins on sockets with identifiers beginning with 'X' and whose pin identifier ends
652
in 'a' are to be made a member of group 11.
653
@listing
654
set pin_group 12 X12
655
@text
656
All pins on X12 are members of group 12; If the pin identifier is omitted this is the same as
657
'all pins on the socket'. Otherwise pins with Id matching will be processed.
658
 
659
@end
660
*/
661
 
662
int SetPinGroupHandler (ET_TCLARGS)
663
{
664
        int i;
665
        long num;
666
        if (argc == 0)
667
                return TCL_ERROR;
668
        num = atoi (argv[0]); /* 16 bit number */
669
        for (i = 1; i < argc; i++)
670
        {
671
                set_pin_group_flags (argv[i], (int) num);
672
        }
673
        return TCL_OK;
674
}
675
 
676
/*********************** Set External Command  ***************************/
677
/* Sets sockets as external connections. Prevents 'rsvXXXXz' nets name
678
   from appearing on connected nets */
679
/*
680
@title
681
set EXTernal [<prefix> | <identifier> ]
682
@application vertical_pin
683
@application vertical_hdl
684
@application vertical_pcb
685
@text
686
The concept of internal and external sockets is used in
687
several situations. Imagine that an external socket is placed
688
in a position where it is visible and the other non-external
689
sockets are not visible.
690
@break
691
Once a socket has been declared as external,  different parts
692
of VERTICAL use this information in different ways. If the
693
user wishes to set different sockets as 'external'  at
694
different times then this can be achieved by the use of set
695
and del external commands.
696
@break
697
Wildcards using regexp pattern matching are allowed
698
@break
699
When routing, an internal socket will have pins that are
700
connected to nets but not required on the socket named as
701
'rsvXXXXz'. An external socket will have these pins named
702
according to the name of the net. (see route and preroute command)
703
@break
704
When creating jumpers, only those sockets marked as external
705
will be considered for jumpering. (see jumper command)
706
@break
707
In addition, using the write external command will list only
708
those sockets which have the external attribute.
709
@listing
710
set external X.*
711
@text
712
Will flag all sockets with identifier prefixed by 'X' as
713
external.
714
So in this case e.g. X1, X2, X100, X101_a will all be labelled
715
as external.
716
Usage of set external is cumulative.
717
@break
718
Only external sockets are listed out in write vlog command
719
to filter out unwanted sockets by deleting the external
720
property.
721
@end
722
*/
723
int SetExternHandler (ET_TCLARGS)
724
{
725
        int i;
726
        for (i = 0; i < argc; i++)
727
        {
728
                set_external_flags (argv[i]);
729
        }
730
        return (TCL_OK);
731
}
732
 
733
/**************************************************************/
734
/* wildcard setting of generics                               */
735
/**************************************************************/
736
 
737
static void set_wildcard_generic (char *template, generic_info_t *info)
738
{
739
        int rc;
740
        socket_t *skt = socket_head;
741
        int found = 0;
742
 
743
        /* compile regular expression */
744
        vert_regex_t *preg;
745
 
746
        /* pick out a wildcard if all sockets then scope is the global generics */
747
        if (ISNULLSTR (template))
748
        {
749
                set_generic_value (&global_generics, info);
750
                return;
751
        }
752
 
753
        rc = vert_regcomp (&preg, template);
754
 
755
        if (rc != 0)
756
        {
757
                char errbuff[100];
758
                regerror (rc, preg->preg, errbuff, 100);
759
                Log (
760
                    LOG_ERROR,
761
                    "-- Problem (rc=%d) %s with '%s' as regular expression\n",
762
                    rc,
763
                    errbuff,
764
                    template);
765
 
766
                return /*TCL_ERROR*/;
767
        }
768
        else
769
        {
770
                Log (LOG_GENERAL, "-- Using '%s' as match pattern\n", template);
771
        }
772
 
773
        while (skt)
774
        {
775
                found = regexec (preg->preg, skt->identifier, 0, preg->regpatt, 0);
776
                if (!found)
777
                {
778
                        set_generic_value (&skt->generics, info);
779
                }
780
                skt = skt->next;
781
        }
782
 
783
        vert_regfree (&preg);
784
}
785
 
786
/*********************** Set FPGA Command  ***************************/
787
/* Sets a socket as containing an FPGA : if set then a module declaration will not be made in
788
   when writing VERILOG out  */
789
/*
790
@title
791
set fpga <socket> <line_replacing_declaration>
792
@application vertical_hdl
793
@text
794
Sets sockets as containing an FPGA : if set then a module declaration will not be made in
795
   when writing VERILOG out
796
@end
797
*/
798
int SetFPGAHandler (ET_TCLARGS)
799
{
800
        generic_info_t info;
801
        if (argc < 2)
802
        {
803
                Log (LOG_ERROR, "-- need 2 arguments to Set FPGA\n");
804
                return TCL_ERROR;
805
        }
806
        info.name = "fpga_file";
807
        info.typename = "string";
808
        info.g_type = IS_ATTRIBUTE;
809
        info.expr = compile_expression_from_string (argv[1]);
810
        info.g_class = DEFINED;
811
        set_wildcard_generic (argv[0], &info);
812
        set_FPGA_flags (argv[0]); /* set flags */
813
        return (TCL_OK);
814
}
815
 
816
/*********************** Set Generic String ***************************/
817
/* Sets a named generic to a value or string */
818
/*
819
@title
820
set generic string <ident> <scope> <string>
821
@application vertical_hdl
822
@text
823
This command sets up a generic identified by name as <ident>
824
(variable) to be a string value.
825
@break
826
If <scope> is "" then the scope of the generic is global, applied to all sockets and signals
827
within the design
828
@listing
829
set generic string vhdl_basetype "" "std_logic_vector"
830
@text
831
Will set up a global generic called vhdl_basetype with value "std_logic_vector"
832
@break
833
If <scope> is "*" then the generic is applied to all sockets. This is used to set a default
834
value for all instances of that generic to the string value given. Its scope is local to each
835
socket. It can be overridden by specific socket generic assignments.
836
@break
837
If <scope> is a wildcard (ends in "*")  then all of the sockets matching will have their
838
generic values set.
839
@end
840
*/
841
int SetGenericStringHandler (ET_TCLARGS)
842
{
843
        generic_info_t info;
844
        if (argc < 3)
845
                return TCL_ERROR;
846
        info.name = argv[1];
847
        info.typename = "string";
848
        info.g_type = IS_STRING;
849
        info.expr = compile_string (argv[2]);
850
        set_wildcard_generic (argv[0], &info);
851
        return (TCL_OK);
852
}
853
/*********************** Set Generic Declaration ***************************/
854
/* Sets a named generic to a value or string */
855
/*
856
@title
857
set generic declaration <ident> <scope> <string>
858
@application vertical_hdl
859
@text
860
This sets up generics which are string generics but which are used in Verilog declarations
861
for use with Certify. These are enclosed in verilog comments as pragmas when written out.
862
@break
863
See set generic string for more information.
864
@end
865
*/
866
int SetGenericDeclarationHandler (ET_TCLARGS)
867
{
868
        generic_info_t info;
869
 
870
        info.name = argv[1];
871
        info.typename = "string";
872
        info.g_class = DEFINED;
873
        info.g_type = IS_DECLARATION_DIRECTIVE;
874
        info.expr = compile_string (argv[2]);
875
        set_wildcard_generic (argv[0], &info);
876
        return (TCL_OK);
877
}
878
/*********************** Set Generic instance ***************************/
879
/* Sets a named generic to a value or string */
880
/*
881
@title
882
set generic instance <ident> <scope> <string>
883
@application vertical_hdl
884
@text
885
This sets up generics which are string generics but which are used in Verilog instances
886
for use with Certify. These are enclosed in verilog comments as pragmas when written out.
887
@break
888
See set generic string for more information.
889
@end
890
*/
891
 
892
int SetGenericInstanceHandler (ET_TCLARGS)
893
{
894
        generic_info_t info;
895
        if (argc < 3)
896
                return TCL_ERROR;
897
        info.name = argv[1];
898
        info.typename = "string";
899
        info.g_class = DEFINED;
900
        info.g_type = IS_INSTANCE_DIRECTIVE;
901
        info.expr = compile_string (argv[2]);
902
        set_wildcard_generic (argv[0], &info);
903
 
904
        return (TCL_OK);
905
}
906
/*********************** Set Generic Integer ***************************/
907
/* Sets a named generic to an integer value*/
908
/*
909
@title
910
set generic integer <ident> <scope> <expression>
911
@application vertical_hdl
912
@text
913
This sets up generics which are integer expressions, usable in place of VHDL constant
914
declarations in .acfp files.
915
@break
916
See set generic string for more information.
917
@end
918
*/
919
 
920
int SetGenericIntegerHandler (ET_TCLARGS)
921
{
922
        generic_info_t info;
923
        if (argc < 3)
924
                return TCL_ERROR;
925
        info.name = argv[1];
926
        info.typename = "integer";
927
        info.g_type = IS_INTEGER;
928
        info.g_class = DEFINED;
929
        info.expr = compile_expression_from_string (argv[2]); /* this needs to be altered */
930
 
931
        set_wildcard_generic (argv[0], &info);
932
        return (TCL_OK);
933
}
934
 
935
/*********************** Set Generic Value ***************************/
936
/* Sets a named generic to an integer range : workout from range whether this is TO or DOWNTO
937
 */
938
/*
939
@title
940
set generic value <ident> <scope> <expression>
941
@application vertical_hdl
942
@text
943
Sets a named generic to an integer range : workout from range whether this is TO or DOWNTO, (TO
944
has first expression less than second), usable in place of VHDL constant declarations in .acfp
945
files.
946
@break
947
See set generic string for more information.
948
@end
949
*/
950
 
951
int SetGenericValueHandler (ET_TCLARGS)
952
{
953
        expression_t *p;
954
        generic_info_t info;
955
        if (argc < 3)
956
                return (TCL_ERROR);
957
 
958
        info.name = argv[1];
959
 
960
        p = compile_expression_from_string (argv[2]);
961
 
962
        if (p)
963
        {
964
                switch (p->opcode)
965
                {
966
                case TO:
967
                case DOWNTO:
968
                {
969
                        info.g_type = p->opcode;
970
                        info.typename = "integer range";
971
                        break;
972
                }
973
                case TXT_STRING:
974
                {
975
                        info.g_type = IS_STRING;
976
                        info.typename = "string";
977
                        break;
978
                }
979
                default:
980
                {
981
                        info.g_type = IS_INTEGER;
982
                        info.typename = "integer";
983
                        break;
984
                }
985
                }
986
        }
987
 
988
        info.g_class = DEFINED;
989
        info.expr = p;
990
 
991
        set_wildcard_generic (argv[0], &info);
992
        return (TCL_OK);
993
}
994
 
995
/*********************** Set Generic Attribute ***************************/
996
/* Sets a named generic attribute to an integer value*/
997
/*
998
@title
999
set generic attribute <ident> <scope> <expression>
1000
@application vertical_hdl
1001
@text
1002
This sets up generics which are integer expressions, usable in place of VHDL constant
1003
declarations in .acfp files.
1004
@break
1005
See set generic string for more information.
1006
@end
1007
*/
1008
 
1009
int SetGenericAttributeHandler (ET_TCLARGS)
1010
{
1011
        generic_info_t info;
1012
        if (argc < 3)
1013
                return TCL_ERROR;
1014
        info.name = argv[1];
1015
        info.typename = "attribute";
1016
        info.g_type = IS_ATTRIBUTE;
1017
        info.expr = compile_expression_from_string (argv[2]);
1018
        info.g_class = DEFINED;
1019
        set_wildcard_generic (argv[0], &info);
1020
        return (TCL_OK);
1021
}
1022
 
1023
/*********************** Set Generic Boolean ***************************/
1024
/* Sets a named generic to an integer value*/
1025
/*
1026
@title
1027
set generic boolean <ident> <scope> <integer>
1028
@application vertical_hdl
1029
@text
1030
This sets up booleans containing the value of boolean expressions, usable in place of VHDL
1031
constant declarations in .acfp files.
1032
@break
1033
Any non-zero integer is TRUE, and zero is FALSE.
1034
@break
1035
See set generic string for more information.
1036
@end
1037
*/
1038
 
1039
int SetGenericBooleanHandler (ET_TCLARGS)
1040
{
1041
        generic_info_t info;
1042
        if (argc < 3)
1043
                return TCL_ERROR;
1044
        info.name = argv[1];
1045
        info.typename = "integer";
1046
        info.g_type = IS_BOOLEAN;
1047
        /* think about using : convert_num(char * string,int * value) */
1048
        info.expr =
1049
            compile_expression_from_string (argv[2]); /* Can use true/false as well now ... */
1050
        set_wildcard_generic (argv[0], &info);
1051
        return (TCL_OK);
1052
}
1053
 
1054
/*********************** Set Generic Menu ***************************/
1055
/* Sets a named generic to a value or string */
1056
 
1057
CommandMenu const SetGenericMenu = {{"attribute",
1058
                               3,
1059
                               SetGenericAttributeHandler,
1060
                               NULL,
1061
                               "Integer instance attribute",
1062
                               "<socket*>|\"\" <name> <value>",
1063
                               NULL},
1064
                              {"string",
1065
                               3,
1066
                               SetGenericStringHandler,
1067
                               NULL,
1068
                               "String constant",
1069
                               "<socket*>|\"\" <name> <string text>",
1070
                               NULL},
1071
                              {"integer",
1072
                               3,
1073
                               SetGenericIntegerHandler,
1074
                               NULL,
1075
                               "Integer constant expression",
1076
                               "<socket*>|\"\" <name> <value>",
1077
                               NULL},
1078
                              {"boolean",
1079
                               3,
1080
                               SetGenericBooleanHandler,
1081
                               NULL,
1082
                               "Boolean constant",
1083
                               "<socket*>|\"\" <name> <value>",
1084
                               NULL},
1085
                              {"value",
1086
                               3,
1087
                               SetGenericValueHandler,
1088
                               NULL,
1089
                               "Generic expression",
1090
                               "<socket*>|\"\" <name> <expression>",
1091
                               NULL},
1092
                              {"declaration",
1093
                               3,
1094
                               SetGenericDeclarationHandler,
1095
                               NULL,
1096
                               "Certify .vb declaration directive",
1097
                               "<socket*>|\"\" <name> <value>",
1098
                               NULL},
1099
                              {"instance",
1100
                               3,
1101
                               SetGenericInstanceHandler,
1102
                               NULL,
1103
                               "Certify .vb instance directive",
1104
                               "<socket*>|\"\" <name> <value>",
1105
                               NULL},
1106
                              {NULL, 0, NULL, NULL, NULL}
1107
 
1108
};
1109
 
1110
/*********************** Set Command  ***************************/
1111
 
1112
CommandMenu const SetMenu = {
1113
    {"id_of_name",
1114
     2,
1115
     SetIdOfNameHandler,
1116
     NULL,
1117
     "Set Identifier for Name",
1118
     "<device_name> <new_id>",
1119
     NULL},
1120
    {"name_id",
1121
     2,
1122
     SetNameOfIdHandler,
1123
     NULL,
1124
     "Sets name for socket identifier",
1125
     "<device_id> <new_name>",
1126
     NULL},
1127
    {"type_id",
1128
     6,
1129
     SetTypeOfIDHandler,
1130
     NULL,
1131
     "Sets type for socket identifier",
1132
     "<device_id> <new_type>",
1133
     NULL},
1134
    {"type_name",
1135
     2,
1136
     SetTypeOfNameHandler,
1137
     NULL,
1138
     "Sets type for device named",
1139
     "<device_name> <new_type>",
1140
     NULL},
1141
    {"partition", 3, SetPartHandler, NULL, "Sets partition list", "<socket_name>*", NULL},
1142
    {"all_partition",
1143
     5,
1144
     SetPartAllHandler,
1145
     NULL,
1146
     "Sets partition list to all sockets",
1147
     "",
1148
     NULL},
1149
    {"port",
1150
     3,
1151
     SetPortHandler,
1152
     NULL,
1153
     "Forces port on partition if used inside",
1154
     "<net_name_prefix>*",
1155
     NULL},
1156
    {"routable", 3, SetRouteHandler, NULL, "Flags routed nets as routable", "<net_id>*", NULL},
1157
    {"high",
1158
     3,
1159
     SetHighHandler,
1160
     NULL,
1161
     "Flags routed nets as not routable logic 1",
1162
     "<net_id>*",
1163
     NULL},
1164
    {"low",
1165
     3,
1166
     SetLowHandler,
1167
     NULL,
1168
     "Flags routed nets as not routable logic 0",
1169
     "<net_id>*",
1170
     NULL},
1171
    {"external",
1172
     3,
1173
     SetExternHandler,
1174
     NULL,
1175
     "Sets socket IDs prefixed by prefix as external",
1176
     "<prefix>*",
1177
     NULL},
1178
    {"fpga",
1179
     3,
1180
     SetFPGAHandler,
1181
     NULL,
1182
     "Sets socket IDs prefixed by prefix as being FPGA: no Verilog declaration",
1183
     "<prefix>*",
1184
     NULL},
1185
    {"group",
1186
     3,
1187
     SetGroupHandler,
1188
     NULL,
1189
     "Enables 'FastTrack group' routing: 1=row 2=col 3=both",
1190
     "<mask_value> [<id_prefix>*]",
1191
     NULL},
1192
    {"pin_group",
1193
     3,
1194
     SetPinGroupHandler,
1195
     NULL,
1196
     "Sets pin group membership on pins of devices",
1197
     "<group> <id_prefix>[(<pin_prefix>)]",
1198
     NULL},
1199
    {"generic", 3, NULL, SetGenericMenu, "Sets generic value  ", "more", NULL},
1200
    {NULL, 0, NULL, NULL, NULL, NULL},
1201
 
1202
};
1203
 
1204
/*********************** Delete Port Command  ***************************/
1205
/* Deletes the ports from the partition */
1206
/*
1207
@title
1208
delete port <port> [ <port> ]*
1209
@application vertical_hdl
1210
@text
1211
Remove port from partition. If a signal (port) of that name
1212
exists on the top level of a partition, it is made to be
1213
hidden inside.
1214
@break
1215
This is used e.g. when a local copy of a bus is used in all
1216
partitions on a multiple EPLD board.
1217
If the bus appears as a port on all of  the EPLDs as it would
1218
by default, as there is a driver inside each EPLD and inputs
1219
in each EPLD, then there will be multiple driver conflicts on
1220
the breadboard.
1221
@end
1222
*/
1223
int DelPortHandler (ET_TCLARGS)
1224
{
1225
        int i;
1226
        for (i = 0; i < argc; i++)
1227
        {
1228
                delete_port (argv[i]);
1229
        }
1230
        return (TCL_OK);
1231
}
1232
 
1233
/*********************** Set Not Routable Command  ***************************/
1234
/* Sets nets to be not routable  */
1235
/*
1236
@title
1237
delete route <net> [ <net> ] *
1238
@application vertical_pin
1239
@application vertical_hdl
1240
@application vertical_pcb
1241
@text
1242
Remove the routable property from the named nets. These nets will not be used in routing by
1243
vertical.
1244
@listing
1245
del route VCC.* GND.* NCONFIG CONF_DONE
1246
@text
1247
Will ensure that these nets are set as not routable.
1248
This is often seen in netlist import scripts.
1249
@end
1250
*/
1251
int DelRouteHandler (ET_TCLARGS)
1252
{
1253
        int i;
1254
        for (i = 0; i < argc; i++)
1255
        {
1256
                force_route (argv[i], Not_Routable);
1257
        }
1258
        return (TCL_OK);
1259
}
1260
 
1261
/*********************** Delete NetName Command  ***************************/
1262
/* Deletes the name fileds form nets by ID  from the partition */
1263
/*
1264
@title
1265
delete netname <net> [ <net> ] *
1266
@application vertical_pin
1267
@application vertical_hdl
1268
@application vertical_pcb
1269
@text
1270
The signal names assigned to the nets are removed, so that clean netlists are
1271
written out without any routing history. Use this if when importing netlists,
1272
where the net names used may match those in the as yet unrouted design that
1273
will use those nets. Routing that tries to reuse nets which were previously
1274
used will be confused by names appearing on the nets.
1275
@end
1276
*/
1277
 
1278
int DelNetNameHandler (ET_TCLARGS)
1279
{
1280
        int i;
1281
        for (i = 0; i < argc; i++)
1282
        {
1283
                del_net_names (argv[i]);
1284
        }
1285
        return (TCL_OK);
1286
}
1287
/*********************** Delete Port Command  ***************************/
1288
/* Clears the is_external bits on all sockets */
1289
/*
1290
@title
1291
delete EXTernal <socket> [ <socket ] *
1292
@application vertical_pin
1293
@application vertical_hdl
1294
@application vertical_pcb
1295
@text
1296
This clears the external attribute flags from all sockets. The
1297
name matching rules are the same as for set external command
1298
@end
1299
*/
1300
int DelExternHandler (ET_TCLARGS)
1301
{
1302
        int i;
1303
        for (i = 0; i < argc; i++)
1304
        {
1305
                clear_external_flags (argv[i]);
1306
        }
1307
        return (TCL_OK);
1308
}
1309
 
1310
/*********************** Delete Port Command  ***************************/
1311
/* Clears the is_FPGA bits on all sockets */
1312
/*
1313
@title
1314
delete FPGA <socket> [ <socket ] *
1315
@application vertical_hdl
1316
@text
1317
This clears the FPGA attribute flags from all sockets. The
1318
name matching rules are the same as for set FPGA command
1319
@end
1320
*/
1321
int DelFPGAHandler (ET_TCLARGS)
1322
{
1323
        int i;
1324
        for (i = 0; i < argc; i++)
1325
        {
1326
                clear_FPGA_flags (argv[i]);
1327
        }
1328
        return (TCL_OK);
1329
}
1330
 
1331
/*********************** Delete Partition Command  ***************************/
1332
/* Clears the partition selection on all sockets */
1333
/*
1334
@title
1335
delete partition <socket> [ <socket>* ]
1336
@application vertical_hdl
1337
@text
1338
This clears the partition flags from wildcarded named sockets. The
1339
name matching rules are the same as for set partition command
1340
@break
1341
If no arguments are given this results in routing created for the partition being
1342
ripped up. Use
1343
@listing
1344
delete partition
1345
@text
1346
to clean up
1347
@end
1348
*/
1349
int DelPartitionHandler (ET_TCLARGS)
1350
{
1351
        int i, Status = TCL_OK;
1352
        if (argc == 0)
1353
        {
1354
                clear_partition_nets ();
1355
                Status = set_clear_partition (".*", 0);
1356
        }
1357
 
1358
        for (i = 0; i < argc && Status == TCL_OK; i++)
1359
        {
1360
                Status = set_clear_partition (argv[i], 0);
1361
        }
1362
        if (Status != TCL_OK)
1363
        {
1364
                Log (LOG_ERROR, "-- ERROR with pattern '%s'\n", argv[i]);
1365
        }
1366
        return (Status);
1367
}
1368
 
1369
/*********************** Delete Generic Command  ***************************/
1370
/*
1371
@title
1372
delete generic <generic_name> <scope>
1373
@application vertical_hdl
1374
@text
1375
This function will delete any generic given in either global generics or all sockets matching
1376
pattern. See set generic for naming rules.
1377
@end
1378
*/
1379
int DelGenericHandler (ET_TCLARGS)
1380
{
1381
        generic_info_t info;
1382
        int rc;
1383
        socket_t *skt = socket_head;
1384
        int found = 0;
1385
        /* compile regular expression */
1386
        vert_regex_t *preg;
1387
 
1388
        if (argc < 2)
1389
                return (TCL_ERROR);
1390
 
1391
        info.name = argv[1];
1392
 
1393
        /* pick out a wildcard if all sockets then scope is the global generics */
1394
        if (ISNULLSTR (argv[0]))
1395
        {
1396
                del_generic_value (&global_generics, &info);
1397
                return 0;
1398
        }
1399
 
1400
        rc = vert_regcomp (&preg, argv[0]);
1401
 
1402
        if (rc != 0)
1403
        {
1404
                char errbuff[100];
1405
                regerror (rc, preg->preg, errbuff, 100);
1406
                Log (
1407
                    LOG_ERROR,
1408
                    "-- Problem (rc=%d) %s with '%s' as regular expression\n",
1409
                    rc,
1410
                    errbuff,
1411
                    argv[0]);
1412
 
1413
                return TCL_ERROR;
1414
        }
1415
        else
1416
        {
1417
                Log (LOG_GENERAL, "-- Using '%s' as match pattern\n", argv[0]);
1418
        }
1419
 
1420
        while (skt)
1421
        {
1422
                found = regexec (preg->preg, skt->identifier, 0, preg->regpatt, 0);
1423
                if (!found)
1424
                {
1425
                        del_generic_value (&skt->generics, &info);
1426
                }
1427
                skt = skt->next;
1428
        }
1429
        vert_regfree (&preg);
1430
        return 0;
1431
}
1432
 
1433
/*********************** Delete Command  ***************************/
1434
 
1435
CommandMenu const DeleteMenu = {
1436
    {"port",
1437
     2,
1438
     DelPortHandler,
1439
     NULL,
1440
     "Remove port from partition",
1441
     "<net_name_prefix>* ",
1442
     NULL},
1443
    {"routable",
1444
     3,
1445
     DelRouteHandler,
1446
     NULL,
1447
     "Flags routed nets as NOT_ROUTABLE",
1448
     "<net_id>*",
1449
     NULL},
1450
    {"netname", 3, DelNetNameHandler, NULL, "Remove name from nets by ID", "<net_ID>*", NULL},
1451
    {"external",
1452
     3,
1453
     DelExternHandler,
1454
     NULL,
1455
     "Set sockets as being internal",
1456
     "<name_prefix>*",
1457
     NULL},
1458
    {"fpga",
1459
     3,
1460
     DelFPGAHandler,
1461
     NULL,
1462
     "Set sockets as not being FPGA: Verilog declaration given",
1463
     "<name_prefix>*",
1464
     NULL},
1465
    {"generic",
1466
     3,
1467
     DelGenericHandler,
1468
     NULL,
1469
     "Removes generic values from sockets",
1470
     "<socket>* <generic_name>",
1471
     NULL},
1472
    {"partition", 3, DelPartitionHandler, NULL, "Clear the partition list", "", NULL},
1473
    {NULL, 0, NULL, NULL, NULL}
1474
 
1475
};
1476
 
1477
/*********************** Partial routing calls ***************************/
1478
 
1479
/*********************** Route By Path ***************************/
1480
/*
1481
@title
1482
preroute path
1483
@application vertical_pin
1484
@application vertical_pcb
1485
@text
1486
Route by path only: If there exists a routed path between the
1487
chips which has the correct pin directions on each chip
1488
visited, then this path will be used to carry the unrouted
1489
net.
1490
@end
1491
*/
1492
 
1493
int RoutePathHandler (ET_TCLARGS)
1494
{
1495
        Log (LOG_GENERAL, "#begin routing\n");
1496
        perform_routing (By_Net);
1497
        Log (LOG_GENERAL, "#done routing\n");
1498
        return (TCL_OK);
1499
}
1500
/*********************** Route By Exact Path ***************************/
1501
/*
1502
@title
1503
preroute EXact
1504
@application vertical_pin
1505
@application vertical_pcb
1506
@text
1507
Route by exact same path only: As for preroute path, but the
1508
unrouted net and the routed net must both visit the same pins
1509
on the chips that are visited by the nets. This is important
1510
where there are very specific pin functions associated with a
1511
pin.
1512
@break
1513
It also helps with maintenace of similar routing if a design
1514
is recompiled via maxplus2, the newly unrouted  nets will tend
1515
to be routed on the same routed nets as for the first compile
1516
if this is used.
1517
@end
1518
*/
1519
 
1520
int RouteExactPathHandler (ET_TCLARGS)
1521
{
1522
        Log (LOG_GENERAL, "#begin routing\n");
1523
        perform_routing (By_Exact_Net);
1524
        Log (LOG_GENERAL, "#done routing\n");
1525
        return (TCL_OK);
1526
}
1527
/*********************** Route By Fixed Net ***************************/
1528
/*
1529
@title
1530
preroute FIxed
1531
@application vertical_pin
1532
@application vertical_pcb
1533
@text
1534
Route by fixed nets only. Any nets which have a fixed pin on
1535
them will be routed first. Fixed pins are those where the pin
1536
identifier used on a socket in the unrouted list should carry
1537
the same signal after routing. This is used to keep e.g.
1538
external connections.
1539
@end
1540
*/
1541
int RouteFixedNetHandler (ET_TCLARGS)
1542
{
1543
        Log (LOG_GENERAL, "#begin routing\n");
1544
        perform_routing (By_Fixed_Net);
1545
        Log (LOG_GENERAL, "#done routing\n");
1546
        return (TCL_OK);
1547
}
1548
 
1549
/*********************** Route By Name ***************************/
1550
/*
1551
@title
1552
preroute NAMe
1553
@application vertical_pin
1554
@application vertical_pcb
1555
@text
1556
Route by name only: If the net identifier of an unrouted net
1557
matches either the net name or identifier of a routed net then
1558
the router will try and use this net. All pins must be in the
1559
right direction and of the right type for a route to succeed.
1560
@break
1561
Once an unrouted net has been routed, the name of a routed net
1562
will be changed to the identifier of the unrouted net. This
1563
again encourages successive re-routings of a design to use the
1564
same nets wherever possible.
1565
@end
1566
*/
1567
int RouteNameHandler (ET_TCLARGS)
1568
{
1569
        Log (LOG_GENERAL, "#begin routing\n");
1570
        perform_routing (By_Name);
1571
        Log (LOG_GENERAL, "#done routing\n");
1572
        return (TCL_OK);
1573
}
1574
 
1575
/*********************** Route By creating Nets ***************************/
1576
/*
1577
@title
1578
preroute CREate
1579
@application vertical_pin
1580
@application vertical_hdl
1581
@application vertical_pcb
1582
@text
1583
Route by creating nets only: The user will be asked to join
1584
the pins of the devices in question with wires. This is
1585
intended for use with uncomitted wirewrap boards. Once a board
1586
has been part-wired, or if it is a PCB,  then the use of the
1587
jumpering commands permits the generation of new wiring lists.
1588
@break
1589
If nets are created during routing of a PCB there is a
1590
problem. This is why this subcommand is not performed by default
1591
with the route command.
1592
 
1593
@end
1594
*/
1595
int RouteCreateHandler (ET_TCLARGS)
1596
{
1597
        Log (LOG_GENERAL, "#begin routing\n");
1598
        perform_routing (By_Creating);
1599
        Log (LOG_GENERAL, "#done routing\n");
1600
        return (TCL_OK);
1601
}
1602
 
1603
CommandMenu const PrerouteMenu = {
1604
    {"path", 2, RoutePathHandler, NULL, "Route by path only", "", NULL},
1605
    {"fixed", 2, RouteFixedNetHandler, NULL, "Route by fixed nets only", "", NULL},
1606
    {"exact", 2, RouteExactPathHandler, NULL, "Route by exact same path only", "", NULL},
1607
    {"name", 3, RouteNameHandler, NULL, "Route by name only", "", NULL},
1608
    {"create", 3, RouteCreateHandler, NULL, "Route by creating nets only", "", NULL},
1609
    {NULL, 0, NULL, NULL, NULL},
1610
 
1611
};
1612
 
1613
/*********************** Simple command calls ***************************/
1614
/*
1615
@title
1616
route
1617
@application vertical_pin
1618
@application vertical_hdl
1619
@application vertical_pcb
1620
@text
1621
Route the wiring.
1622
Any nets with their routing status set as NOT_ROUTABLE will
1623
not be considered for routing. Use to protect VDD, GND from
1624
being used for general signal routing.
1625
@break
1626
An experiment in version 16.5 onwards allows for NOT_ROUTABLE_H
1627
and NOT_ROUTABLE_L tracks that can be used as pullup and
1628
pulldown, as they represent logic '1' and logic '0' values.
1629
@break
1630
The list of metal tracks on the PCB, the  wired nets is
1631
reconciled with the list of desired connections, the unrouted
1632
nets and the assignment of the unrouted nets to the wired nets
1633
produces the routed nets list.
1634
@break
1635
As  there are several phases to the routing, and the order  in
1636
which  they are applied is fixed, it has been found  necessary
1637
to  occasionally use the preroute command to order the use  of
1638
the routing algorithms.
1639
@break
1640
The  order of use of routing algorithms implied by using route
1641
is as follows:
1642
@listing
1643
preroute name, preroute fixed , preroute exact, preroute path
1644
@text
1645
This is then automatically followed by the
1646
@listing
1647
reserve
1648
@text
1649
command, which ensures pin reservation for Maxplus2. If you need to use 'preroute' then
1650
you will need to use the 'reserve' command, to ensure pin reservation.
1651
@break
1652
The 'preroute create' option is now only available via preroute. Nobody
1653
needs a PCB to silently grow extra tracks. If the goal is to
1654
create a new PCB or wirewrap list then this option will be
1655
necessary.
1656
@break
1657
To achieve the same effect as the older 'route' command, use
1658
'route' then 'preroute create'.
1659
@break
1660
Just prior to issuing any route commands, any new pins added
1661
to the design will be checked for pin renaming and the
1662
unrouted netlist is updated.
1663
@end
1664
*/
1665
int ROUTEHandler (ET_TCLARGS)
1666
{
1667
        Log (LOG_GENERAL, "#begin routing\n");
1668
        perform_routing (Free);
1669
        Log (LOG_GENERAL, "#done routing\n");
1670
        return (TCL_OK);
1671
}
1672
 
1673
/**************************************************************************/
1674
/*
1675
@title
1676
reserve
1677
@application vertical_pin
1678
@text
1679
Perform pin reservation according to Maxplus2 requirements.
1680
@break
1681
This function ensures net reservation is made for all internal
1682
   nodes that are on internal sockets .
1683
@break
1684
   If any external socket is on the net then all internal pins are reserved.
1685
   Otherwise a single internal pin is left as a non-reserved driver
1686
@end
1687
*/
1688
 
1689
int ReservePinsHandler (ET_TCLARGS)
1690
{
1691
        Log (LOG_GENERAL, "#begin pin reservation\n");
1692
        ensure_reservation ();
1693
        Log (LOG_GENERAL, "#done pin reservation\n");
1694
        return (TCL_OK);
1695
}
1696
 
1697
/*********************** Simple command calls ***************************/
1698
/* partitioning */
1699
/*
1700
@title
1701
partition
1702
@application vertical_hdl
1703
@text
1704
Do the partition calculation. This takes the entities given in
1705
the partition and works out the port list for the top level.
1706
@break
1707
To do this the partitioner must be made aware of the entire set
1708
of top level entity port lists in the system.
1709
@break
1710
To do this an acfp, vhdl or verilog file must be read in
1711
containing a description of the top level entity for each
1712
block used in the partition.
1713
@break
1714
See the section on Vertical script files.
1715
@end
1716
*/
1717
 
1718
int PARTHandler (ET_TCLARGS)
1719
{
1720
        Log (LOG_GENERAL, "#begin partition\n");
1721
        create_unrouted_list ();
1722
        clear_partition_generics (&partition_generics);
1723
        perform_partition ();
1724
        Log (LOG_GENERAL, "#done partition\n");
1725
        return (TCL_OK);
1726
}
1727
 
1728
/*********************** Simple command calls ***************************/
1729
/* trial */
1730
/*
1731
@title
1732
fix_pins
1733
@application vertical_pin
1734
@application vertical_pcb
1735
@text
1736
This command is used in conjunction with set external on a socket. If a socket is set external
1737
and it has unrouted nets connected to it, the fix_pins command will attempt to freeze the
1738
connections given in the unrouted netlist. This means that a socket with a defined pinout
1739
should be routed with that pinout rather than having the pinout exchanged by VERTICAL.
1740
@break
1741
NB If an attempt is made to connect a signal to a net which cannot reach its destination
1742
because there is no wire present, then the signal will be moved to another pin which reaches
1743
the destination.
1744
 
1745
@end
1746
*/
1747
 
1748
int FIXHandler (ET_TCLARGS)
1749
{
1750
        Log (LOG_GENERAL, "#begin attempting to fix port pins\n");
1751
        perform_trial_naming ();
1752
        Log (LOG_GENERAL, "#done fixing pins\n");
1753
        return (TCL_OK);
1754
}
1755
/*********************** Simple command calls ***************************/
1756
/* Auto-jumpering
1757
@title
1758
jumper <suffix>
1759
@application vertical_pin
1760
@application vertical_pcb
1761
@text
1762
This is the original routing algorithm for VERTICAL.
1763
This can be used to create wirewrap jumper lists.
1764
If there are unrouted connections made between sockets that are flagged as external, and which
1765
therefore need wirewrapped connections.
1766
@break
1767
In use different pairs or groups of sockets would be set as external and then the jumper
1768
command is issued for that pair or group. The suffix would be used to identify the jumpers
1769
created from each induvidual jumper command: These can then be extracted for wirewrap lists.
1770
@end
1771
*/
1772
 
1773
int JUMPERHandler (ET_TCLARGS)
1774
{
1775
        char *Suffix;
1776
        if (argc < 1)
1777
                Suffix = NULL;
1778
        else
1779
                Suffix = argv[0];
1780
        Log (LOG_GENERAL, "#begin jumpering\n");
1781
        create_unrouted_list ();
1782
        perform_jumpering (Suffix);
1783
        Log (LOG_GENERAL, "#done jumpering\n");
1784
        return (TCL_OK);
1785
}
1786
 
1787
/******************** Parser for the 'DO' batch files ***********************/
1788
/*
1789
@title
1790
do <commandfile> [ <arg1> <arg2> ... ]
1791
@application vertical_pin
1792
@application vertical_hdl
1793
@application vertical_pcb
1794
@text
1795
Interpret the command file as though typed in on the command line.
1796
@break
1797
The argument list are accessible as $1, $2 etc while interpreting the command file, and can be
1798
used to pass down arguments to the file.
1799
@break
1800
Up to 10 levels of nesting of command files is allowed. This limit is imposed to trap
1801
recursion.
1802
@end
1803
 
1804
*/
1805
int DOHandler (ET_TCLARGS)
1806
{
1807
        FILE *DoFile;
1808
        if (argc < 1)
1809
                return (TCL_ERROR);
1810
 
1811
        DoFile = trap_fopen (argv[0], "r"); /* open text file for reading */
1812
        if (!DoFile)
1813
        {
1814
                Log (LOG_ERROR, "# Error opening file: <%s>\n", argv[0]);
1815
                return (TCL_ERROR);
1816
        }
1817
        else
1818
        {
1819
                ParseFile (DoFile, argc - 1, argv + 1);
1820
                fclose (DoFile);
1821
                InitialiseData (); /* March 8 2000 :
1822
                                    * added to make sure any environment
1823
                                    *  variables which are directly used as
1824
                                    *  C structures are set. */
1825
                return (TCL_OK);
1826
        }
1827
}
1828
/******************** Calling the count nets with few nodes ***********************/
1829
/*
1830
@title
1831
count_nets [ <threshold> ]
1832
@application vertical_pin
1833
@application vertical_hdl
1834
@application vertical_pcb
1835
@text
1836
Report on nets with a node count less than or equal to threshold. Used to find
1837
hanging unrouted nets where there is an error in the netname.
1838
@break
1839
If no threshold is given , the threshold defaults to 1
1840
@end
1841
*/
1842
 
1843
int COUNTNETSHandler (ET_TCLARGS)
1844
{
1845
        long limit;
1846
        if (argc < 1)
1847
                limit = 1;
1848
        else
1849
                limit = atoi (argv[0]);
1850
        count_nets_with_few_nodes ((int) limit);
1851
 
1852
        return (TCL_OK);
1853
}
1854
 
1855
/*********************** Ensure Templates Command  ***************************/
1856
/* this ensures all templated sockets have all correct pin properties */
1857
 
1858
/*
1859
@title
1860
Socket Templating Background Information
1861
@application vertical_pin
1862
@application vertical_hdl
1863
@application vertical_pcb
1864
@text
1865
When the maxplus2 software runs and it fits a design to  an
1866
EPLD, it only lists out the pins that it has in fact  used.
1867
All unused pins on a chip will remain unknown to VERTICAL. The
1868
use of templates is meant to overcome this. If a template is
1869
read in for a particular device type , the VERTICAL tool  can
1870
ensure that every instance of that device in the design will
1871
have all of its pins available. An aliasing mechanism exists
1872
for allowing a group of device types (e.g. speed variants) to
1873
all share the same template.
1874
@break
1875
In addition in Vertical-HDL, the socket templates are used as being logically equivalent to a
1876
VHDL component declaration. The elaborate command ensures that the socket templates(
1877
declarations of ports and generics) are applied to the component instances.
1878
@break
1879
 
1880
There are two template commands. When these are issued, all
1881
sockets are checked to see if there is a template for them.
1882
For any socket with a template, if the socket lacks a pin
1883
identifier defined in the template, it is given an unassigned
1884
pin with that identifier and appropriate pin type.
1885
All definition of socket templating is achieved by the use of
1886
ACFP files. A socket type template has the same general syntax
1887
as the CHIP template. Pins are listed out with no name but
1888
with an identifier (pin number) and a direction. There is also
1889
the possiblility of aliasing chip types - e.g. all speed
1890
variants of the FLEX10k50GC403 have the same pinout. Only one
1891
template need be defined, the others can all be derived simply
1892
from it by using template aliasing in the acfp file.
1893
So you would find e.g.
1894
@listing
1895
TEMPLATE FLEX10K50GC403;
1896
BEGIN
1897
      "" : INPUT_PIN = AL1 ;
1898
.     "" : CONFIG_PIN = AL2;
1899
... more stuff ....
1900
END;
1901
@text
1902
Then, assuming you have
1903
@listing
1904
TEMPLATE EPM10K50GC403-3;
1905
BEGIN
1906
      ALIAS FLEX10K50GC403;
1907
END;
1908
@text
1909
Then if a chip of type EPM10K50GC403-3 is seen then the pinout
1910
template that will be used will be the FLEX10K50GC403 version.
1911
 
1912
@end
1913
 
1914
@title
1915
Templating Equivalent Pins: Series resistor handling
1916
@application vertical_pin
1917
@application vertical_hdl
1918
@application vertical_pcb
1919
@text
1920
In order to deal with problems associated with series
1921
termination resistors in signal lines on high performance
1922
FPGAs, where the resistors are seen as disconnections of nets,
1923
the concept of equivalent pins has been developed.
1924
@break
1925
If a device has equivalent pins then any signal seen on one
1926
equivalent pin can be regarded as also appearing on any other
1927
of the equivalent pins. As of Sep 2000 the pin directions of
1928
the device are ignored. If a device has equivalent pins then
1929
these can be automatically connected via 'virtual jumpers'
1930
allowing VERTICAL to then use the completed nets as signal
1931
paths between FPGAs
1932
@break
1933
An example of a template file for a dual in line
1934
series terminator resistor pack
1935
 
1936
@listing
1937
template rp8dil
1938
 
1939
begin
1940
  "" : bidir_pin = 1;
1941
  "" : bidir_pin = 2;
1942
  "" : bidir_pin = 3;
1943
  "" : bidir_pin = 4;
1944
  "" : bidir_pin = 5;
1945
  "" : bidir_pin = 6;
1946
  "" : bidir_pin = 7;
1947
  "" : bidir_pin = 8;
1948
  equivalent (1;8);
1949
  equivalent (2;7);
1950
  equivalent (3;6);
1951
  equivalent (4;5);
1952
end;
1953
@text
1954
The information in this file consists firstly of a list of pin
1955
identifiers, followed by a list of which pins can be regarded
1956
as equivalent.
1957
@break
1958
More than 2 pins may be included in the set of pins in an
1959
equivalent group.
1960
@break
1961
If this template file has been read in then for all devices of
1962
type 'rp8dil' the sequence of
1963
'template' followed by 'equivalent' will produce jumpers
1964
across pins 1 and 8 , 2 and 7 , 3 and 6 , also 4 and 5. Then
1965
when routing is performed, Vertical will be able to see wired
1966
connections across the resistor packs and complete the
1967
routing.
1968
@break
1969
Note that this mechanism can be applied to single resistors, or 8 pin devices with different
1970
resistor arrangements (e.g. SIL rather than DIL).
1971
@break
1972
For example a two pin resistor:
1973
@listing
1974
template res0805
1975
 
1976
begin
1977
  "" : bidir_pin = 1;
1978
  "" : bidir_pin = 2;
1979
  equivalent (1;2);
1980
end;
1981
@end
1982
 
1983
@title
1984
template <socket_id_template>
1985
@application vertical_pin
1986
@application vertical_hdl
1987
@application vertical_pcb
1988
@text
1989
Apply the templating process to all sockets whose identifiers match the given template e.g.
1990
'U1*' which have a valid template defining pin directions and unrouable pins for example.
1991
@text
1992
DO NOT define any pins that the device ought to posess according to the template but which are
1993
not used in the netlist.
1994
@end
1995
*/
1996
int EnsureTemplateHandler (ET_TCLARGS)
1997
{
1998
        char *Word = NULL;
1999
        if (argc > 0)
2000
                Word = argv[0];
2001
        template_ensure (Word, TEMPLATE_NO_OP);
2002
        return (TCL_OK);
2003
}
2004
/*********************** Create Template Command  ***************************/
2005
/* this ensures all sockets have all pins available even if not connected to nets*/
2006
/*
2007
@title
2008
create_template <socket_id_template>
2009
@application vertical_pin
2010
@application vertical_hdl
2011
@application vertical_pcb
2012
@text
2013
Apply the templating process to all sockets whose identifiers match the given template e.g.
2014
'U1*' which have a valid template defining pin directions and unrouable pins for example.
2015
@text
2016
DEFINE any pins that the device ought to posess according to the template but which are not
2017
used in the netlist.
2018
@end
2019
*/
2020
int EnsureCreateTemplateHandler (ET_TCLARGS)
2021
{
2022
        char *Word = NULL;
2023
        if (argc > 0)
2024
                Word = argv[0];
2025
        template_ensure (Word, TEMPLATE_CREATE_MISSING_PINS);
2026
        return (TCL_OK);
2027
}
2028
/*********************** Match Template Command  ***************************/
2029
/* this ensures all sockets have all pins available even if not connected to nets*/
2030
/*
2031
@title
2032
match_template <socket_id_template>
2033
@application vertical_pin
2034
@application vertical_hdl
2035
@application vertical_pcb
2036
@text
2037
Apply the templating process to all sockets whose identifiers match the given template e.g.
2038
'U1*' which have a valid template defining pin directions and unrouable pins for example.
2039
@text
2040
DEFINE any pins that the device ought to posess according to the template but which are not
2041
used in the netlist.
2042
@break
2043
DISCONNECT any pins that the device socket has , but which are not in the template. This is for
2044
use with FPGAs which have fewer pins connected than there are pins in the socket (eg APEX
2045
20k600 in a 20k1000 position)
2046
@break
2047
Any nets that are disconnected are also set as not routable so that they are not listed
2048
in Verilog output.
2049
@end
2050
*/
2051
int EnsureMatchTemplateHandler (ET_TCLARGS)
2052
{
2053
        char *Word = NULL;
2054
        if (argc > 0)
2055
                Word = argv[0];
2056
        template_ensure (Word, TEMPLATE_CREATE_MISSING_PINS | TEMPLATE_DISCONNECT_PINS);
2057
        return (TCL_OK);
2058
}
2059
 
2060
/* ********************* extract template command **********************************/
2061
/*
2062
@title
2063
extract_template
2064
@application vertical_pin
2065
@application vertical_hdl
2066
@application vertical_pcb
2067
@text
2068
This command scans the netlist for all chips or components of the same type and produces
2069
a single description of the component in a template which is then used in write vhdl or
2070
write verilog commands. It is also usable in other cases where chip templates are needed,
2071
they can be extracted from the PCB netlist instead of needing additional work to create them.
2072
@break
2073
Pins will only be created on the template if
2074
They are connected to a net.
2075
@end
2076
*/
2077
 
2078
int ExtractTemplateHandler (ET_TCLARGS)
2079
{
2080
        /* templates are used to make VHDL component instances
2081
           match up to the declared components */
2082
        extract_templates ();
2083
        return (TCL_OK);
2084
}
2085
/*********************** modify_names Command  ***************************/
2086
/*
2087
@title
2088
modify_names <socket_id> [ <alternate_prefix> ]
2089
@application vertical_pin
2090
@application vertical_hdl
2091
@application vertical_pcb
2092
@text
2093
This affects the name of nets, not the pins of the device to which they are connected.
2094
@break
2095
Routable nets attached to pins on sockets are renamed to be by default socketID_pinID
2096
in order to make them more traceable.
2097
If an alternate prefix is given then it is used instead (not advisable if the socket name
2098
regular expression will match more than one socket).
2099
@end
2100
*/
2101
int Modify_NamesHandler (ET_TCLARGS)
2102
{
2103
        if (argc)
2104
        {
2105
                alter_net_to_socket_name (argv[0], argc > 1 ? argv[1] : NULL);
2106
        }
2107
        else
2108
        {
2109
                Log (LOG_ERROR, "-- Need at least one socket identifier for this command\n");
2110
                return (TCL_ERROR);
2111
        }
2112
        return (TCL_OK);
2113
}
2114
 
2115
/*********************** edit_pins type Command  ***************************/
2116
/*
2117
@title
2118
edit_pins type <socket_type> <pin_match_pattern> <replacement>
2119
@application vertical_pin
2120
@application vertical_hdl
2121
@application vertical_pcb
2122
@application regular_exp
2123
@text
2124
This command is a more sophisticated form of the swap command.
2125
@break
2126
Searching finds all sockets of a given TYPE.
2127
@break
2128
All sockets are searched for in both component template and netlist space.
2129
If a socket type is matched then the pin identifiers are edited using regular expressions.
2130
 
2131
e.g.
2132
@listing
2133
edit_pins type SK ([a-z]+)([0-9]+) &2&1
2134
@text
2135
Will reverse  (on sockets of type 'SK) all pin identifiers identified by letters followed by
2136
digits, swapping the letter and digit parts of the string.
2137
@break
2138
See edit_pins ident for more information on the regular expressions and pattern replacement of
2139
these commands.
2140
@break
2141
This supercedes the swap command which is kept for compatibility.
2142
 
2143
 
2144
@end
2145
*/
2146
 
2147
int Edit_PinNames_By_ChipType_Handler (ET_TCLARGS)
2148
{
2149
        if (argc >= 3)
2150
        {
2151
                edit_socket_pin_name (argv[0], argv[1], argv[2], Type);
2152
        }
2153
        else
2154
        {
2155
                Log (
2156
                    LOG_ERROR,
2157
                    "-- Need socket type, a search and replace pattern for this command\n");
2158
                return (TCL_ERROR);
2159
        }
2160
        return (TCL_OK);
2161
}
2162
 
2163
/*********************** edit_pins ident  Command  ***************************/
2164
/*
2165
@title
2166
edit_pins ident <socket_ident> <pin_match_pattern> <replacement>
2167
@application vertical_pin
2168
@application vertical_hdl
2169
@application vertical_pcb
2170
@application regular_exp
2171
@text
2172
@text
2173
This command is a more sophisticated form of the swap command.
2174
@break
2175
Searching finds all sockets with matching IDENTIFIERS.
2176
@break
2177
If a socket identifier is matched then the pin identifiers are edited using regular
2178
expressions.
2179
 
2180
e.g.
2181
@listing
2182
edit_pins ident U[0-9] ([a-z]+)([0-9]+) &2&1
2183
@text
2184
Will reverse all pins identifiers on chip U0 .. U9 where the pins are identified by letters
2185
followed by digits, swapping the letter and digit parts of the string.
2186
@break
2187
The pattern &0 is a special pattern which means the whole of the string.
2188
@listing
2189
edit type ep20k1000efc672 .* pin_&0
2190
@text
2191
Will prefix all pin identifiers with "pin_" on all sockets of type ep20k1000efc672
2192
@break
2193
This command will also work with HDL port names...
2194
@listing
2195
The special patterns that can be used in the replace string are:
2196
&0     : the whole of the matched pattern
2197
&1..&9 : The n'th bracketed regular expression
2198
&a     : The alphabetic = column identifier part of an alphanumeric pin ident
2199
&n     : The numeric = row identifier part of an alphanumeric pin ident
2200
&c     : The identifier of the connected net
2201
&d     : The chip identifier
2202
&i     : The numerical pin index = row + column * total_rows
2203
@text
2204
The &a,&n and &i patterns are extracted from the _current_ pin identifiers of the chip.
2205
If you have already edited the pin identifiers then the pin identification is extracted from
2206
the new pin identifier pattern. There may be some problems created if the command is repeated
2207
on the the same chip.
2208
@break
2209
All of the alphabetic part of the pin identifiers are converted to numbers representing device
2210
pin columns. Dont use this command with pin identifiers with a lot of letters like BOOT12, as
2211
the conversion of letters to numbers can cause arithmetic overflows and strange results.
2212
@break
2213
 Currently the illegal characters in pin identifiers are PIN_MAP_ILLEGAL_CHARS. If these appear
2214
they are mapped onto the next character in the alphabet.
2215
@break
2216
It is possible to define the rows and columns of a chip where the pin identifiers are numeric
2217
@listing
2218
 
2219
set generic attribute SK2 min_pin_row 1
2220
set generic attribute SK2 max_pin_row 50
2221
set generic attribute SK2 min_pin_col 0
2222
set generic attribute SK2 max_pin_col 3
2223
@text
2224
This is describing a 200 pin package with 4 columns of 50 rows. Rows number from 1 to N,
2225
columns from 0 to M-1.
2226
@end
2227
*/
2228
 
2229
int Edit_PinNames_By_ChipIdent_Handler (ET_TCLARGS)
2230
{
2231
        if (argc >= 3)
2232
        {
2233
                edit_socket_pin_name (argv[0], argv[1], argv[2], Ident);
2234
        }
2235
        else
2236
        {
2237
                Log (
2238
                    LOG_ERROR,
2239
                    "-- Need socket ident, a search and replace pattern for this command\n");
2240
                return (TCL_ERROR);
2241
        }
2242
        return (TCL_OK);
2243
}
2244
 
2245
CommandMenu const EditPinNamesMenu = {
2246
    {"ident",
2247
     3,
2248
     Edit_PinNames_By_ChipIdent_Handler,
2249
     NULL,
2250
     "Edit pin names selecting chips by ID",
2251
     "<chip_name_template> <search_expr> <replace_expr>",
2252
     NULL},
2253
    {"type",
2254
     3,
2255
     Edit_PinNames_By_ChipType_Handler,
2256
     NULL,
2257
     "Edit pin names selecting chips by Type",
2258
     "<chip_name_template> <search_expr> <replace_expr>",
2259
     NULL},
2260
    {NULL, 0, NULL, NULL, NULL, NULL},
2261
};
2262
 
2263
/*********************** edit_nets ident Command  ***************************/
2264
/*
2265
@title
2266
edit_nets name <net_match_pattern> <replacement>
2267
@application vertical_pin
2268
@application vertical_hdl
2269
@application vertical_pcb
2270
@application regular_exp
2271
@text
2272
This commmand matches all nets by name and then renames them according to the replacement
2273
pattern.
2274
@listing
2275
The special patterns that can be used in the replace string are:
2276
&0     : the whole of the matched pattern
2277
&1..&9 : The n'th bracketed regular expression
2278
&n     : The net name in its entirety
2279
&i     : The net identifier
2280
@break
2281
I am sure that this command is extremely dangerous but anyway it is provided.
2282
@end
2283
*/
2284
 
2285
int Edit_NetNames_Handler (ET_TCLARGS)
2286
{
2287
        if (argc >= 2)
2288
        {
2289
                edit_net_names (argv[0], argv[1], Name);
2290
        }
2291
        else
2292
        {
2293
                Log (LOG_ERROR, "-- Need  a search and replace pattern for this command\n");
2294
                return (TCL_ERROR);
2295
        }
2296
        return (TCL_OK);
2297
}
2298
 
2299
/*********************** edit_nets ident Command  ***************************/
2300
/*
2301
@title
2302
edit_nets ident <net_match_pattern> <replacement>
2303
@application vertical_pin
2304
@application vertical_hdl
2305
@application vertical_pcb
2306
@application regular_exp
2307
@text
2308
This commmand matches all nets by identifier and then replaces identifier according to the
2309
replacement pattern.
2310
@listing
2311
The special patterns that can be used in the replace string are:
2312
&0     : the whole of the matched pattern
2313
&1..&9 : The n'th bracketed regular expression
2314
&n     : The net name in its entirety
2315
&i     : The net identifier
2316
@break
2317
I am sure that this command is extremely dangerous but anyway it is provided.
2318
 
2319
@end
2320
*/
2321
 
2322
int Edit_NetIdents_Handler (ET_TCLARGS)
2323
{
2324
        if (argc >= 2)
2325
        {
2326
                edit_net_names (argv[0], argv[1], Ident);
2327
        }
2328
        else
2329
        {
2330
                Log (LOG_ERROR, "-- Need  a search and replace pattern for this command\n");
2331
                return (TCL_ERROR);
2332
        }
2333
        return (TCL_OK);
2334
}
2335
 
2336
/*********************** Top level menu driver ******************************/
2337
 
2338
CommandMenu const EditNetNamesMenu = {
2339
    {"name",
2340
     3,
2341
     Edit_NetNames_Handler,
2342
     NULL,
2343
     "Edit net names ",
2344
     "<search_expr> <replace_expr>",
2345
     NULL},
2346
    {"ident",
2347
     3,
2348
     Edit_NetIdents_Handler,
2349
     NULL,
2350
     "Edit net idents ",
2351
     "<search_expr> <replace_expr>",
2352
     NULL},
2353
    {NULL, 0, NULL, NULL, NULL, NULL},
2354
};
2355
 
2356
/*********************** Bundle Command  ***************************/
2357
/*
2358
@title
2359
bundle <socket_id> [ <socket_id> * ]
2360
@application vertical_hdl
2361
@text
2362
The bundle command is used with Certify in order to reduce the port count of a
2363
PCB. It converts all of the signals connected to a single multipin socket into
2364
a single bus where each pin of the bus is defined according to the connector pin identifier.
2365
@break
2366
The initial assumption is that each socket will have pins labelled either 'a1' or '1a' or
2367
simply numbers or letters.
2368
@break
2369
In each case the letter codes are regarded as the columns of the connector and
2370
the numbers as the rows of the connector.
2371
@break
2372
The highest and lowest numbered rows are identified and once the number of rows is
2373
known the array index of the bundle is defined by :
2374
@listing
2375
BundleIndex = RowNum-LowestRow + (ColNum-LowestCol)*TotalRows;
2376
@text
2377
This should always be consistent for any multipole connector.
2378
@break
2379
A port on the top level of the design will appear, the net identifier is the same as the
2380
connector identifier. If Verilog printout is used then the ports will be assigned automatically
2381
to the correct signals.
2382
@break
2383
This command is fully implemented for working with
2384
"write vlog", Verilog output. It is not
2385
yet implemented for "write VHDL", VHDL output.
2386
 
2387
@end
2388
*/
2389
int BundleHandler (ET_TCLARGS)
2390
{
2391
        int i = 0;
2392
        char *Word = NULL;
2393
        while (i < argc)
2394
        {
2395
                Word = argv[i++];
2396
                wildcard_bundle (Word, 1);
2397
        }
2398
        return (TCL_OK);
2399
}
2400
 
2401
/*********************** UnBundle Command  ***************************/
2402
/*
2403
@title
2404
unbundle <socket_id> [ <socket_id> * ]
2405
@application vertical_hdl
2406
@text
2407
The unbundle command is used to undo the effect of the bundle command.
2408
@end
2409
*/
2410
int UnBundleHandler (ET_TCLARGS)
2411
{
2412
        int i = 0;
2413
        char *Word = NULL;
2414
        while (i < argc)
2415
        {
2416
                Word = argv[i++];
2417
                wildcard_bundle (Word, 0);
2418
        }
2419
        return (TCL_OK);
2420
}
2421
 
2422
/*********************** Jumper Equivalent Pins Command  ***************************/
2423
/* Connect together pin groups that are equivalent */
2424
/*
2425
@title
2426
equivalent
2427
@application vertical_pin
2428
@application vertical_hdl
2429
@application vertical_pcb
2430
@text
2431
@text
2432
The netlist is searched for all sockets which have had a template applied to them, which
2433
includes defined equivalent pins, or the socket has an equivalent pins section defined in the
2434
ACF source file.
2435
@break
2436
For these sockets,
2437
 a netlist jumper is created to create a logical short circuit between the sets of defined
2438
equivalent pins
2439
@break
2440
This is used in order to create logical shorts across series termination resistors. For example
2441
from a well known FPGA672 card:
2442
@listing
2443
-- an ACFP template file
2444
template resistor
2445
begin
2446
 "" : bidir_pin = 1;
2447
 "" : bidir_pin = 2;
2448
 equivalent (1;2);
2449
end;
2450
 
2451
 
2452
template "RES INNER 16R"
2453
begin
2454
  alias resistor;
2455
end;
2456
 
2457
template "RES INNER 51R"
2458
begin
2459
  alias resistor;
2460
end;
2461
@text
2462
Which is read in and then the template command is applied for all resistors in the design.
2463
Only those of type 'resistor', "RES INNER 16R" and "RES INNER 51R" would have their pins
2464
connected together in this case.
2465
@break
2466
 It can also be used to make e.g. bus buffers invisible for the purpose of routing signals from
2467
interface pins via a bus buffer: something like
2468
@listing
2469
template bus245buf
2470
begin
2471
  "" : bidir pin = 2;
2472
  "" : bidir pin = 3;
2473
....
2474
 
2475
 
2476
  "" : bidir_pin = 18;
2477
  "" : bidir_pin = 17;
2478
  equivalent (2;18);
2479
  equivalent (3;17);
2480
...
2481
end;
2482
 
2483
template "74HCT245"
2484
begin
2485
  alias bus245buf;
2486
end;
2487
 
2488
 
2489
-- Schematic netlist component library naming error
2490
-- mapped by alias template
2491
template "bizarre245"
2492
begin
2493
  alias bus245buf;
2494
end;
2495
 
2496
@text
2497
Which will short out any type of 245 buffer for the purpose of signal routing. It is expected
2498
to introduce the concept of directional jumpers to more correctly map the behaviour of a bus
2499
buffer. At the moment Vertical will not take any notice of unidirectional buffers !
2500
@end
2501
*/
2502
 
2503
int JumperEquivPairsHandler (ET_TCLARGS)
2504
{
2505
        jumper_equivalent_pins ();
2506
        return (TCL_OK);
2507
}
2508
 
2509
/*********************** Elaborate Command  ***************************/
2510
/* Connect together pin groups that are equivalent */
2511
/*
2512
@title
2513
elaborate
2514
@application vertical_pin
2515
@application vertical_hdl
2516
@application vertical_pcb
2517
@break
2518
This performs exactly the same task as for VHDL. All component instances which use a declared
2519
component are elaborated into unique instances of that component.
2520
@break
2521
Generic values are then evaluated for such things as bus widths on ports which have
2522
variable widths defined by constants and expressions of those constants.
2523
@break
2524
Finally, all of the unrouted nets created by the implied connections of VHDL component
2525
instances (port name matching and renaming via port=>fred types of mapping)
2526
are converted into wires by creating wiring automatically.
2527
@end
2528
*/
2529
 
2530
int ElaborateHandler (ET_TCLARGS)
2531
{
2532
        /* templates are used to make VHDL component instances
2533
           match up to the declared components */
2534
        template_ensure (NULL, Search);
2535
        elaborate_all ();
2536
        create_vhdl_connections ();
2537
        perform_routing (By_Creating);
2538
 
2539
        return (TCL_OK);
2540
}
2541
 
2542
/******************** Swapping pin ids on sockets.  ***************************/
2543
/* first arg. chip ID template, second is max number of chars before letter  ***********/
2544
/*
2545
@title
2546
swap <identifier> [ <style> ]
2547
@application vertical_pin
2548
@application vertical_pcb
2549
@text
2550
This is replaced by the edit_pin commands, which can do much more than this.
2551
@break
2552
All pin identifiers on the device identified (or identified by the "name*") type of syntax will
2553
be converted to the defined style.
2554
@break
2555
Valid styles are "1a" or "a1" indicating either leading or trailing numeric parts to the
2556
pin identifier.
2557
@break
2558
SO the following would happen:
2559
@listing
2560
Style           | A1  | A1 | 1A  | 1A
2561
-------------------------------------
2562
Original ident  | X32 | 4b | X32 | 4b
2563
Swapped ident   | X32 | b4 | 32X | 4B
2564
@text
2565
The default style is "A1".
2566
 
2567
@end
2568
*/
2569
 
2570
int SwapIdHandler (ET_TCLARGS)
2571
{
2572
        char *Template = NULL;
2573
        int limit;
2574
        AlphaSwap_t swapping;
2575
        Log (LOG_GENERAL, "# Freezing pin renames\n");
2576
        create_unrouted_list ();
2577
        limit = 2;
2578
        swapping = Want_A1;
2579
        if (argc > 0)
2580
                Template = argv[0];
2581
 
2582
        if (argc > 1)
2583
        {
2584
                if (isalpha (argv[1][0]))
2585
                {
2586
                        swapping = Want_A1;
2587
                }
2588
                else
2589
                {
2590
                        swapping = Want_1A;
2591
                }
2592
        }
2593
 
2594
        if (argc > 2)
2595
        {
2596
                limit = atoi (argv[2]);
2597
        }
2598
 
2599
        pin_id_swap (Template, limit, swapping);
2600
        return (TCL_OK);
2601
}
2602
/*********************** SetEnv ***************************/
2603
/* Set acfread environment */
2604
/*
2605
@title
2606
setenv <name> <string>
2607
@application vertical_pin
2608
@application vertical_hdl
2609
@application vertical_pcb
2610
@text
2611
The environment variable is a special class of generic which
2612
is not used in e.g. VHDL listings.
2613
@break
2614
It is rougly equivalent to the shell environment variables
2615
which may also be looked up by Vertical if no variable/generic
2616
of the wanted name exists inside Vertical.
2617
@break
2618
Set the environment variable (looked up by $(name) within netlists)
2619
named to be the string given. e.g.
2620
@listing
2621
setenv fred "A string"
2622
echo $(fred)
2623
@text
2624
Will result in the string
2625
@listing
2626
A string
2627
@text
2628
appearing on standard output and in the log file.
2629
@end
2630
*/
2631
 
2632
int SetEnvHandler (ET_TCLARGS)
2633
{
2634
        generic_info_t info;
2635
        if (argc < 2)
2636
                return TCL_ERROR;
2637
        info.name = argv[0];
2638
        info.typename = "env_string";
2639
        info.g_type = IS_STRING;
2640
        info.expr = compile_string (argv[1]);
2641
        set_generic_value (&global_generics, &info);
2642
        return (TCL_OK);
2643
}
2644
 
2645
/*********************** ECHO ***************************/
2646
/*
2647
@title
2648
echo [ <string>* ]
2649
@application vertical_pin
2650
@application vertical_hdl
2651
@application vertical_pcb
2652
@text
2653
Prints out the strings given to standard output and to the
2654
Vertical log file.
2655
@end
2656
*/
2657
int ECHOHandler (ET_TCLARGS)
2658
{
2659
        int i;
2660
        for (i = 0; i < argc; i++)
2661
        {
2662
                Log (LOG_GENERAL, "%s ", argv[i]);
2663
        };
2664
        Log (LOG_GENERAL, "\n");
2665
        return (TCL_OK);
2666
}
2667
/*********************** ECHO quoted ***************************/
2668
/*
2669
@title
2670
echoq [ <string>* ]
2671
@application vertical_pin
2672
@application vertical_hdl
2673
@application vertical_pcb
2674
@text
2675
Prints out the strings given , with "" quotes around them to standard output and to the
2676
Vertical log file. used to check command parser behaviour. It also can show up any variable
2677
with space characters in its value (which may be a problem)
2678
@listing
2679
Vertical : setenv earwig "one two "
2680
Vertical : echoe  $(earwig)
2681
"one two "
2682
Vertical : echo   $(earwig)
2683
one two
2684
@text
2685
In the second echo example it is not clear there is a space inside
2686
the variable.
2687
 
2688
@end
2689
*/
2690
int ECHOQHandler (ET_TCLARGS)
2691
{
2692
        int i;
2693
        for (i = 0; i < argc; i++)
2694
        {
2695
                Log (LOG_GENERAL, "\"%s\" ", argv[i]);
2696
        };
2697
        Log (LOG_GENERAL, "\n");
2698
        return (TCL_OK);
2699
}
2700
/*********************** ECHO to error log ***************************/
2701
/*
2702
@title
2703
echoe [ <string>* ]
2704
@application vertical_pin
2705
@application vertical_hdl
2706
@application vertical_pcb
2707
@text
2708
This is echoe where the e stands for ERROR. Allows tagging of the error report file
2709
with the progress of scripts. It also prints to the standard Vertical log file.
2710
@break
2711
Prints out the strings given to standard output and to the Vertical ERROR log file
2712
@end
2713
*/
2714
 
2715
int ECHOEHandler (ET_TCLARGS)
2716
{
2717
        int i;
2718
        for (i = 0; i < argc; i++)
2719
        {
2720
                Log (LOG_ERROR, "%s ", argv[i]);
2721
        };
2722
        Log (LOG_ERROR, "\n");
2723
        for (i = 0; i < argc; i++)
2724
        {
2725
                Log (LOG_GENERAL, "%s ", argv[i]);
2726
        };
2727
        Log (LOG_GENERAL, "\n");
2728
 
2729
        return (TCL_OK);
2730
}
2731
 
2732
/**************************************************/
2733
/* Disconnect node handler
2734
@title
2735
disconnect <chip>'('<pin_ident>')'  ( <chip>'('<pin_ident>')' ) *
2736
@application vertical_pin
2737
@application vertical_hdl
2738
@application vertical_pcb
2739
@text
2740
The pin will be disconnected from the routed net list. This is is used to delete pins
2741
on chips which are broken. For more than a few pins on the chip it is better to use
2742
the template command to disconnect unused pins en masse.
2743
@break
2744
This command has been promised for about 5 years but was implemented only in 2001.
2745
@end
2746
*/
2747
 
2748
int DisconnectNodeHandler (ET_TCLARGS)
2749
{
2750
        int i;
2751
        char *s, *t, *u;
2752
        socket_t *socket;
2753
        node_t *node;
2754
        if (argc < 2)
2755
                return (TCL_ERROR);
2756
        for (i = 0; i < argc; i++)
2757
        {
2758
                s = strdup (argv[i]);
2759
                /* look for (x) and point at it and the closing bracket */
2760
                t = strchr (s, '(');
2761
                if (t)
2762
                {
2763
                        u = strchr (t, ')');
2764
                        if (u)
2765
                        {
2766
                                *t++ = 0; /* terminate first half of string, point at second
2767
                                             string */
2768
                                *u = 0;   /* terminate second  string */
2769
                                socket = find_socket (Ident, s, Search, &socket_head);
2770
                                if (socket)
2771
                                {
2772
                                        node = find_node (socket, Ident, t, Search);
2773
                                        if (node)
2774
                                        {
2775
                                                disconnect_node (socket, node);
2776
                                        }
2777
                                        else
2778
                                        {
2779
                                                Log (
2780
                                                    LOG_GENERAL,
2781
                                                    "-- No pin '%s' on socket '%s'\n",
2782
                                                    t,
2783
                                                    s);
2784
                                        }
2785
                                }
2786
                                else
2787
                                {
2788
                                        Log (LOG_GENERAL, "-- No socket '%s'\n", s);
2789
                                }
2790
                        }
2791
                }
2792
                if (!t || !u)
2793
                {
2794
                        Log (LOG_GENERAL, "-- Use chip(pin) instead of '%s'\n", argv[i]);
2795
                }
2796
                free (s); /* free up allocated string */
2797
        }
2798
        return (TCL_OK);
2799
}
2800
 
2801
/**********************************************************/
2802
/*
2803
@title
2804
version
2805
@application vertical_pin
2806
@application vertical_hdl
2807
@application vertical_pcb
2808
@text
2809
List out all of the RCS/CVS $header$ tagged modules present
2810
in Vertical and the netlist readers. This allows for identification
2811
of the exact versions of code used within a particular build of
2812
Vertical.
2813
@end
2814
*/
2815
int VersionHandler (ET_TCLARGS)
2816
{
2817
        list_versions (stdout);
2818
        return TCL_OK;
2819
}
2820
 
2821
/**********************************************************/
2822
/*
2823
@title
2824
require <minimum_version>
2825
@application vertical_pin
2826
@application vertical_hdl
2827
@application vertical_pcb
2828
@text
2829
The lowest release version of Vertical required to run this script is the command argument.
2830
@break
2831
If the Vertical version is older than that required, then an error will appear. Before
2832
Version 16.0 the error is because the require command does not exist. Above this version, the
2833
number given is checked
2834
 
2835
 
2836
@end
2837
*/
2838
int RequireHandler (ET_TCLARGS)
2839
{
2840
        if (argc < 1)
2841
        {
2842
                return (TCL_ERROR);
2843
        }
2844
 
2845
        if (strcmp (Vertical_Version, argv[0]) >= 0)
2846
        {
2847
                Log (
2848
                    LOG_GENERAL,
2849
                    "# Vertical version %s is OK, version %s required for this script\n",
2850
                    Vertical_Version,
2851
                    argv[0]);
2852
                return (TCL_OK);
2853
        }
2854
        else
2855
        {
2856
                Log (
2857
                    LOG_ERROR,
2858
                    "# ERROR : Vertical version %s is too old , version %s required for this "
2859
                    "script\n",
2860
                    Vertical_Version,
2861
                    argv[0]);
2862
 
2863
                return (TCL_ERROR);
2864
        }
2865
 
2866
        return TCL_OK;
2867
}
2868
 
2869
/*********************** Top level menu driver ******************************/
2870
 
2871
CommandMenu const TopMenu = {
2872
    {"bye", 3, BYEHandler, NULL, "Leave program", NULL},
2873
    {"quit", 1, BYEHandler, NULL, "Leave program", NULL},
2874
    {"bundle",
2875
     3,
2876
     BundleHandler,
2877
     NULL,
2878
     "Bundle together nets leaving connector",
2879
     "[<chip_name_template>*]",
2880
     NULL},
2881
    {"modify_names",
2882
     3,
2883
     Modify_NamesHandler,
2884
     NULL,
2885
     "Rename nets to match chip pin identifiers",
2886
     " <chip_name_template> <optional_prefix>",
2887
     NULL},
2888
    {"equivalent",
2889
     3,
2890
     JumperEquivPairsHandler,
2891
     NULL,
2892
     "Connect together equivalent pins on devices by jumpers",
2893
     "",
2894
     NULL},
2895
    {"elaborate",
2896
     3,
2897
     ElaborateHandler,
2898
     NULL,
2899
     "VHDL style variable elaboration handler",
2900
     "",
2901
     NULL},
2902
    {"exit", 3, BYEHandler, NULL, "Leave program", NULL},
2903
    {"extract_template",
2904
     3,
2905
     ExtractTemplateHandler,
2906
     NULL,
2907
     "Extract component declarations from netlist",
2908
     "",
2909
     NULL},
2910
    {"echoe",
2911
     5,
2912
     ECHOEHandler,
2913
     NULL,
2914
     "Expand remainder of line and print it as an error",
2915
     NULL},
2916
    {"echoq",
2917
     5,
2918
     ECHOQHandler,
2919
     NULL,
2920
     "Expand remainder of line and print strings as quoted",
2921
     NULL},
2922
    {"echo", 4, ECHOHandler, NULL, "Expand remainder of line and print it out", NULL},
2923
    {"edit_pins",
2924
     6,
2925
     NULL,
2926
     EditPinNamesMenu,
2927
     "Rename pin identifiers on chips ",
2928
     "(more)",
2929
     NULL},
2930
    {"edit_nets", 6, NULL, EditNetNamesMenu, "Rename net identifiers ", "(more)", NULL},
2931
    {"do", 2, DOHandler, NULL, "Run a batch file", "<do_file>", NULL},
2932
    {"read",
2933
     4,
2934
     READHandler,
2935
     NULL,
2936
     "Read a data file in with <suffix> on net and socket IDs",
2937
     "<acf_file> [<suffix>] [ <args> ]",
2938
     NULL},
2939
    {"list", 4, NULL, ListMenu, "Print information", "(more)", NULL},
2940
    {"setenv", 4, SetEnvHandler, NULL, "set environment variable", "<name> <value>", NULL},
2941
    {"set", 3, NULL, SetMenu, "Alter part of the database", "(more)", NULL},
2942
    {"delete", 3, NULL, DeleteMenu, "Remove part of the database", "(more)", NULL},
2943
    {"disconnect",
2944
     3,
2945
     DisconnectNodeHandler,
2946
     NULL,
2947
     "Remove a pin from a chip",
2948
     "chip(pin)",
2949
     NULL},
2950
    {"write", 4, NULL, WriteMenu, "Write out a data file", "(more)", NULL},
2951
    {"route", 4, ROUTEHandler, NULL, "Route the wiring", NULL},
2952
    {"preroute", 4, NULL, PrerouteMenu, "Partially route the wiring", "(more)", NULL},
2953
    {"fix_nets", 3, FIXHandler, NULL, "Fix unrouted connections to External ports", NULL},
2954
    {"count_nets",
2955
     3,
2956
     COUNTNETSHandler,
2957
     NULL,
2958
     "Count nets with less than <limit> nodes",
2959
     "[<limit>]",
2960
     NULL},
2961
    {"jumper",
2962
     4,
2963
     JUMPERHandler,
2964
     NULL,
2965
     "Create new paths with unique jumpers",
2966
     "[<suffix>]",
2967
     NULL},
2968
    {"partition", 3, PARTHandler, NULL, "Do the partition calculation", "", NULL},
2969
    {"logging", 3, NULL, LoggingMenu, "Setup transcript logging file", "(more)", NULL},
2970
    {"debug", 3, DEBUGHandler, NULL, "Internal debugging", "<debug_flags>", NULL},
2971
    {"template",
2972
     3,
2973
     EnsureTemplateHandler,
2974
     NULL,
2975
     "Ensure chips have correct pin directions only",
2976
     "[<chip_name_template>*]",
2977
     NULL},
2978
    {"create_template",
2979
     3,
2980
     EnsureCreateTemplateHandler,
2981
     NULL,
2982
     "Ensure chips have all possible pins",
2983
     "[<chip_name_template>*]",
2984
     NULL},
2985
    {"match_template",
2986
     3,
2987
     EnsureMatchTemplateHandler,
2988
     NULL,
2989
     "Ensure chips have all possible valid pins: disconnect extra pins ",
2990
     "[<chip_name_template>*]",
2991
     NULL},
2992
    {"connection",
2993
     3,
2994
     ConnectionHandler,
2995
     NULL,
2996
     "Connect two connectors pin for pin",
2997
     "<socket1> <socket2>",
2998
     NULL},
2999
    {"swap",
3000
     3,
3001
     SwapIdHandler,
3002
     NULL,
3003
     "reverse chip pin id A23=>23A",
3004
     "<chip_template> <max_letters>",
3005
     NULL},
3006
    {"reserve",
3007
     3,
3008
     ReservePinsHandler,
3009
     NULL,
3010
     "reserve pins for Altera FPGA use after routing",
3011
     "",
3012
     NULL},
3013
    {"require",
3014
     3,
3015
     RequireHandler,
3016
     NULL,
3017
     "Require a given version (or later) of VERTICAL",
3018
     "<version>",
3019
     NULL},
3020
    {"unbundle",
3021
     3,
3022
     UnBundleHandler,
3023
     NULL,
3024
     "Unbundle nets leaving connector",
3025
     "[<chip_name_template>*]",
3026
     NULL},
3027
    {"version", 3, VersionHandler, NULL, "list module versions to standard output", "", NULL},
3028
    {NULL, 0, NULL, NULL, NULL, NULL},
3029
};
3030
 
3031
/****************************************************************************/