WebSVN – dashGPS – Blame – /branches/dashGPS-bmp/build/main.lst

Rev	Author	Line No.	Line
19	mjames	1	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 1
16	mjames	2
		3
		4	1 .cpu cortex-m3
		5	2 .eabi_attribute 20, 1
		6	3 .eabi_attribute 21, 1
		7	4 .eabi_attribute 23, 3
		8	5 .eabi_attribute 24, 1
		9	6 .eabi_attribute 25, 1
		10	7 .eabi_attribute 26, 1
		11	8 .eabi_attribute 30, 1
		12	9 .eabi_attribute 34, 1
		13	10 .eabi_attribute 18, 4
		14	11 .file "main.c"
		15	12 .text
		16	13 .Ltext0:
		17	14 .cfi_sections .debug_frame
19	mjames	18	15 .section .text.user_delay_us,"ax",%progbits
16	mjames	19	16 .align 1
		20	17 .arch armv7-m
		21	18 .syntax unified
		22	19 .thumb
		23	20 .thumb_func
		24	21 .fpu softvfp
19	mjames	25	23 user_delay_us:
16	mjames	26	24 .LVL0:
		27	25 .LFB70:
		28	26 .file 1 "Core/Src/main.c"
		29	1:Core/Src/main.c **** /* USER CODE BEGIN Header */
		30	2:Core/Src/main.c ** /
		31	3:Core/Src/main.c ** ****************************************************************************
		32	4:Core/Src/main.c **** * @file : main.c
		33	5:Core/Src/main.c **** * @brief : Main program body
		34	6:Core/Src/main.c ** ****************************************************************************
		35	7:Core/Src/main.c **** * @attention
		36	8:Core/Src/main.c **** *
		37	9:Core/Src/main.c **** * <h2><center>© Copyright (c) 2020 STMicroelectronics.
		38	10:Core/Src/main.c **** * All rights reserved.</center></h2>
		39	11:Core/Src/main.c **** *
		40	12:Core/Src/main.c **** * This software component is licensed by ST under BSD 3-Clause license,
		41	13:Core/Src/main.c **** * the "License"; You may not use this file except in compliance with the
		42	14:Core/Src/main.c **** * License. You may obtain a copy of the License at:
		43	15:Core/Src/main.c **** * opensource.org/licenses/BSD-3-Clause
		44	16:Core/Src/main.c **** *
		45	17:Core/Src/main.c ** ****************************************************************************
		46	18:Core/Src/main.c **** */
		47	19:Core/Src/main.c **** /* USER CODE END Header */
		48	20:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/
		49	21:Core/Src/main.c **** #include "main.h"
		50	22:Core/Src/main.c **** #include "usb_device.h"
		51	23:Core/Src/main.c ****
		52	24:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/
		53	25:Core/Src/main.c **** /* USER CODE BEGIN Includes */
		54	26:Core/Src/main.c **** #include "libSerial/serial.h"
19	mjames	55	27:Core/Src/main.c **** #include "libBME280/bme280.h"
16	mjames	56	28:Core/Src/main.c **** #include "display.h"
		57	29:Core/Src/main.c **** /* USER CODE END Includes */
		58	30:Core/Src/main.c ****
		59	31:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/
		60	32:Core/Src/main.c **** /* USER CODE BEGIN PTD */
19	mjames	61	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 2
16	mjames	62
		63
		64	33:Core/Src/main.c ****
		65	34:Core/Src/main.c **** /* USER CODE END PTD */
		66	35:Core/Src/main.c ****
		67	36:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/
		68	37:Core/Src/main.c **** /* USER CODE BEGIN PD */
		69	38:Core/Src/main.c **** /* USER CODE END PD */
		70	39:Core/Src/main.c ****
		71	40:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/
		72	41:Core/Src/main.c **** /* USER CODE BEGIN PM */
		73	42:Core/Src/main.c ****
		74	43:Core/Src/main.c **** /* USER CODE END PM */
		75	44:Core/Src/main.c ****
		76	45:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/
		77	46:Core/Src/main.c **** I2C_HandleTypeDef hi2c2;
		78	47:Core/Src/main.c ****
		79	48:Core/Src/main.c **** RTC_HandleTypeDef hrtc;
		80	49:Core/Src/main.c ****
		81	50:Core/Src/main.c **** SPI_HandleTypeDef hspi1;
		82	51:Core/Src/main.c ****
		83	52:Core/Src/main.c **** TIM_HandleTypeDef htim3;
		84	53:Core/Src/main.c **** TIM_HandleTypeDef htim4;
		85	54:Core/Src/main.c ****
		86	55:Core/Src/main.c **** UART_HandleTypeDef huart1;
		87	56:Core/Src/main.c ****
		88	57:Core/Src/main.c **** /* USER CODE BEGIN PV */
19	mjames	89	58:Core/Src/main.c **** /* Structure that contains identifier details used in example */
		90	59:Core/Src/main.c **** struct identifier
		91	60:Core/Src/main.c **** {
		92	61:Core/Src/main.c **** /* Variable to hold device address */
		93	62:Core/Src/main.c **** uint8_t dev_addr;
		94	63:Core/Src/main.c ****
		95	64:Core/Src/main.c **** /* Variable that contains file descriptor */
		96	65:Core/Src/main.c **** int8_t fd;
		97	66:Core/Src/main.c **** };
16	mjames	98	67:Core/Src/main.c ****
19	mjames	99	68:Core/Src/main.c ****
		100	69:Core/Src/main.c **** static int8_t
		101	70:Core/Src/main.c **** user_i2c_write ( uint8_t reg_addr, uint8_t reg_data, uint32_t len, struct identifier intf)
		102	71:Core/Src/main.c **** {
		103	72:Core/Src/main.c ****
		104	73:Core/Src/main.c **** uint8_t i2c_addr = intf->dev_addr;
		105	74:Core/Src/main.c **** HAL_StatusTypeDef st = HAL_I2C_Mem_Write(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000
16	mjames	106	75:Core/Src/main.c ****
19	mjames	107	76:Core/Src/main.c **** return st != HAL_OK ? BME280_E_COMM_FAIL: BME280_OK;
16	mjames	108	77:Core/Src/main.c ****
		109	78:Core/Src/main.c **** }
19	mjames	110	79:Core/Src/main.c **** static int8_t
		111	80:Core/Src/main.c **** user_i2c_read ( uint8_t reg_addr, uint8_t reg_data, uint32_t len, struct identifier intf)
		112	81:Core/Src/main.c **** {
		113	82:Core/Src/main.c **** uint8_t i2c_addr = intf->dev_addr;
		114	83:Core/Src/main.c ****
		115	84:Core/Src/main.c **** HAL_StatusTypeDef st = HAL_I2C_Mem_Read(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000);
		116	85:Core/Src/main.c ****
		117	86:Core/Src/main.c **** return st != HAL_OK ? BME280_E_COMM_FAIL: BME280_OK;
		118	87:Core/Src/main.c ****
		119	88:Core/Src/main.c **** }
		120	89:Core/Src/main.c ****
		121	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 3
		122
		123
		124	90:Core/Src/main.c **** static void
		125	91:Core/Src/main.c **** user_delay_us(uint32_t us, void *handle)
		126	92:Core/Src/main.c **** {
		127	27 .loc 1 92 1 view -0
16	mjames	128	28 .cfi_startproc
		129	29 @ args = 0, pretend = 0, frame = 0
		130	30 @ frame_needed = 0, uses_anonymous_args = 0
19	mjames	131	31 .loc 1 92 1 is_stmt 0 view .LVU1
16	mjames	132	32 0000 08B5 push {r3, lr}
		133	33 .LCFI0:
		134	34 .cfi_def_cfa_offset 8
		135	35 .cfi_offset 3, -8
		136	36 .cfi_offset 14, -4
19	mjames	137	93:Core/Src/main.c **** HAL_Delay ((us+999)/1000);
		138	37 .loc 1 93 3 is_stmt 1 view .LVU2
		139	38 .loc 1 93 17 is_stmt 0 view .LVU3
		140	39 0002 00F2E730 addw r0, r0, #999
		141	40 .LVL1:
		142	41 .loc 1 93 3 view .LVU4
		143	42 0006 034B ldr r3, .L3
		144	43 0008 A3FB0030 umull r3, r0, r3, r0
		145	44 .LVL2:
		146	45 .loc 1 93 3 view .LVU5
		147	46 000c 8009 lsrs r0, r0, #6
		148	47 000e FFF7FEFF bl HAL_Delay
		149	48 .LVL3:
		150	94:Core/Src/main.c **** }
		151	49 .loc 1 94 1 view .LVU6
		152	50 0012 08BD pop {r3, pc}
		153	51 .L4:
		154	52 .align 2
		155	53 .L3:
		156	54 0014 D34D6210 .word 274877907
		157	55 .cfi_endproc
		158	56 .LFE70:
		159	58 .section .text.user_i2c_write,"ax",%progbits
		160	59 .align 1
		161	60 .syntax unified
		162	61 .thumb
		163	62 .thumb_func
		164	63 .fpu softvfp
		165	65 user_i2c_write:
		166	66 .LVL4:
		167	67 .LFB68:
		168	71:Core/Src/main.c ****
		169	68 .loc 1 71 1 is_stmt 1 view -0
		170	69 .cfi_startproc
		171	70 @ args = 0, pretend = 0, frame = 0
		172	71 @ frame_needed = 0, uses_anonymous_args = 0
		173	71:Core/Src/main.c ****
		174	72 .loc 1 71 1 is_stmt 0 view .LVU8
		175	73 0000 10B5 push {r4, lr}
		176	74 .LCFI1:
		177	75 .cfi_def_cfa_offset 8
		178	76 .cfi_offset 4, -8
		179	77 .cfi_offset 14, -4
		180	78 0002 84B0 sub sp, sp, #16
		181	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 4
16	mjames	182
		183
19	mjames	184	79 .LCFI2:
		185	80 .cfi_def_cfa_offset 24
		186	73:Core/Src/main.c **** HAL_StatusTypeDef st = HAL_I2C_Mem_Write(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000
		187	81 .loc 1 73 3 is_stmt 1 view .LVU9
		188	73:Core/Src/main.c **** HAL_StatusTypeDef st = HAL_I2C_Mem_Write(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000
		189	82 .loc 1 73 11 is_stmt 0 view .LVU10
		190	83 0004 1C78 ldrb r4, [r3] @ zero_extendqisi2
		191	84 .LVL5:
16	mjames	192	74:Core/Src/main.c ****
19	mjames	193	85 .loc 1 74 5 is_stmt 1 view .LVU11
16	mjames	194	74:Core/Src/main.c ****
19	mjames	195	86 .loc 1 74 28 is_stmt 0 view .LVU12
		196	87 0006 42F21073 movw r3, #10000
		197	88 .LVL6:
16	mjames	198	74:Core/Src/main.c ****
19	mjames	199	89 .loc 1 74 28 view .LVU13
		200	90 000a 0293 str r3, [sp, #8]
		201	91 000c 92B2 uxth r2, r2
		202	92 .LVL7:
16	mjames	203	74:Core/Src/main.c ****
19	mjames	204	93 .loc 1 74 28 view .LVU14
		205	94 000e 0192 str r2, [sp, #4]
		206	95 0010 0091 str r1, [sp]
		207	96 0012 0123 movs r3, #1
		208	97 0014 0246 mov r2, r0
		209	98 0016 04FA03F1 lsl r1, r4, r3
		210	99 .LVL8:
16	mjames	211	74:Core/Src/main.c ****
19	mjames	212	100 .loc 1 74 28 view .LVU15
		213	101 001a 0548 ldr r0, .L10
		214	102 .LVL9:
16	mjames	215	74:Core/Src/main.c ****
19	mjames	216	103 .loc 1 74 28 view .LVU16
		217	104 001c FFF7FEFF bl HAL_I2C_Mem_Write
		218	105 .LVL10:
16	mjames	219	76:Core/Src/main.c ****
19	mjames	220	106 .loc 1 76 3 is_stmt 1 view .LVU17
16	mjames	221	76:Core/Src/main.c ****
19	mjames	222	107 .loc 1 76 44 is_stmt 0 view .LVU18
		223	108 0020 10B9 cbnz r0, .L9
		224	109 0022 0020 movs r0, #0
		225	110 .LVL11:
		226	111 .L6:
		227	78:Core/Src/main.c **** static int8_t
		228	112 .loc 1 78 1 discriminator 4 view .LVU19
		229	113 0024 04B0 add sp, sp, #16
		230	114 .LCFI3:
		231	115 .cfi_remember_state
		232	116 .cfi_def_cfa_offset 8
		233	117 @ sp needed
		234	118 0026 10BD pop {r4, pc}
		235	119 .LVL12:
		236	120 .L9:
		237	121 .LCFI4:
		238	122 .cfi_restore_state
16	mjames	239	76:Core/Src/main.c ****
19	mjames	240	123 .loc 1 76 44 view .LVU20
		241	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 5
16	mjames	242
		243
19	mjames	244	124 0028 6FF00300 mvn r0, #3
		245	125 .LVL13:
16	mjames	246	76:Core/Src/main.c ****
19	mjames	247	126 .loc 1 76 44 view .LVU21
		248	127 002c FAE7 b .L6
		249	128 .L11:
		250	129 002e 00BF .align 2
		251	130 .L10:
		252	131 0030 00000000 .word hi2c2
		253	132 .cfi_endproc
		254	133 .LFE68:
		255	135 .section .text.user_i2c_read,"ax",%progbits
		256	136 .align 1
		257	137 .syntax unified
		258	138 .thumb
		259	139 .thumb_func
		260	140 .fpu softvfp
		261	142 user_i2c_read:
		262	143 .LVL14:
		263	144 .LFB69:
		264	81:Core/Src/main.c **** uint8_t i2c_addr = intf->dev_addr;
		265	145 .loc 1 81 1 is_stmt 1 view -0
		266	146 .cfi_startproc
		267	147 @ args = 0, pretend = 0, frame = 0
		268	148 @ frame_needed = 0, uses_anonymous_args = 0
		269	81:Core/Src/main.c **** uint8_t i2c_addr = intf->dev_addr;
		270	149 .loc 1 81 1 is_stmt 0 view .LVU23
		271	150 0000 10B5 push {r4, lr}
		272	151 .LCFI5:
		273	152 .cfi_def_cfa_offset 8
		274	153 .cfi_offset 4, -8
		275	154 .cfi_offset 14, -4
		276	155 0002 84B0 sub sp, sp, #16
		277	156 .LCFI6:
		278	157 .cfi_def_cfa_offset 24
		279	82:Core/Src/main.c ****
		280	158 .loc 1 82 3 is_stmt 1 view .LVU24
		281	82:Core/Src/main.c ****
		282	159 .loc 1 82 11 is_stmt 0 view .LVU25
		283	160 0004 1C78 ldrb r4, [r3] @ zero_extendqisi2
		284	161 .LVL15:
		285	84:Core/Src/main.c ****
		286	162 .loc 1 84 3 is_stmt 1 view .LVU26
		287	84:Core/Src/main.c ****
		288	163 .loc 1 84 26 is_stmt 0 view .LVU27
		289	164 0006 42F21073 movw r3, #10000
		290	165 .LVL16:
		291	84:Core/Src/main.c ****
		292	166 .loc 1 84 26 view .LVU28
		293	167 000a 0293 str r3, [sp, #8]
		294	168 000c 92B2 uxth r2, r2
		295	169 .LVL17:
		296	84:Core/Src/main.c ****
		297	170 .loc 1 84 26 view .LVU29
		298	171 000e 0192 str r2, [sp, #4]
		299	172 0010 0091 str r1, [sp]
		300	173 0012 0123 movs r3, #1
		301	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 6
		302
		303
		304	174 0014 0246 mov r2, r0
		305	175 0016 04FA03F1 lsl r1, r4, r3
		306	176 .LVL18:
		307	84:Core/Src/main.c ****
		308	177 .loc 1 84 26 view .LVU30
		309	178 001a 0548 ldr r0, .L17
		310	179 .LVL19:
		311	84:Core/Src/main.c ****
		312	180 .loc 1 84 26 view .LVU31
		313	181 001c FFF7FEFF bl HAL_I2C_Mem_Read
		314	182 .LVL20:
16	mjames	315	86:Core/Src/main.c ****
19	mjames	316	183 .loc 1 86 3 is_stmt 1 view .LVU32
		317	86:Core/Src/main.c ****
		318	184 .loc 1 86 44 is_stmt 0 view .LVU33
		319	185 0020 10B9 cbnz r0, .L16
		320	186 0022 0020 movs r0, #0
		321	187 .LVL21:
		322	188 .L13:
16	mjames	323	88:Core/Src/main.c ****
19	mjames	324	189 .loc 1 88 1 discriminator 4 view .LVU34
		325	190 0024 04B0 add sp, sp, #16
		326	191 .LCFI7:
		327	192 .cfi_remember_state
		328	193 .cfi_def_cfa_offset 8
		329	194 @ sp needed
		330	195 0026 10BD pop {r4, pc}
		331	196 .LVL22:
		332	197 .L16:
		333	198 .LCFI8:
		334	199 .cfi_restore_state
		335	86:Core/Src/main.c ****
		336	200 .loc 1 86 44 view .LVU35
		337	201 0028 6FF00300 mvn r0, #3
		338	202 .LVL23:
		339	86:Core/Src/main.c ****
		340	203 .loc 1 86 44 view .LVU36
		341	204 002c FAE7 b .L13
		342	205 .L18:
		343	206 002e 00BF .align 2
		344	207 .L17:
		345	208 0030 00000000 .word hi2c2
		346	209 .cfi_endproc
		347	210 .LFE69:
		348	212 .section .text.MX_GPIO_Init,"ax",%progbits
		349	213 .align 1
		350	214 .syntax unified
		351	215 .thumb
		352	216 .thumb_func
		353	217 .fpu softvfp
		354	219 MX_GPIO_Init:
		355	220 .LFB80:
16	mjames	356	95:Core/Src/main.c ****
19	mjames	357	96:Core/Src/main.c ****
		358	97:Core/Src/main.c ****
		359	98:Core/Src/main.c **** struct bme280_dev dev;
		360	99:Core/Src/main.c ****
		361	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 7
		362
		363
		364	100:Core/Src/main.c **** struct identifier id;
16	mjames	365	101:Core/Src/main.c ****
19	mjames	366	102:Core/Src/main.c **** /* Variable to store minimum wait time between consecutive measurement in force mode */
		367	103:Core/Src/main.c **** uint32_t req_delay;
16	mjames	368	104:Core/Src/main.c ****
19	mjames	369	105:Core/Src/main.c **** int8_t rslt;
		370	106:Core/Src/main.c ****
		371	107:Core/Src/main.c ****
		372	108:Core/Src/main.c **** /* USER CODE END PV */
		373	109:Core/Src/main.c ****
		374	110:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/
		375	111:Core/Src/main.c **** void SystemClock_Config(void);
		376	112:Core/Src/main.c **** static void MX_GPIO_Init(void);
		377	113:Core/Src/main.c **** static void MX_SPI1_Init(void);
		378	114:Core/Src/main.c **** static void MX_TIM4_Init(void);
		379	115:Core/Src/main.c **** static void MX_USART1_UART_Init(void);
		380	116:Core/Src/main.c **** static void MX_TIM3_Init(void);
		381	117:Core/Src/main.c **** static void MX_I2C2_Init(void);
		382	118:Core/Src/main.c **** static void MX_RTC_Init(void);
		383	119:Core/Src/main.c **** /* USER CODE BEGIN PFP */
16	mjames	384	120:Core/Src/main.c ****
19	mjames	385	121:Core/Src/main.c **** /*!
		386	122:Core/Src/main.c **** * @brief This API reads the sensor temperature, pressure and humidity data in forced mode.
		387	123:Core/Src/main.c **** */
		388	124:Core/Src/main.c **** int8_t
		389	125:Core/Src/main.c **** stream_sensor_data_forced_mode (struct bme280_dev *dev)
		390	126:Core/Src/main.c **** {
		391	127:Core/Src/main.c **** /* Variable to define the result */
		392	128:Core/Src/main.c **** int8_t rslt = BME280_OK;
		393	129:Core/Src/main.c ****
		394	130:Core/Src/main.c **** /* Variable to define the selecting sensors */
		395	131:Core/Src/main.c **** uint8_t settings_sel = 0;
16	mjames	396	132:Core/Src/main.c ****
19	mjames	397	133:Core/Src/main.c **** /* Structure to get the pressure, temperature and humidity values */
		398	134:Core/Src/main.c **** struct bme280_data comp_data;
		399	135:Core/Src/main.c ****
		400	136:Core/Src/main.c **** /* Recommended mode of operation: Indoor navigation */
		401	137:Core/Src/main.c **** dev->settings.osr_h = BME280_OVERSAMPLING_1X;
		402	138:Core/Src/main.c **** dev->settings.osr_p = BME280_OVERSAMPLING_16X;
		403	139:Core/Src/main.c **** dev->settings.osr_t = BME280_OVERSAMPLING_2X;
		404	140:Core/Src/main.c **** dev->settings.filter = BME280_FILTER_COEFF_16;
16	mjames	405	141:Core/Src/main.c ****
19	mjames	406	142:Core/Src/main.c **** settings_sel = BME280_OSR_PRESS_SEL \| BME280_OSR_TEMP_SEL \| BME280_OSR_HUM_SEL
		407	143:Core/Src/main.c **** \| BME280_FILTER_SEL;
16	mjames	408	144:Core/Src/main.c ****
19	mjames	409	145:Core/Src/main.c **** /* Set the sensor settings */
		410	146:Core/Src/main.c **** rslt = bme280_set_sensor_settings (settings_sel, dev);
		411	147:Core/Src/main.c **** if (rslt != BME280_OK)
		412	148:Core/Src/main.c **** {
		413	149:Core/Src/main.c **** // fprintf(stderr, "Failed to set sensor settings (code %+d).", rslt);
		414	150:Core/Src/main.c ****
		415	151:Core/Src/main.c **** return rslt;
		416	152:Core/Src/main.c **** }
		417	153:Core/Src/main.c ****
		418	154:Core/Src/main.c **** /*Calculate the minimum delay required between consecutive measurement based upon the sensor enab
		419	155:Core/Src/main.c **** * and the oversampling configuration. */
		420	156:Core/Src/main.c **** req_delay = bme280_cal_meas_delay (&dev->settings);
		421	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 8
		422
		423
		424	157:Core/Src/main.c ****
		425	158:Core/Src/main.c **** /* Set the sensor to forced mode */
		426	159:Core/Src/main.c **** rslt = bme280_set_sensor_mode (BME280_FORCED_MODE, dev);
		427	160:Core/Src/main.c **** if (rslt != BME280_OK)
		428	161:Core/Src/main.c **** {
		429	162:Core/Src/main.c **** return rslt;
		430	163:Core/Src/main.c **** }
		431	164:Core/Src/main.c ****
		432	165:Core/Src/main.c **** return rslt;
		433	166:Core/Src/main.c **** }
		434	167:Core/Src/main.c **** /* USER CODE END PFP */
16	mjames	435	168:Core/Src/main.c ****
19	mjames	436	169:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/
		437	170:Core/Src/main.c **** /* USER CODE BEGIN 0 */
		438	171:Core/Src/main.c ****
		439	172:Core/Src/main.c **** /* USER CODE END 0 */
16	mjames	440	173:Core/Src/main.c ****
19	mjames	441	174:Core/Src/main.c ** /
		442	175:Core/Src/main.c **** * @brief The application entry point.
		443	176:Core/Src/main.c **** * @retval int
		444	177:Core/Src/main.c **** */
		445	178:Core/Src/main.c **** int main(void)
		446	179:Core/Src/main.c **** {
		447	180:Core/Src/main.c **** /* USER CODE BEGIN 1 */
		448	181:Core/Src/main.c ****
		449	182:Core/Src/main.c ****
		450	183:Core/Src/main.c **** /* USER CODE END 1 */
		451	184:Core/Src/main.c ****
		452	185:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/
16	mjames	453	186:Core/Src/main.c ****
19	mjames	454	187:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
		455	188:Core/Src/main.c **** HAL_Init();
16	mjames	456	189:Core/Src/main.c ****
19	mjames	457	190:Core/Src/main.c **** /* USER CODE BEGIN Init */
		458	191:Core/Src/main.c ****
		459	192:Core/Src/main.c **** /* USER CODE END Init */
		460	193:Core/Src/main.c ****
		461	194:Core/Src/main.c **** /* Configure the system clock */
		462	195:Core/Src/main.c **** SystemClock_Config();
		463	196:Core/Src/main.c ****
		464	197:Core/Src/main.c **** /* USER CODE BEGIN SysInit */
16	mjames	465	198:Core/Src/main.c ****
19	mjames	466	199:Core/Src/main.c **** /* USER CODE END SysInit */
16	mjames	467	200:Core/Src/main.c ****
19	mjames	468	201:Core/Src/main.c **** /* Initialize all configured peripherals */
		469	202:Core/Src/main.c **** MX_GPIO_Init();
		470	203:Core/Src/main.c **** MX_SPI1_Init();
		471	204:Core/Src/main.c **** MX_TIM4_Init();
		472	205:Core/Src/main.c **** MX_USART1_UART_Init();
		473	206:Core/Src/main.c **** MX_TIM3_Init();
		474	207:Core/Src/main.c **** MX_I2C2_Init();
		475	208:Core/Src/main.c **** MX_RTC_Init();
		476	209:Core/Src/main.c **** MX_USB_DEVICE_Init();
		477	210:Core/Src/main.c **** /* USER CODE BEGIN 2 */
16	mjames	478	211:Core/Src/main.c ****
19	mjames	479	212:Core/Src/main.c **** HAL_GPIO_WritePin ( USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_RESET);
		480	213:Core/Src/main.c **** HAL_Delay (1000);
		481	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 9
		482
		483
		484	214:Core/Src/main.c **** HAL_GPIO_WritePin ( USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_SET);
16	mjames	485	215:Core/Src/main.c ****
19	mjames	486	216:Core/Src/main.c **** /* setup the USART control blocks */
		487	217:Core/Src/main.c **** init_usart_ctl (&uc1, &huart1);
		488	218:Core/Src/main.c ****
		489	219:Core/Src/main.c **** EnableSerialRxInterrupt (&uc1);
16	mjames	490	220:Core/Src/main.c ****
19	mjames	491	221:Core/Src/main.c **** /* BME 280 */
		492	222:Core/Src/main.c **** struct bme280_dev dev;
		493	223:Core/Src/main.c ****
		494	224:Core/Src/main.c **** struct identifier id;
		495	225:Core/Src/main.c ****
		496	226:Core/Src/main.c **** /* Variable to define the result */
		497	227:Core/Src/main.c **** int8_t rslt = BME280_OK;
		498	228:Core/Src/main.c ****
		499	229:Core/Src/main.c **** /* Make sure to select BME280_I2C_ADDR_PRIM or BME280_I2C_ADDR_SEC as needed */
		500	230:Core/Src/main.c **** id.dev_addr = BME280_I2C_ADDR_PRIM >> 1;
		501	231:Core/Src/main.c ****
		502	232:Core/Src/main.c **** dev.intf = BME280_I2C_INTF;
		503	233:Core/Src/main.c **** dev.read = user_i2c_read;
		504	234:Core/Src/main.c **** dev.write = user_i2c_write;
		505	235:Core/Src/main.c **** dev.delay_us = user_delay_us;
		506	236:Core/Src/main.c ****
		507	237:Core/Src/main.c **** /* Update interface pointer with the structure that contains both device address and file descrip
		508	238:Core/Src/main.c **** dev.intf_ptr = &id;
		509	239:Core/Src/main.c ****
		510	240:Core/Src/main.c **** /* Initialize the bme280 */
		511	241:Core/Src/main.c **** rslt = bme280_init(&dev);
		512	242:Core/Src/main.c **** if (rslt != BME280_OK)
		513	243:Core/Src/main.c **** {
		514	244:Core/Src/main.c **** // fprintf(stderr, "Failed to initialize the device (code %+d).\n", rslt);
		515	245:Core/Src/main.c **** exit(1);
		516	246:Core/Src/main.c **** }
		517	247:Core/Src/main.c ****
		518	248:Core/Src/main.c ****
		519	249:Core/Src/main.c **** rslt = stream_sensor_data_forced_mode(&dev);
		520	250:Core/Src/main.c **** if (rslt != BME280_OK)
		521	251:Core/Src/main.c **** {
		522	252:Core/Src/main.c **** // fprintf(stderr, "Failed to stream sensor data (code %+d).\n", rslt);
		523	253:Core/Src/main.c **** exit(1);
		524	254:Core/Src/main.c **** }
		525	255:Core/Src/main.c ****
		526	256:Core/Src/main.c ****
		527	257:Core/Src/main.c ****
		528	258:Core/Src/main.c ****
		529	259:Core/Src/main.c ****
		530	260:Core/Src/main.c **** cc_init ();
		531	261:Core/Src/main.c **** /* USER CODE END 2 */
		532	262:Core/Src/main.c ****
		533	263:Core/Src/main.c **** /* Infinite loop */
		534	264:Core/Src/main.c **** /* USER CODE BEGIN WHILE */
		535	265:Core/Src/main.c **** while (1)
		536	266:Core/Src/main.c **** {
		537	267:Core/Src/main.c **** cc_run (&dev);
		538	268:Core/Src/main.c ****
		539	269:Core/Src/main.c ****
		540	270:Core/Src/main.c ****
		541	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 10
16	mjames	542
		543
19	mjames	544	271:Core/Src/main.c **** HAL_Delay (50);
		545	272:Core/Src/main.c ****
		546	273:Core/Src/main.c **** /* USER CODE END WHILE */
		547	274:Core/Src/main.c ****
		548	275:Core/Src/main.c **** /* USER CODE BEGIN 3 */
		549	276:Core/Src/main.c **** }
		550	277:Core/Src/main.c **** /* USER CODE END 3 */
		551	278:Core/Src/main.c **** }
16	mjames	552	279:Core/Src/main.c ****
19	mjames	553	280:Core/Src/main.c ** /
		554	281:Core/Src/main.c **** * @brief System Clock Configuration
		555	282:Core/Src/main.c **** * @retval None
		556	283:Core/Src/main.c **** */
		557	284:Core/Src/main.c **** void SystemClock_Config(void)
		558	285:Core/Src/main.c **** {
		559	286:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
		560	287:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
		561	288:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
		562	289:Core/Src/main.c ****
		563	290:Core/Src/main.c ** / Initializes the RCC Oscillators according to the specified parameters
		564	291:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure.
		565	292:Core/Src/main.c **** */
		566	293:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE\|RCC_OSCILLATORTYPE_LSE;
		567	294:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
		568	295:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
		569	296:Core/Src/main.c **** RCC_OscInitStruct.LSEState = RCC_LSE_ON;
		570	297:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON;
		571	298:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
		572	299:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
		573	300:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
		574	301:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
		575	302:Core/Src/main.c **** {
		576	303:Core/Src/main.c **** Error_Handler();
		577	304:Core/Src/main.c **** }
		578	305:Core/Src/main.c ** / Initializes the CPU, AHB and APB buses clocks
16	mjames	579	306:Core/Src/main.c **** */
19	mjames	580	307:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK\|RCC_CLOCKTYPE_SYSCLK
		581	308:Core/Src/main.c **** \|RCC_CLOCKTYPE_PCLK1\|RCC_CLOCKTYPE_PCLK2;
		582	309:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
		583	310:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
		584	311:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
		585	312:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
16	mjames	586	313:Core/Src/main.c ****
19	mjames	587	314:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
		588	315:Core/Src/main.c **** {
		589	316:Core/Src/main.c **** Error_Handler();
		590	317:Core/Src/main.c **** }
		591	318:Core/Src/main.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC\|RCC_PERIPHCLK_USB;
		592	319:Core/Src/main.c **** PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
		593	320:Core/Src/main.c **** PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
		594	321:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
		595	322:Core/Src/main.c **** {
		596	323:Core/Src/main.c **** Error_Handler();
		597	324:Core/Src/main.c **** }
		598	325:Core/Src/main.c **** }
		599	326:Core/Src/main.c ****
		600	327:Core/Src/main.c ** /
		601	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 11
16	mjames	602
		603
19	mjames	604	328:Core/Src/main.c **** * @brief I2C2 Initialization Function
		605	329:Core/Src/main.c **** * @param None
		606	330:Core/Src/main.c **** * @retval None
		607	331:Core/Src/main.c **** */
		608	332:Core/Src/main.c **** static void MX_I2C2_Init(void)
		609	333:Core/Src/main.c **** {
		610	334:Core/Src/main.c ****
		611	335:Core/Src/main.c **** /* USER CODE BEGIN I2C2_Init 0 */
		612	336:Core/Src/main.c ****
		613	337:Core/Src/main.c **** /* USER CODE END I2C2_Init 0 */
		614	338:Core/Src/main.c ****
		615	339:Core/Src/main.c **** /* USER CODE BEGIN I2C2_Init 1 */
		616	340:Core/Src/main.c ****
		617	341:Core/Src/main.c **** /* USER CODE END I2C2_Init 1 */
		618	342:Core/Src/main.c **** hi2c2.Instance = I2C2;
		619	343:Core/Src/main.c **** hi2c2.Init.ClockSpeed = 100000;
		620	344:Core/Src/main.c **** hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
		621	345:Core/Src/main.c **** hi2c2.Init.OwnAddress1 = 0;
		622	346:Core/Src/main.c **** hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
		623	347:Core/Src/main.c **** hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
		624	348:Core/Src/main.c **** hi2c2.Init.OwnAddress2 = 0;
		625	349:Core/Src/main.c **** hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
		626	350:Core/Src/main.c **** hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
		627	351:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c2) != HAL_OK)
		628	352:Core/Src/main.c **** {
		629	353:Core/Src/main.c **** Error_Handler();
		630	354:Core/Src/main.c **** }
		631	355:Core/Src/main.c **** /* USER CODE BEGIN I2C2_Init 2 */
16	mjames	632	356:Core/Src/main.c ****
19	mjames	633	357:Core/Src/main.c **** /* USER CODE END I2C2_Init 2 */
16	mjames	634	358:Core/Src/main.c ****
19	mjames	635	359:Core/Src/main.c **** }
		636	360:Core/Src/main.c ****
		637	361:Core/Src/main.c ** /
		638	362:Core/Src/main.c **** * @brief RTC Initialization Function
		639	363:Core/Src/main.c **** * @param None
		640	364:Core/Src/main.c **** * @retval None
		641	365:Core/Src/main.c **** */
		642	366:Core/Src/main.c **** static void MX_RTC_Init(void)
		643	367:Core/Src/main.c **** {
16	mjames	644	368:Core/Src/main.c ****
19	mjames	645	369:Core/Src/main.c **** /* USER CODE BEGIN RTC_Init 0 */
16	mjames	646	370:Core/Src/main.c ****
19	mjames	647	371:Core/Src/main.c **** /* USER CODE END RTC_Init 0 */
16	mjames	648	372:Core/Src/main.c ****
19	mjames	649	373:Core/Src/main.c **** RTC_TimeTypeDef sTime = {0};
		650	374:Core/Src/main.c **** RTC_DateTypeDef DateToUpdate = {0};
		651	375:Core/Src/main.c ****
		652	376:Core/Src/main.c **** /* USER CODE BEGIN RTC_Init 1 */
		653	377:Core/Src/main.c ****
		654	378:Core/Src/main.c **** /* USER CODE END RTC_Init 1 */
		655	379:Core/Src/main.c ** / Initialize RTC Only
		656	380:Core/Src/main.c **** */
		657	381:Core/Src/main.c **** hrtc.Instance = RTC;
		658	382:Core/Src/main.c **** hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
		659	383:Core/Src/main.c **** hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM;
		660	384:Core/Src/main.c **** if (HAL_RTC_Init(&hrtc) != HAL_OK)
		661	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 12
		662
		663
		664	385:Core/Src/main.c **** {
		665	386:Core/Src/main.c **** Error_Handler();
		666	387:Core/Src/main.c **** }
		667	388:Core/Src/main.c ****
		668	389:Core/Src/main.c **** /* USER CODE BEGIN Check_RTC_BKUP */
		669	390:Core/Src/main.c ****
		670	391:Core/Src/main.c **** /* USER CODE END Check_RTC_BKUP */
16	mjames	671	392:Core/Src/main.c ****
19	mjames	672	393:Core/Src/main.c ** / Initialize RTC and set the Time and Date
		673	394:Core/Src/main.c **** */
		674	395:Core/Src/main.c **** sTime.Hours = 0x0;
		675	396:Core/Src/main.c **** sTime.Minutes = 0x0;
		676	397:Core/Src/main.c **** sTime.Seconds = 0x0;
		677	398:Core/Src/main.c ****
		678	399:Core/Src/main.c **** if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BCD) != HAL_OK)
		679	400:Core/Src/main.c **** {
		680	401:Core/Src/main.c **** Error_Handler();
		681	402:Core/Src/main.c **** }
		682	403:Core/Src/main.c **** DateToUpdate.WeekDay = RTC_WEEKDAY_MONDAY;
		683	404:Core/Src/main.c **** DateToUpdate.Month = RTC_MONTH_JANUARY;
		684	405:Core/Src/main.c **** DateToUpdate.Date = 0x1;
		685	406:Core/Src/main.c **** DateToUpdate.Year = 0x0;
		686	407:Core/Src/main.c ****
		687	408:Core/Src/main.c **** if (HAL_RTC_SetDate(&hrtc, &DateToUpdate, RTC_FORMAT_BCD) != HAL_OK)
		688	409:Core/Src/main.c **** {
		689	410:Core/Src/main.c **** Error_Handler();
		690	411:Core/Src/main.c **** }
		691	412:Core/Src/main.c **** /* USER CODE BEGIN RTC_Init 2 */
		692	413:Core/Src/main.c ****
		693	414:Core/Src/main.c **** /* USER CODE END RTC_Init 2 */
		694	415:Core/Src/main.c ****
		695	416:Core/Src/main.c **** }
		696	417:Core/Src/main.c ****
		697	418:Core/Src/main.c ** /
		698	419:Core/Src/main.c **** * @brief SPI1 Initialization Function
		699	420:Core/Src/main.c **** * @param None
		700	421:Core/Src/main.c **** * @retval None
		701	422:Core/Src/main.c **** */
		702	423:Core/Src/main.c **** static void MX_SPI1_Init(void)
		703	424:Core/Src/main.c **** {
		704	425:Core/Src/main.c ****
		705	426:Core/Src/main.c **** /* USER CODE BEGIN SPI1_Init 0 */
		706	427:Core/Src/main.c ****
		707	428:Core/Src/main.c **** /* USER CODE END SPI1_Init 0 */
		708	429:Core/Src/main.c ****
		709	430:Core/Src/main.c **** /* USER CODE BEGIN SPI1_Init 1 */
		710	431:Core/Src/main.c ****
		711	432:Core/Src/main.c **** /* USER CODE END SPI1_Init 1 */
		712	433:Core/Src/main.c **** /* SPI1 parameter configuration*/
		713	434:Core/Src/main.c **** hspi1.Instance = SPI1;
		714	435:Core/Src/main.c **** hspi1.Init.Mode = SPI_MODE_MASTER;
		715	436:Core/Src/main.c **** hspi1.Init.Direction = SPI_DIRECTION_1LINE;
		716	437:Core/Src/main.c **** hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
		717	438:Core/Src/main.c **** hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
		718	439:Core/Src/main.c **** hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
		719	440:Core/Src/main.c **** hspi1.Init.NSS = SPI_NSS_SOFT;
		720	441:Core/Src/main.c **** hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
		721	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 13
16	mjames	722
		723
19	mjames	724	442:Core/Src/main.c **** hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
		725	443:Core/Src/main.c **** hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
		726	444:Core/Src/main.c **** hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
		727	445:Core/Src/main.c **** hspi1.Init.CRCPolynomial = 10;
		728	446:Core/Src/main.c **** if (HAL_SPI_Init(&hspi1) != HAL_OK)
		729	447:Core/Src/main.c **** {
		730	448:Core/Src/main.c **** Error_Handler();
		731	449:Core/Src/main.c **** }
		732	450:Core/Src/main.c **** /* USER CODE BEGIN SPI1_Init 2 */
		733	451:Core/Src/main.c ****
		734	452:Core/Src/main.c **** /* USER CODE END SPI1_Init 2 */
		735	453:Core/Src/main.c ****
		736	454:Core/Src/main.c **** }
		737	455:Core/Src/main.c ****
		738	456:Core/Src/main.c ** /
		739	457:Core/Src/main.c **** * @brief TIM3 Initialization Function
		740	458:Core/Src/main.c **** * @param None
		741	459:Core/Src/main.c **** * @retval None
		742	460:Core/Src/main.c **** */
		743	461:Core/Src/main.c **** static void MX_TIM3_Init(void)
		744	462:Core/Src/main.c **** {
16	mjames	745	463:Core/Src/main.c ****
19	mjames	746	464:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 0 */
16	mjames	747	465:Core/Src/main.c ****
19	mjames	748	466:Core/Src/main.c **** /* USER CODE END TIM3_Init 0 */
		749	467:Core/Src/main.c ****
		750	468:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
		751	469:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
		752	470:Core/Src/main.c ****
		753	471:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 1 */
		754	472:Core/Src/main.c ****
		755	473:Core/Src/main.c **** /* USER CODE END TIM3_Init 1 */
		756	474:Core/Src/main.c **** htim3.Instance = TIM3;
		757	475:Core/Src/main.c **** htim3.Init.Prescaler = 719;
		758	476:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
		759	477:Core/Src/main.c **** htim3.Init.Period = 10000;
		760	478:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
		761	479:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
		762	480:Core/Src/main.c **** if (HAL_TIM_OC_Init(&htim3) != HAL_OK)
		763	481:Core/Src/main.c **** {
		764	482:Core/Src/main.c **** Error_Handler();
		765	483:Core/Src/main.c **** }
		766	484:Core/Src/main.c **** if (HAL_TIM_OnePulse_Init(&htim3, TIM_OPMODE_SINGLE) != HAL_OK)
		767	485:Core/Src/main.c **** {
		768	486:Core/Src/main.c **** Error_Handler();
		769	487:Core/Src/main.c **** }
		770	488:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_ENABLE;
		771	489:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
		772	490:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
		773	491:Core/Src/main.c **** {
		774	492:Core/Src/main.c **** Error_Handler();
		775	493:Core/Src/main.c **** }
		776	494:Core/Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_TIMING;
		777	495:Core/Src/main.c **** sConfigOC.Pulse = 9999;
		778	496:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
		779	497:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
		780	498:Core/Src/main.c **** if (HAL_TIM_OC_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
		781	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 14
16	mjames	782
		783
19	mjames	784	499:Core/Src/main.c **** {
		785	500:Core/Src/main.c **** Error_Handler();
		786	501:Core/Src/main.c **** }
		787	502:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 2 */
		788	503:Core/Src/main.c ****
		789	504:Core/Src/main.c **** /* USER CODE END TIM3_Init 2 */
16	mjames	790	505:Core/Src/main.c ****
19	mjames	791	506:Core/Src/main.c **** }
16	mjames	792	507:Core/Src/main.c ****
19	mjames	793	508:Core/Src/main.c ** /
		794	509:Core/Src/main.c **** * @brief TIM4 Initialization Function
		795	510:Core/Src/main.c **** * @param None
		796	511:Core/Src/main.c **** * @retval None
		797	512:Core/Src/main.c **** */
		798	513:Core/Src/main.c **** static void MX_TIM4_Init(void)
		799	514:Core/Src/main.c **** {
		800	515:Core/Src/main.c ****
		801	516:Core/Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */
		802	517:Core/Src/main.c ****
		803	518:Core/Src/main.c **** /* USER CODE END TIM4_Init 0 */
		804	519:Core/Src/main.c ****
		805	520:Core/Src/main.c **** TIM_Encoder_InitTypeDef sConfig = {0};
		806	521:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
		807	522:Core/Src/main.c ****
		808	523:Core/Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */
		809	524:Core/Src/main.c ****
		810	525:Core/Src/main.c **** /* USER CODE END TIM4_Init 1 */
		811	526:Core/Src/main.c **** htim4.Instance = TIM4;
		812	527:Core/Src/main.c **** htim4.Init.Prescaler = 0;
		813	528:Core/Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
		814	529:Core/Src/main.c **** htim4.Init.Period = 65535;
		815	530:Core/Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
		816	531:Core/Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
		817	532:Core/Src/main.c **** sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
		818	533:Core/Src/main.c **** sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
		819	534:Core/Src/main.c **** sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
		820	535:Core/Src/main.c **** sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
		821	536:Core/Src/main.c **** sConfig.IC1Filter = 8;
		822	537:Core/Src/main.c **** sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
		823	538:Core/Src/main.c **** sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
		824	539:Core/Src/main.c **** sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
		825	540:Core/Src/main.c **** sConfig.IC2Filter = 8;
		826	541:Core/Src/main.c **** if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK)
		827	542:Core/Src/main.c **** {
		828	543:Core/Src/main.c **** Error_Handler();
		829	544:Core/Src/main.c **** }
		830	545:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
		831	546:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
		832	547:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
		833	548:Core/Src/main.c **** {
		834	549:Core/Src/main.c **** Error_Handler();
		835	550:Core/Src/main.c **** }
		836	551:Core/Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */
		837	552:Core/Src/main.c ****
		838	553:Core/Src/main.c **** /* USER CODE END TIM4_Init 2 */
		839	554:Core/Src/main.c ****
		840	555:Core/Src/main.c **** }
		841	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 15
16	mjames	842
		843
19	mjames	844	556:Core/Src/main.c ****
		845	557:Core/Src/main.c ** /
		846	558:Core/Src/main.c **** * @brief USART1 Initialization Function
		847	559:Core/Src/main.c **** * @param None
		848	560:Core/Src/main.c **** * @retval None
		849	561:Core/Src/main.c **** */
		850	562:Core/Src/main.c **** static void MX_USART1_UART_Init(void)
		851	563:Core/Src/main.c **** {
		852	564:Core/Src/main.c ****
		853	565:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */
		854	566:Core/Src/main.c ****
		855	567:Core/Src/main.c **** /* USER CODE END USART1_Init 0 */
		856	568:Core/Src/main.c ****
		857	569:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */
		858	570:Core/Src/main.c ****
		859	571:Core/Src/main.c **** /* USER CODE END USART1_Init 1 */
		860	572:Core/Src/main.c **** huart1.Instance = USART1;
		861	573:Core/Src/main.c **** huart1.Init.BaudRate = 115200;
		862	574:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B;
		863	575:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1;
		864	576:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE;
		865	577:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX;
		866	578:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
		867	579:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16;
		868	580:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK)
		869	581:Core/Src/main.c **** {
		870	582:Core/Src/main.c **** Error_Handler();
		871	583:Core/Src/main.c **** }
		872	584:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */
		873	585:Core/Src/main.c ****
		874	586:Core/Src/main.c **** /* USER CODE END USART1_Init 2 */
		875	587:Core/Src/main.c ****
		876	588:Core/Src/main.c **** }
		877	589:Core/Src/main.c ****
		878	590:Core/Src/main.c ** /
		879	591:Core/Src/main.c **** * @brief GPIO Initialization Function
		880	592:Core/Src/main.c **** * @param None
		881	593:Core/Src/main.c **** * @retval None
		882	594:Core/Src/main.c **** */
		883	595:Core/Src/main.c **** static void MX_GPIO_Init(void)
		884	596:Core/Src/main.c **** {
		885	221 .loc 1 596 1 is_stmt 1 view -0
		886	222 .cfi_startproc
		887	223 @ args = 0, pretend = 0, frame = 32
		888	224 @ frame_needed = 0, uses_anonymous_args = 0
		889	225 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
		890	226 .LCFI9:
		891	227 .cfi_def_cfa_offset 24
		892	228 .cfi_offset 4, -24
		893	229 .cfi_offset 5, -20
		894	230 .cfi_offset 6, -16
		895	231 .cfi_offset 7, -12
		896	232 .cfi_offset 8, -8
		897	233 .cfi_offset 14, -4
		898	234 0004 88B0 sub sp, sp, #32
		899	235 .LCFI10:
		900	236 .cfi_def_cfa_offset 56
		901	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 16
16	mjames	902
		903
19	mjames	904	597:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
		905	237 .loc 1 597 3 view .LVU38
		906	238 .loc 1 597 20 is_stmt 0 view .LVU39
		907	239 0006 0024 movs r4, #0
		908	240 0008 0494 str r4, [sp, #16]
		909	241 000a 0594 str r4, [sp, #20]
		910	242 000c 0694 str r4, [sp, #24]
		911	243 000e 0794 str r4, [sp, #28]
		912	598:Core/Src/main.c ****
		913	599:Core/Src/main.c **** /* GPIO Ports Clock Enable */
		914	600:Core/Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
		915	244 .loc 1 600 3 is_stmt 1 view .LVU40
		916	245 .LBB2:
		917	246 .loc 1 600 3 view .LVU41
		918	247 .loc 1 600 3 view .LVU42
		919	248 0010 244B ldr r3, .L21
		920	249 0012 9A69 ldr r2, [r3, #24]
		921	250 0014 42F01002 orr r2, r2, #16
		922	251 0018 9A61 str r2, [r3, #24]
		923	252 .loc 1 600 3 view .LVU43
		924	253 001a 9A69 ldr r2, [r3, #24]
		925	254 001c 02F01002 and r2, r2, #16
		926	255 0020 0092 str r2, [sp]
		927	256 .loc 1 600 3 view .LVU44
		928	257 0022 009A ldr r2, [sp]
		929	258 .LBE2:
		930	601:Core/Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
		931	259 .loc 1 601 3 view .LVU45
		932	260 .LBB3:
		933	261 .loc 1 601 3 view .LVU46
		934	262 .loc 1 601 3 view .LVU47
		935	263 0024 9A69 ldr r2, [r3, #24]
		936	264 0026 42F02002 orr r2, r2, #32
		937	265 002a 9A61 str r2, [r3, #24]
		938	266 .loc 1 601 3 view .LVU48
		939	267 002c 9A69 ldr r2, [r3, #24]
		940	268 002e 02F02002 and r2, r2, #32
		941	269 0032 0192 str r2, [sp, #4]
		942	270 .loc 1 601 3 view .LVU49
		943	271 0034 019A ldr r2, [sp, #4]
		944	272 .LBE3:
		945	602:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
		946	273 .loc 1 602 3 view .LVU50
		947	274 .LBB4:
		948	275 .loc 1 602 3 view .LVU51
		949	276 .loc 1 602 3 view .LVU52
		950	277 0036 9A69 ldr r2, [r3, #24]
		951	278 0038 42F00402 orr r2, r2, #4
		952	279 003c 9A61 str r2, [r3, #24]
		953	280 .loc 1 602 3 view .LVU53
		954	281 003e 9A69 ldr r2, [r3, #24]
		955	282 0040 02F00402 and r2, r2, #4
		956	283 0044 0292 str r2, [sp, #8]
		957	284 .loc 1 602 3 view .LVU54
		958	285 0046 029A ldr r2, [sp, #8]
		959	286 .LBE4:
		960	603:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
		961	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 17
16	mjames	962
		963
19	mjames	964	287 .loc 1 603 3 view .LVU55
		965	288 .LBB5:
		966	289 .loc 1 603 3 view .LVU56
		967	290 .loc 1 603 3 view .LVU57
		968	291 0048 9A69 ldr r2, [r3, #24]
		969	292 004a 42F00802 orr r2, r2, #8
		970	293 004e 9A61 str r2, [r3, #24]
		971	294 .loc 1 603 3 view .LVU58
		972	295 0050 9B69 ldr r3, [r3, #24]
		973	296 0052 03F00803 and r3, r3, #8
		974	297 0056 0393 str r3, [sp, #12]
		975	298 .loc 1 603 3 view .LVU59
		976	299 0058 039B ldr r3, [sp, #12]
		977	300 .LBE5:
		978	604:Core/Src/main.c ****
		979	605:Core/Src/main.c **** /Configure GPIO pin Output Level /
		980	606:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, SPI_CD_Pin\|SPI_RESET_Pin\|SPI_NSS1_Pin, GPIO_PIN_RESET);
		981	301 .loc 1 606 3 view .LVU60
		982	302 005a DFF85080 ldr r8, .L21+8
		983	303 005e 2246 mov r2, r4
		984	304 0060 5821 movs r1, #88
		985	305 0062 4046 mov r0, r8
		986	306 0064 FFF7FEFF bl HAL_GPIO_WritePin
		987	307 .LVL24:
		988	607:Core/Src/main.c ****
		989	608:Core/Src/main.c **** /Configure GPIO pin Output Level /
		990	609:Core/Src/main.c **** HAL_GPIO_WritePin(USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_RESET);
		991	308 .loc 1 609 3 view .LVU61
		992	309 0068 0F4D ldr r5, .L21+4
		993	310 006a 2246 mov r2, r4
		994	311 006c 1021 movs r1, #16
		995	312 006e 2846 mov r0, r5
		996	313 0070 FFF7FEFF bl HAL_GPIO_WritePin
		997	314 .LVL25:
		998	610:Core/Src/main.c ****
		999	611:Core/Src/main.c **** /Configure GPIO pins : SPI_CD_Pin SPI_RESET_Pin SPI_NSS1_Pin /
		1000	612:Core/Src/main.c **** GPIO_InitStruct.Pin = SPI_CD_Pin\|SPI_RESET_Pin\|SPI_NSS1_Pin;
		1001	315 .loc 1 612 3 view .LVU62
		1002	316 .loc 1 612 23 is_stmt 0 view .LVU63
		1003	317 0074 5823 movs r3, #88
		1004	318 0076 0493 str r3, [sp, #16]
		1005	613:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
		1006	319 .loc 1 613 3 is_stmt 1 view .LVU64
		1007	320 .loc 1 613 24 is_stmt 0 view .LVU65
		1008	321 0078 0127 movs r7, #1
		1009	322 007a 0597 str r7, [sp, #20]
		1010	614:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
		1011	323 .loc 1 614 3 is_stmt 1 view .LVU66
		1012	324 .loc 1 614 24 is_stmt 0 view .LVU67
		1013	325 007c 0694 str r4, [sp, #24]
		1014	615:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
		1015	326 .loc 1 615 3 is_stmt 1 view .LVU68
		1016	327 .loc 1 615 25 is_stmt 0 view .LVU69
		1017	328 007e 0226 movs r6, #2
		1018	329 0080 0796 str r6, [sp, #28]
		1019	616:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
		1020	330 .loc 1 616 3 is_stmt 1 view .LVU70
		1021	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 18
16	mjames	1022
		1023
19	mjames	1024	331 0082 04A9 add r1, sp, #16
		1025	332 0084 4046 mov r0, r8
		1026	333 0086 FFF7FEFF bl HAL_GPIO_Init
		1027	334 .LVL26:
		1028	617:Core/Src/main.c ****
		1029	618:Core/Src/main.c **** /Configure GPIO pin : USB_PULLUP_Pin /
		1030	619:Core/Src/main.c **** GPIO_InitStruct.Pin = USB_PULLUP_Pin;
		1031	335 .loc 1 619 3 view .LVU71
		1032	336 .loc 1 619 23 is_stmt 0 view .LVU72
		1033	337 008a 1023 movs r3, #16
		1034	338 008c 0493 str r3, [sp, #16]
		1035	620:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
		1036	339 .loc 1 620 3 is_stmt 1 view .LVU73
		1037	340 .loc 1 620 24 is_stmt 0 view .LVU74
		1038	341 008e 0597 str r7, [sp, #20]
		1039	621:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
		1040	342 .loc 1 621 3 is_stmt 1 view .LVU75
		1041	343 .loc 1 621 24 is_stmt 0 view .LVU76
		1042	344 0090 0694 str r4, [sp, #24]
		1043	622:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
		1044	345 .loc 1 622 3 is_stmt 1 view .LVU77
		1045	346 .loc 1 622 25 is_stmt 0 view .LVU78
		1046	347 0092 0796 str r6, [sp, #28]
		1047	623:Core/Src/main.c **** HAL_GPIO_Init(USB_PULLUP_GPIO_Port, &GPIO_InitStruct);
		1048	348 .loc 1 623 3 is_stmt 1 view .LVU79
		1049	349 0094 0DEB0301 add r1, sp, r3
		1050	350 0098 2846 mov r0, r5
		1051	351 009a FFF7FEFF bl HAL_GPIO_Init
		1052	352 .LVL27:
		1053	624:Core/Src/main.c ****
		1054	625:Core/Src/main.c **** }
		1055	353 .loc 1 625 1 is_stmt 0 view .LVU80
		1056	354 009e 08B0 add sp, sp, #32
		1057	355 .LCFI11:
		1058	356 .cfi_def_cfa_offset 24
		1059	357 @ sp needed
		1060	358 00a0 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
		1061	359 .L22:
		1062	360 .align 2
		1063	361 .L21:
		1064	362 00a4 00100240 .word 1073876992
		1065	363 00a8 000C0140 .word 1073810432
		1066	364 00ac 00080140 .word 1073809408
		1067	365 .cfi_endproc
		1068	366 .LFE80:
		1069	368 .section .text.MX_SPI1_Init,"ax",%progbits
		1070	369 .align 1
		1071	370 .syntax unified
		1072	371 .thumb
		1073	372 .thumb_func
		1074	373 .fpu softvfp
		1075	375 MX_SPI1_Init:
		1076	376 .LFB76:
		1077	424:Core/Src/main.c ****
		1078	377 .loc 1 424 1 is_stmt 1 view -0
		1079	378 .cfi_startproc
		1080	379 @ args = 0, pretend = 0, frame = 0
		1081	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 19
16	mjames	1082
		1083
19	mjames	1084	380 @ frame_needed = 0, uses_anonymous_args = 0
		1085	381 0000 08B5 push {r3, lr}
		1086	382 .LCFI12:
		1087	383 .cfi_def_cfa_offset 8
		1088	384 .cfi_offset 3, -8
		1089	385 .cfi_offset 14, -4
		1090	434:Core/Src/main.c **** hspi1.Init.Mode = SPI_MODE_MASTER;
		1091	386 .loc 1 434 3 view .LVU82
		1092	434:Core/Src/main.c **** hspi1.Init.Mode = SPI_MODE_MASTER;
		1093	387 .loc 1 434 18 is_stmt 0 view .LVU83
		1094	388 0002 0E48 ldr r0, .L25
		1095	389 0004 0E4B ldr r3, .L25+4
		1096	390 0006 0360 str r3, [r0]
		1097	435:Core/Src/main.c **** hspi1.Init.Direction = SPI_DIRECTION_1LINE;
		1098	391 .loc 1 435 3 is_stmt 1 view .LVU84
		1099	435:Core/Src/main.c **** hspi1.Init.Direction = SPI_DIRECTION_1LINE;
		1100	392 .loc 1 435 19 is_stmt 0 view .LVU85
		1101	393 0008 4FF48273 mov r3, #260
		1102	394 000c 4360 str r3, [r0, #4]
		1103	436:Core/Src/main.c **** hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
		1104	395 .loc 1 436 3 is_stmt 1 view .LVU86
		1105	436:Core/Src/main.c **** hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
		1106	396 .loc 1 436 24 is_stmt 0 view .LVU87
		1107	397 000e 4FF40043 mov r3, #32768
		1108	398 0012 8360 str r3, [r0, #8]
		1109	437:Core/Src/main.c **** hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
		1110	399 .loc 1 437 3 is_stmt 1 view .LVU88
		1111	437:Core/Src/main.c **** hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
		1112	400 .loc 1 437 23 is_stmt 0 view .LVU89
		1113	401 0014 0023 movs r3, #0
		1114	402 0016 C360 str r3, [r0, #12]
		1115	438:Core/Src/main.c **** hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
		1116	403 .loc 1 438 3 is_stmt 1 view .LVU90
		1117	438:Core/Src/main.c **** hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
		1118	404 .loc 1 438 26 is_stmt 0 view .LVU91
		1119	405 0018 0222 movs r2, #2
		1120	406 001a 0261 str r2, [r0, #16]
		1121	439:Core/Src/main.c **** hspi1.Init.NSS = SPI_NSS_SOFT;
		1122	407 .loc 1 439 3 is_stmt 1 view .LVU92
		1123	439:Core/Src/main.c **** hspi1.Init.NSS = SPI_NSS_SOFT;
		1124	408 .loc 1 439 23 is_stmt 0 view .LVU93
		1125	409 001c 0122 movs r2, #1
		1126	410 001e 4261 str r2, [r0, #20]
		1127	440:Core/Src/main.c **** hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
		1128	411 .loc 1 440 3 is_stmt 1 view .LVU94
		1129	440:Core/Src/main.c **** hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
		1130	412 .loc 1 440 18 is_stmt 0 view .LVU95
		1131	413 0020 4FF40072 mov r2, #512
		1132	414 0024 8261 str r2, [r0, #24]
		1133	441:Core/Src/main.c **** hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
		1134	415 .loc 1 441 3 is_stmt 1 view .LVU96
		1135	441:Core/Src/main.c **** hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
		1136	416 .loc 1 441 32 is_stmt 0 view .LVU97
		1137	417 0026 1022 movs r2, #16
		1138	418 0028 C261 str r2, [r0, #28]
		1139	442:Core/Src/main.c **** hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
		1140	419 .loc 1 442 3 is_stmt 1 view .LVU98
		1141	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 20
16	mjames	1142
		1143
19	mjames	1144	442:Core/Src/main.c **** hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
		1145	420 .loc 1 442 23 is_stmt 0 view .LVU99
		1146	421 002a 0362 str r3, [r0, #32]
		1147	443:Core/Src/main.c **** hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
		1148	422 .loc 1 443 3 is_stmt 1 view .LVU100
		1149	443:Core/Src/main.c **** hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
		1150	423 .loc 1 443 21 is_stmt 0 view .LVU101
		1151	424 002c 4362 str r3, [r0, #36]
		1152	444:Core/Src/main.c **** hspi1.Init.CRCPolynomial = 10;
		1153	425 .loc 1 444 3 is_stmt 1 view .LVU102
		1154	444:Core/Src/main.c **** hspi1.Init.CRCPolynomial = 10;
		1155	426 .loc 1 444 29 is_stmt 0 view .LVU103
		1156	427 002e 8362 str r3, [r0, #40]
		1157	445:Core/Src/main.c **** if (HAL_SPI_Init(&hspi1) != HAL_OK)
		1158	428 .loc 1 445 3 is_stmt 1 view .LVU104
		1159	445:Core/Src/main.c **** if (HAL_SPI_Init(&hspi1) != HAL_OK)
		1160	429 .loc 1 445 28 is_stmt 0 view .LVU105
		1161	430 0030 0A23 movs r3, #10
		1162	431 0032 C362 str r3, [r0, #44]
		1163	446:Core/Src/main.c **** {
		1164	432 .loc 1 446 3 is_stmt 1 view .LVU106
		1165	446:Core/Src/main.c **** {
		1166	433 .loc 1 446 7 is_stmt 0 view .LVU107
		1167	434 0034 FFF7FEFF bl HAL_SPI_Init
		1168	435 .LVL28:
		1169	454:Core/Src/main.c ****
		1170	436 .loc 1 454 1 view .LVU108
		1171	437 0038 08BD pop {r3, pc}
		1172	438 .L26:
		1173	439 003a 00BF .align 2
		1174	440 .L25:
		1175	441 003c 00000000 .word hspi1
		1176	442 0040 00300140 .word 1073819648
		1177	443 .cfi_endproc
		1178	444 .LFE76:
		1179	446 .section .text.MX_TIM4_Init,"ax",%progbits
		1180	447 .align 1
		1181	448 .syntax unified
		1182	449 .thumb
		1183	450 .thumb_func
		1184	451 .fpu softvfp
		1185	453 MX_TIM4_Init:
		1186	454 .LFB78:
		1187	514:Core/Src/main.c ****
		1188	455 .loc 1 514 1 is_stmt 1 view -0
		1189	456 .cfi_startproc
		1190	457 @ args = 0, pretend = 0, frame = 48
		1191	458 @ frame_needed = 0, uses_anonymous_args = 0
		1192	459 0000 30B5 push {r4, r5, lr}
		1193	460 .LCFI13:
		1194	461 .cfi_def_cfa_offset 12
		1195	462 .cfi_offset 4, -12
		1196	463 .cfi_offset 5, -8
		1197	464 .cfi_offset 14, -4
		1198	465 0002 8DB0 sub sp, sp, #52
		1199	466 .LCFI14:
		1200	467 .cfi_def_cfa_offset 64
		1201	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 21
16	mjames	1202
		1203
19	mjames	1204	520:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
		1205	468 .loc 1 520 3 view .LVU110
		1206	520:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
		1207	469 .loc 1 520 27 is_stmt 0 view .LVU111
		1208	470 0004 0024 movs r4, #0
		1209	471 0006 0494 str r4, [sp, #16]
		1210	472 0008 0694 str r4, [sp, #24]
		1211	473 000a 0894 str r4, [sp, #32]
		1212	474 000c 0A94 str r4, [sp, #40]
		1213	521:Core/Src/main.c ****
		1214	475 .loc 1 521 3 is_stmt 1 view .LVU112
		1215	521:Core/Src/main.c ****
		1216	476 .loc 1 521 27 is_stmt 0 view .LVU113
		1217	477 000e 0194 str r4, [sp, #4]
		1218	478 0010 0294 str r4, [sp, #8]
		1219	526:Core/Src/main.c **** htim4.Init.Prescaler = 0;
		1220	479 .loc 1 526 3 is_stmt 1 view .LVU114
		1221	526:Core/Src/main.c **** htim4.Init.Prescaler = 0;
		1222	480 .loc 1 526 18 is_stmt 0 view .LVU115
		1223	481 0012 0F4D ldr r5, .L29
		1224	482 0014 0F4B ldr r3, .L29+4
		1225	483 0016 2B60 str r3, [r5]
		1226	527:Core/Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
		1227	484 .loc 1 527 3 is_stmt 1 view .LVU116
		1228	527:Core/Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
		1229	485 .loc 1 527 24 is_stmt 0 view .LVU117
		1230	486 0018 6C60 str r4, [r5, #4]
		1231	528:Core/Src/main.c **** htim4.Init.Period = 65535;
		1232	487 .loc 1 528 3 is_stmt 1 view .LVU118
		1233	528:Core/Src/main.c **** htim4.Init.Period = 65535;
		1234	488 .loc 1 528 26 is_stmt 0 view .LVU119
		1235	489 001a AC60 str r4, [r5, #8]
		1236	529:Core/Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
		1237	490 .loc 1 529 3 is_stmt 1 view .LVU120
		1238	529:Core/Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
		1239	491 .loc 1 529 21 is_stmt 0 view .LVU121
		1240	492 001c 4FF6FF73 movw r3, #65535
		1241	493 0020 EB60 str r3, [r5, #12]
		1242	530:Core/Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
		1243	494 .loc 1 530 3 is_stmt 1 view .LVU122
		1244	530:Core/Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
		1245	495 .loc 1 530 28 is_stmt 0 view .LVU123
		1246	496 0022 2C61 str r4, [r5, #16]
		1247	531:Core/Src/main.c **** sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
		1248	497 .loc 1 531 3 is_stmt 1 view .LVU124
		1249	531:Core/Src/main.c **** sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
		1250	498 .loc 1 531 32 is_stmt 0 view .LVU125
		1251	499 0024 AC61 str r4, [r5, #24]
		1252	532:Core/Src/main.c **** sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
		1253	500 .loc 1 532 3 is_stmt 1 view .LVU126
		1254	532:Core/Src/main.c **** sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
		1255	501 .loc 1 532 23 is_stmt 0 view .LVU127
		1256	502 0026 0323 movs r3, #3
		1257	503 0028 0393 str r3, [sp, #12]
		1258	533:Core/Src/main.c **** sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
		1259	504 .loc 1 533 3 is_stmt 1 view .LVU128
		1260	534:Core/Src/main.c **** sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
		1261	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 22
16	mjames	1262
		1263
19	mjames	1264	505 .loc 1 534 3 view .LVU129
		1265	534:Core/Src/main.c **** sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
		1266	506 .loc 1 534 24 is_stmt 0 view .LVU130
		1267	507 002a 0122 movs r2, #1
		1268	508 002c 0592 str r2, [sp, #20]
		1269	535:Core/Src/main.c **** sConfig.IC1Filter = 8;
		1270	509 .loc 1 535 3 is_stmt 1 view .LVU131
		1271	536:Core/Src/main.c **** sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
		1272	510 .loc 1 536 3 view .LVU132
		1273	536:Core/Src/main.c **** sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
		1274	511 .loc 1 536 21 is_stmt 0 view .LVU133
		1275	512 002e 0823 movs r3, #8
		1276	513 0030 0793 str r3, [sp, #28]
		1277	537:Core/Src/main.c **** sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
		1278	514 .loc 1 537 3 is_stmt 1 view .LVU134
		1279	538:Core/Src/main.c **** sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
		1280	515 .loc 1 538 3 view .LVU135
		1281	538:Core/Src/main.c **** sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
		1282	516 .loc 1 538 24 is_stmt 0 view .LVU136
		1283	517 0032 0992 str r2, [sp, #36]
		1284	539:Core/Src/main.c **** sConfig.IC2Filter = 8;
		1285	518 .loc 1 539 3 is_stmt 1 view .LVU137
		1286	540:Core/Src/main.c **** if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK)
		1287	519 .loc 1 540 3 view .LVU138
		1288	540:Core/Src/main.c **** if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK)
		1289	520 .loc 1 540 21 is_stmt 0 view .LVU139
		1290	521 0034 0B93 str r3, [sp, #44]
		1291	541:Core/Src/main.c **** {
		1292	522 .loc 1 541 3 is_stmt 1 view .LVU140
		1293	541:Core/Src/main.c **** {
		1294	523 .loc 1 541 7 is_stmt 0 view .LVU141
		1295	524 0036 03A9 add r1, sp, #12
		1296	525 0038 2846 mov r0, r5
		1297	526 003a FFF7FEFF bl HAL_TIM_Encoder_Init
		1298	527 .LVL29:
		1299	545:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
		1300	528 .loc 1 545 3 is_stmt 1 view .LVU142
		1301	545:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
		1302	529 .loc 1 545 37 is_stmt 0 view .LVU143
		1303	530 003e 0194 str r4, [sp, #4]
		1304	546:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
		1305	531 .loc 1 546 3 is_stmt 1 view .LVU144
		1306	546:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
		1307	532 .loc 1 546 33 is_stmt 0 view .LVU145
		1308	533 0040 0294 str r4, [sp, #8]
		1309	547:Core/Src/main.c **** {
		1310	534 .loc 1 547 3 is_stmt 1 view .LVU146
		1311	547:Core/Src/main.c **** {
		1312	535 .loc 1 547 7 is_stmt 0 view .LVU147
		1313	536 0042 01A9 add r1, sp, #4
		1314	537 0044 2846 mov r0, r5
		1315	538 0046 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
		1316	539 .LVL30:
		1317	555:Core/Src/main.c ****
		1318	540 .loc 1 555 1 view .LVU148
		1319	541 004a 0DB0 add sp, sp, #52
		1320	542 .LCFI15:
		1321	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 23
16	mjames	1322
		1323
19	mjames	1324	543 .cfi_def_cfa_offset 12
		1325	544 @ sp needed
		1326	545 004c 30BD pop {r4, r5, pc}
		1327	546 .L30:
		1328	547 004e 00BF .align 2
		1329	548 .L29:
		1330	549 0050 00000000 .word htim4
		1331	550 0054 00080040 .word 1073743872
		1332	551 .cfi_endproc
		1333	552 .LFE78:
		1334	554 .section .text.MX_USART1_UART_Init,"ax",%progbits
		1335	555 .align 1
		1336	556 .syntax unified
		1337	557 .thumb
		1338	558 .thumb_func
		1339	559 .fpu softvfp
		1340	561 MX_USART1_UART_Init:
		1341	562 .LFB79:
		1342	563:Core/Src/main.c ****
		1343	563 .loc 1 563 1 is_stmt 1 view -0
		1344	564 .cfi_startproc
		1345	565 @ args = 0, pretend = 0, frame = 0
		1346	566 @ frame_needed = 0, uses_anonymous_args = 0
		1347	567 0000 08B5 push {r3, lr}
		1348	568 .LCFI16:
		1349	569 .cfi_def_cfa_offset 8
		1350	570 .cfi_offset 3, -8
		1351	571 .cfi_offset 14, -4
		1352	572:Core/Src/main.c **** huart1.Init.BaudRate = 115200;
		1353	572 .loc 1 572 3 view .LVU150
		1354	572:Core/Src/main.c **** huart1.Init.BaudRate = 115200;
		1355	573 .loc 1 572 19 is_stmt 0 view .LVU151
		1356	574 0002 0848 ldr r0, .L33
		1357	575 0004 084B ldr r3, .L33+4
		1358	576 0006 0360 str r3, [r0]
		1359	573:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B;
		1360	577 .loc 1 573 3 is_stmt 1 view .LVU152
		1361	573:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B;
		1362	578 .loc 1 573 24 is_stmt 0 view .LVU153
		1363	579 0008 4FF4E133 mov r3, #115200
		1364	580 000c 4360 str r3, [r0, #4]
		1365	574:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1;
		1366	581 .loc 1 574 3 is_stmt 1 view .LVU154
		1367	574:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1;
		1368	582 .loc 1 574 26 is_stmt 0 view .LVU155
		1369	583 000e 0023 movs r3, #0
		1370	584 0010 8360 str r3, [r0, #8]
		1371	575:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE;
		1372	585 .loc 1 575 3 is_stmt 1 view .LVU156
		1373	575:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE;
		1374	586 .loc 1 575 24 is_stmt 0 view .LVU157
		1375	587 0012 C360 str r3, [r0, #12]
		1376	576:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX;
		1377	588 .loc 1 576 3 is_stmt 1 view .LVU158
		1378	576:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX;
		1379	589 .loc 1 576 22 is_stmt 0 view .LVU159
		1380	590 0014 0361 str r3, [r0, #16]
		1381	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 24
16	mjames	1382
		1383
19	mjames	1384	577:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
		1385	591 .loc 1 577 3 is_stmt 1 view .LVU160
		1386	577:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
		1387	592 .loc 1 577 20 is_stmt 0 view .LVU161
		1388	593 0016 0C22 movs r2, #12
		1389	594 0018 4261 str r2, [r0, #20]
		1390	578:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16;
		1391	595 .loc 1 578 3 is_stmt 1 view .LVU162
		1392	578:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16;
		1393	596 .loc 1 578 25 is_stmt 0 view .LVU163
		1394	597 001a 8361 str r3, [r0, #24]
		1395	579:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK)
		1396	598 .loc 1 579 3 is_stmt 1 view .LVU164
		1397	579:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK)
		1398	599 .loc 1 579 28 is_stmt 0 view .LVU165
		1399	600 001c C361 str r3, [r0, #28]
		1400	580:Core/Src/main.c **** {
		1401	601 .loc 1 580 3 is_stmt 1 view .LVU166
		1402	580:Core/Src/main.c **** {
		1403	602 .loc 1 580 7 is_stmt 0 view .LVU167
		1404	603 001e FFF7FEFF bl HAL_UART_Init
		1405	604 .LVL31:
		1406	588:Core/Src/main.c ****
		1407	605 .loc 1 588 1 view .LVU168
		1408	606 0022 08BD pop {r3, pc}
		1409	607 .L34:
		1410	608 .align 2
		1411	609 .L33:
		1412	610 0024 00000000 .word huart1
		1413	611 0028 00380140 .word 1073821696
		1414	612 .cfi_endproc
		1415	613 .LFE79:
		1416	615 .section .text.MX_TIM3_Init,"ax",%progbits
		1417	616 .align 1
		1418	617 .syntax unified
		1419	618 .thumb
		1420	619 .thumb_func
		1421	620 .fpu softvfp
		1422	622 MX_TIM3_Init:
		1423	623 .LFB77:
		1424	462:Core/Src/main.c ****
		1425	624 .loc 1 462 1 is_stmt 1 view -0
		1426	625 .cfi_startproc
		1427	626 @ args = 0, pretend = 0, frame = 40
		1428	627 @ frame_needed = 0, uses_anonymous_args = 0
		1429	628 0000 30B5 push {r4, r5, lr}
		1430	629 .LCFI17:
		1431	630 .cfi_def_cfa_offset 12
		1432	631 .cfi_offset 4, -12
		1433	632 .cfi_offset 5, -8
		1434	633 .cfi_offset 14, -4
		1435	634 0002 8BB0 sub sp, sp, #44
		1436	635 .LCFI18:
		1437	636 .cfi_def_cfa_offset 56
		1438	468:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
		1439	637 .loc 1 468 3 view .LVU170
		1440	468:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
		1441	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 25
16	mjames	1442
		1443
19	mjames	1444	638 .loc 1 468 27 is_stmt 0 view .LVU171
		1445	639 0004 0024 movs r4, #0
		1446	640 0006 0894 str r4, [sp, #32]
		1447	641 0008 0994 str r4, [sp, #36]
		1448	469:Core/Src/main.c ****
		1449	642 .loc 1 469 3 is_stmt 1 view .LVU172
		1450	469:Core/Src/main.c ****
		1451	643 .loc 1 469 22 is_stmt 0 view .LVU173
		1452	644 000a 0194 str r4, [sp, #4]
		1453	645 000c 0294 str r4, [sp, #8]
		1454	646 000e 0394 str r4, [sp, #12]
		1455	647 0010 0494 str r4, [sp, #16]
		1456	648 0012 0594 str r4, [sp, #20]
		1457	649 0014 0694 str r4, [sp, #24]
		1458	650 0016 0794 str r4, [sp, #28]
		1459	474:Core/Src/main.c **** htim3.Init.Prescaler = 719;
		1460	651 .loc 1 474 3 is_stmt 1 view .LVU174
		1461	474:Core/Src/main.c **** htim3.Init.Prescaler = 719;
		1462	652 .loc 1 474 18 is_stmt 0 view .LVU175
		1463	653 0018 134D ldr r5, .L37
		1464	654 001a 144B ldr r3, .L37+4
		1465	655 001c 2B60 str r3, [r5]
		1466	475:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
		1467	656 .loc 1 475 3 is_stmt 1 view .LVU176
		1468	475:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
		1469	657 .loc 1 475 24 is_stmt 0 view .LVU177
		1470	658 001e 40F2CF23 movw r3, #719
		1471	659 0022 6B60 str r3, [r5, #4]
		1472	476:Core/Src/main.c **** htim3.Init.Period = 10000;
		1473	660 .loc 1 476 3 is_stmt 1 view .LVU178
		1474	476:Core/Src/main.c **** htim3.Init.Period = 10000;
		1475	661 .loc 1 476 26 is_stmt 0 view .LVU179
		1476	662 0024 AC60 str r4, [r5, #8]
		1477	477:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
		1478	663 .loc 1 477 3 is_stmt 1 view .LVU180
		1479	477:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
		1480	664 .loc 1 477 21 is_stmt 0 view .LVU181
		1481	665 0026 42F21073 movw r3, #10000
		1482	666 002a EB60 str r3, [r5, #12]
		1483	478:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
		1484	667 .loc 1 478 3 is_stmt 1 view .LVU182
		1485	478:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
		1486	668 .loc 1 478 28 is_stmt 0 view .LVU183
		1487	669 002c 2C61 str r4, [r5, #16]
		1488	479:Core/Src/main.c **** if (HAL_TIM_OC_Init(&htim3) != HAL_OK)
		1489	670 .loc 1 479 3 is_stmt 1 view .LVU184
		1490	479:Core/Src/main.c **** if (HAL_TIM_OC_Init(&htim3) != HAL_OK)
		1491	671 .loc 1 479 32 is_stmt 0 view .LVU185
		1492	672 002e AC61 str r4, [r5, #24]
		1493	480:Core/Src/main.c **** {
		1494	673 .loc 1 480 3 is_stmt 1 view .LVU186
		1495	480:Core/Src/main.c **** {
		1496	674 .loc 1 480 7 is_stmt 0 view .LVU187
		1497	675 0030 2846 mov r0, r5
		1498	676 0032 FFF7FEFF bl HAL_TIM_OC_Init
		1499	677 .LVL32:
		1500	484:Core/Src/main.c **** {
		1501	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 26
16	mjames	1502
		1503
19	mjames	1504	678 .loc 1 484 3 is_stmt 1 view .LVU188
		1505	484:Core/Src/main.c **** {
		1506	679 .loc 1 484 7 is_stmt 0 view .LVU189
		1507	680 0036 0821 movs r1, #8
		1508	681 0038 2846 mov r0, r5
		1509	682 003a FFF7FEFF bl HAL_TIM_OnePulse_Init
		1510	683 .LVL33:
		1511	488:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
		1512	684 .loc 1 488 3 is_stmt 1 view .LVU190
		1513	488:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
		1514	685 .loc 1 488 37 is_stmt 0 view .LVU191
		1515	686 003e 1023 movs r3, #16
		1516	687 0040 0893 str r3, [sp, #32]
		1517	489:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
		1518	688 .loc 1 489 3 is_stmt 1 view .LVU192
		1519	489:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
		1520	689 .loc 1 489 33 is_stmt 0 view .LVU193
		1521	690 0042 0994 str r4, [sp, #36]
		1522	490:Core/Src/main.c **** {
		1523	691 .loc 1 490 3 is_stmt 1 view .LVU194
		1524	490:Core/Src/main.c **** {
		1525	692 .loc 1 490 7 is_stmt 0 view .LVU195
		1526	693 0044 08A9 add r1, sp, #32
		1527	694 0046 2846 mov r0, r5
		1528	695 0048 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
		1529	696 .LVL34:
		1530	494:Core/Src/main.c **** sConfigOC.Pulse = 9999;
		1531	697 .loc 1 494 3 is_stmt 1 view .LVU196
		1532	494:Core/Src/main.c **** sConfigOC.Pulse = 9999;
		1533	698 .loc 1 494 20 is_stmt 0 view .LVU197
		1534	699 004c 0194 str r4, [sp, #4]
		1535	495:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
		1536	700 .loc 1 495 3 is_stmt 1 view .LVU198
		1537	495:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
		1538	701 .loc 1 495 19 is_stmt 0 view .LVU199
		1539	702 004e 42F20F73 movw r3, #9999
		1540	703 0052 0293 str r3, [sp, #8]
		1541	496:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
		1542	704 .loc 1 496 3 is_stmt 1 view .LVU200
		1543	496:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
		1544	705 .loc 1 496 24 is_stmt 0 view .LVU201
		1545	706 0054 0394 str r4, [sp, #12]
		1546	497:Core/Src/main.c **** if (HAL_TIM_OC_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
		1547	707 .loc 1 497 3 is_stmt 1 view .LVU202
		1548	497:Core/Src/main.c **** if (HAL_TIM_OC_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
		1549	708 .loc 1 497 24 is_stmt 0 view .LVU203
		1550	709 0056 0594 str r4, [sp, #20]
		1551	498:Core/Src/main.c **** {
		1552	710 .loc 1 498 3 is_stmt 1 view .LVU204
		1553	498:Core/Src/main.c **** {
		1554	711 .loc 1 498 7 is_stmt 0 view .LVU205
		1555	712 0058 2246 mov r2, r4
		1556	713 005a 01A9 add r1, sp, #4
		1557	714 005c 2846 mov r0, r5
		1558	715 005e FFF7FEFF bl HAL_TIM_OC_ConfigChannel
		1559	716 .LVL35:
		1560	506:Core/Src/main.c ****
		1561	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 27
16	mjames	1562
		1563
19	mjames	1564	717 .loc 1 506 1 view .LVU206
		1565	718 0062 0BB0 add sp, sp, #44
		1566	719 .LCFI19:
		1567	720 .cfi_def_cfa_offset 12
		1568	721 @ sp needed
		1569	722 0064 30BD pop {r4, r5, pc}
		1570	723 .L38:
		1571	724 0066 00BF .align 2
		1572	725 .L37:
		1573	726 0068 00000000 .word htim3
		1574	727 006c 00040040 .word 1073742848
		1575	728 .cfi_endproc
		1576	729 .LFE77:
		1577	731 .section .text.MX_I2C2_Init,"ax",%progbits
		1578	732 .align 1
		1579	733 .syntax unified
		1580	734 .thumb
		1581	735 .thumb_func
		1582	736 .fpu softvfp
		1583	738 MX_I2C2_Init:
		1584	739 .LFB74:
		1585	333:Core/Src/main.c ****
		1586	740 .loc 1 333 1 is_stmt 1 view -0
		1587	741 .cfi_startproc
		1588	742 @ args = 0, pretend = 0, frame = 0
		1589	743 @ frame_needed = 0, uses_anonymous_args = 0
		1590	744 0000 08B5 push {r3, lr}
		1591	745 .LCFI20:
		1592	746 .cfi_def_cfa_offset 8
		1593	747 .cfi_offset 3, -8
		1594	748 .cfi_offset 14, -4
		1595	342:Core/Src/main.c **** hi2c2.Init.ClockSpeed = 100000;
		1596	749 .loc 1 342 3 view .LVU208
		1597	342:Core/Src/main.c **** hi2c2.Init.ClockSpeed = 100000;
		1598	750 .loc 1 342 18 is_stmt 0 view .LVU209
		1599	751 0002 0948 ldr r0, .L41
		1600	752 0004 094B ldr r3, .L41+4
		1601	753 0006 0360 str r3, [r0]
		1602	343:Core/Src/main.c **** hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
		1603	754 .loc 1 343 3 is_stmt 1 view .LVU210
		1604	343:Core/Src/main.c **** hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
		1605	755 .loc 1 343 25 is_stmt 0 view .LVU211
		1606	756 0008 094B ldr r3, .L41+8
		1607	757 000a 4360 str r3, [r0, #4]
		1608	344:Core/Src/main.c **** hi2c2.Init.OwnAddress1 = 0;
		1609	758 .loc 1 344 3 is_stmt 1 view .LVU212
		1610	344:Core/Src/main.c **** hi2c2.Init.OwnAddress1 = 0;
		1611	759 .loc 1 344 24 is_stmt 0 view .LVU213
		1612	760 000c 0023 movs r3, #0
		1613	761 000e 8360 str r3, [r0, #8]
		1614	345:Core/Src/main.c **** hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
		1615	762 .loc 1 345 3 is_stmt 1 view .LVU214
		1616	345:Core/Src/main.c **** hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
		1617	763 .loc 1 345 26 is_stmt 0 view .LVU215
		1618	764 0010 C360 str r3, [r0, #12]
		1619	346:Core/Src/main.c **** hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
		1620	765 .loc 1 346 3 is_stmt 1 view .LVU216
		1621	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 28
16	mjames	1622
		1623
19	mjames	1624	346:Core/Src/main.c **** hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
		1625	766 .loc 1 346 29 is_stmt 0 view .LVU217
		1626	767 0012 4FF48042 mov r2, #16384
		1627	768 0016 0261 str r2, [r0, #16]
		1628	347:Core/Src/main.c **** hi2c2.Init.OwnAddress2 = 0;
		1629	769 .loc 1 347 3 is_stmt 1 view .LVU218
		1630	347:Core/Src/main.c **** hi2c2.Init.OwnAddress2 = 0;
		1631	770 .loc 1 347 30 is_stmt 0 view .LVU219
		1632	771 0018 4361 str r3, [r0, #20]
		1633	348:Core/Src/main.c **** hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
		1634	772 .loc 1 348 3 is_stmt 1 view .LVU220
		1635	348:Core/Src/main.c **** hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
		1636	773 .loc 1 348 26 is_stmt 0 view .LVU221
		1637	774 001a 8361 str r3, [r0, #24]
		1638	349:Core/Src/main.c **** hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
		1639	775 .loc 1 349 3 is_stmt 1 view .LVU222
		1640	349:Core/Src/main.c **** hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
		1641	776 .loc 1 349 30 is_stmt 0 view .LVU223
		1642	777 001c C361 str r3, [r0, #28]
		1643	350:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c2) != HAL_OK)
		1644	778 .loc 1 350 3 is_stmt 1 view .LVU224
		1645	350:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c2) != HAL_OK)
		1646	779 .loc 1 350 28 is_stmt 0 view .LVU225
		1647	780 001e 0362 str r3, [r0, #32]
		1648	351:Core/Src/main.c **** {
		1649	781 .loc 1 351 3 is_stmt 1 view .LVU226
		1650	351:Core/Src/main.c **** {
		1651	782 .loc 1 351 7 is_stmt 0 view .LVU227
		1652	783 0020 FFF7FEFF bl HAL_I2C_Init
		1653	784 .LVL36:
		1654	359:Core/Src/main.c ****
		1655	785 .loc 1 359 1 view .LVU228
		1656	786 0024 08BD pop {r3, pc}
		1657	787 .L42:
		1658	788 0026 00BF .align 2
		1659	789 .L41:
		1660	790 0028 00000000 .word hi2c2
		1661	791 002c 00580040 .word 1073764352
		1662	792 0030 A0860100 .word 100000
		1663	793 .cfi_endproc
		1664	794 .LFE74:
		1665	796 .section .text.MX_RTC_Init,"ax",%progbits
		1666	797 .align 1
		1667	798 .syntax unified
		1668	799 .thumb
		1669	800 .thumb_func
		1670	801 .fpu softvfp
		1671	803 MX_RTC_Init:
		1672	804 .LFB75:
		1673	367:Core/Src/main.c ****
		1674	805 .loc 1 367 1 is_stmt 1 view -0
		1675	806 .cfi_startproc
		1676	807 @ args = 0, pretend = 0, frame = 8
		1677	808 @ frame_needed = 0, uses_anonymous_args = 0
		1678	809 0000 30B5 push {r4, r5, lr}
		1679	810 .LCFI21:
		1680	811 .cfi_def_cfa_offset 12
		1681	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 29
16	mjames	1682
		1683
19	mjames	1684	812 .cfi_offset 4, -12
		1685	813 .cfi_offset 5, -8
		1686	814 .cfi_offset 14, -4
		1687	815 0002 83B0 sub sp, sp, #12
		1688	816 .LCFI22:
		1689	817 .cfi_def_cfa_offset 24
		1690	373:Core/Src/main.c **** RTC_DateTypeDef DateToUpdate = {0};
		1691	818 .loc 1 373 3 view .LVU230
		1692	373:Core/Src/main.c **** RTC_DateTypeDef DateToUpdate = {0};
		1693	819 .loc 1 373 19 is_stmt 0 view .LVU231
		1694	820 0004 0024 movs r4, #0
		1695	821 0006 ADF80440 strh r4, [sp, #4] @ movhi
		1696	822 000a 8DF80640 strb r4, [sp, #6]
		1697	374:Core/Src/main.c ****
		1698	823 .loc 1 374 3 is_stmt 1 view .LVU232
		1699	374:Core/Src/main.c ****
		1700	824 .loc 1 374 19 is_stmt 0 view .LVU233
		1701	825 000e 0094 str r4, [sp]
		1702	381:Core/Src/main.c **** hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
		1703	826 .loc 1 381 3 is_stmt 1 view .LVU234
		1704	381:Core/Src/main.c **** hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
		1705	827 .loc 1 381 17 is_stmt 0 view .LVU235
		1706	828 0010 124D ldr r5, .L45
		1707	829 0012 134B ldr r3, .L45+4
		1708	830 0014 2B60 str r3, [r5]
		1709	382:Core/Src/main.c **** hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM;
		1710	831 .loc 1 382 3 is_stmt 1 view .LVU236
		1711	382:Core/Src/main.c **** hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM;
		1712	832 .loc 1 382 26 is_stmt 0 view .LVU237
		1713	833 0016 4FF0FF33 mov r3, #-1
		1714	834 001a 6B60 str r3, [r5, #4]
		1715	383:Core/Src/main.c **** if (HAL_RTC_Init(&hrtc) != HAL_OK)
		1716	835 .loc 1 383 3 is_stmt 1 view .LVU238
		1717	383:Core/Src/main.c **** if (HAL_RTC_Init(&hrtc) != HAL_OK)
		1718	836 .loc 1 383 20 is_stmt 0 view .LVU239
		1719	837 001c 4FF48073 mov r3, #256
		1720	838 0020 AB60 str r3, [r5, #8]
		1721	384:Core/Src/main.c **** {
		1722	839 .loc 1 384 3 is_stmt 1 view .LVU240
		1723	384:Core/Src/main.c **** {
		1724	840 .loc 1 384 7 is_stmt 0 view .LVU241
		1725	841 0022 2846 mov r0, r5
		1726	842 0024 FFF7FEFF bl HAL_RTC_Init
		1727	843 .LVL37:
		1728	395:Core/Src/main.c **** sTime.Minutes = 0x0;
		1729	844 .loc 1 395 3 is_stmt 1 view .LVU242
		1730	395:Core/Src/main.c **** sTime.Minutes = 0x0;
		1731	845 .loc 1 395 15 is_stmt 0 view .LVU243
		1732	846 0028 8DF80440 strb r4, [sp, #4]
		1733	396:Core/Src/main.c **** sTime.Seconds = 0x0;
		1734	847 .loc 1 396 3 is_stmt 1 view .LVU244
		1735	396:Core/Src/main.c **** sTime.Seconds = 0x0;
		1736	848 .loc 1 396 17 is_stmt 0 view .LVU245
		1737	849 002c 8DF80540 strb r4, [sp, #5]
		1738	397:Core/Src/main.c ****
		1739	850 .loc 1 397 3 is_stmt 1 view .LVU246
		1740	397:Core/Src/main.c ****
		1741	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 30
16	mjames	1742
		1743
19	mjames	1744	851 .loc 1 397 17 is_stmt 0 view .LVU247
		1745	852 0030 8DF80640 strb r4, [sp, #6]
		1746	399:Core/Src/main.c **** {
		1747	853 .loc 1 399 3 is_stmt 1 view .LVU248
		1748	399:Core/Src/main.c **** {
		1749	854 .loc 1 399 7 is_stmt 0 view .LVU249
		1750	855 0034 0122 movs r2, #1
		1751	856 0036 01A9 add r1, sp, #4
		1752	857 0038 2846 mov r0, r5
		1753	858 003a FFF7FEFF bl HAL_RTC_SetTime
		1754	859 .LVL38:
		1755	403:Core/Src/main.c **** DateToUpdate.Month = RTC_MONTH_JANUARY;
		1756	860 .loc 1 403 3 is_stmt 1 view .LVU250
		1757	403:Core/Src/main.c **** DateToUpdate.Month = RTC_MONTH_JANUARY;
		1758	861 .loc 1 403 24 is_stmt 0 view .LVU251
		1759	862 003e 0122 movs r2, #1
		1760	863 0040 8DF80020 strb r2, [sp]
		1761	404:Core/Src/main.c **** DateToUpdate.Date = 0x1;
		1762	864 .loc 1 404 3 is_stmt 1 view .LVU252
		1763	404:Core/Src/main.c **** DateToUpdate.Date = 0x1;
		1764	865 .loc 1 404 22 is_stmt 0 view .LVU253
		1765	866 0044 8DF80120 strb r2, [sp, #1]
		1766	405:Core/Src/main.c **** DateToUpdate.Year = 0x0;
		1767	867 .loc 1 405 3 is_stmt 1 view .LVU254
		1768	405:Core/Src/main.c **** DateToUpdate.Year = 0x0;
		1769	868 .loc 1 405 21 is_stmt 0 view .LVU255
		1770	869 0048 8DF80220 strb r2, [sp, #2]
		1771	406:Core/Src/main.c ****
		1772	870 .loc 1 406 3 is_stmt 1 view .LVU256
		1773	406:Core/Src/main.c ****
		1774	871 .loc 1 406 21 is_stmt 0 view .LVU257
		1775	872 004c 8DF80340 strb r4, [sp, #3]
		1776	408:Core/Src/main.c **** {
		1777	873 .loc 1 408 3 is_stmt 1 view .LVU258
		1778	408:Core/Src/main.c **** {
		1779	874 .loc 1 408 7 is_stmt 0 view .LVU259
		1780	875 0050 6946 mov r1, sp
		1781	876 0052 2846 mov r0, r5
		1782	877 0054 FFF7FEFF bl HAL_RTC_SetDate
		1783	878 .LVL39:
		1784	416:Core/Src/main.c ****
		1785	879 .loc 1 416 1 view .LVU260
		1786	880 0058 03B0 add sp, sp, #12
		1787	881 .LCFI23:
		1788	882 .cfi_def_cfa_offset 12
		1789	883 @ sp needed
		1790	884 005a 30BD pop {r4, r5, pc}
		1791	885 .L46:
		1792	886 .align 2
		1793	887 .L45:
		1794	888 005c 00000000 .word hrtc
		1795	889 0060 00280040 .word 1073752064
		1796	890 .cfi_endproc
		1797	891 .LFE75:
		1798	893 .section .text.stream_sensor_data_forced_mode,"ax",%progbits
		1799	894 .align 1
		1800	895 .global stream_sensor_data_forced_mode
		1801	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 31
16	mjames	1802
		1803
19	mjames	1804	896 .syntax unified
		1805	897 .thumb
		1806	898 .thumb_func
		1807	899 .fpu softvfp
		1808	901 stream_sensor_data_forced_mode:
		1809	902 .LVL40:
		1810	903 .LFB71:
		1811	126:Core/Src/main.c **** /* Variable to define the result */
		1812	904 .loc 1 126 1 is_stmt 1 view -0
		1813	905 .cfi_startproc
		1814	906 @ args = 0, pretend = 0, frame = 0
		1815	907 @ frame_needed = 0, uses_anonymous_args = 0
		1816	126:Core/Src/main.c **** /* Variable to define the result */
		1817	908 .loc 1 126 1 is_stmt 0 view .LVU262
		1818	909 0000 10B5 push {r4, lr}
		1819	910 .LCFI24:
		1820	911 .cfi_def_cfa_offset 8
		1821	912 .cfi_offset 4, -8
		1822	913 .cfi_offset 14, -4
		1823	914 0002 0446 mov r4, r0
		1824	128:Core/Src/main.c ****
		1825	915 .loc 1 128 3 is_stmt 1 view .LVU263
		1826	916 .LVL41:
		1827	131:Core/Src/main.c ****
		1828	917 .loc 1 131 3 view .LVU264
		1829	134:Core/Src/main.c ****
		1830	918 .loc 1 134 3 view .LVU265
		1831	137:Core/Src/main.c **** dev->settings.osr_p = BME280_OVERSAMPLING_16X;
		1832	919 .loc 1 137 3 view .LVU266
		1833	137:Core/Src/main.c **** dev->settings.osr_p = BME280_OVERSAMPLING_16X;
		1834	920 .loc 1 137 23 is_stmt 0 view .LVU267
		1835	921 0004 0123 movs r3, #1
		1836	922 0006 80F84230 strb r3, [r0, #66]
		1837	138:Core/Src/main.c **** dev->settings.osr_t = BME280_OVERSAMPLING_2X;
		1838	923 .loc 1 138 3 is_stmt 1 view .LVU268
		1839	138:Core/Src/main.c **** dev->settings.osr_t = BME280_OVERSAMPLING_2X;
		1840	924 .loc 1 138 23 is_stmt 0 view .LVU269
		1841	925 000a 0523 movs r3, #5
		1842	926 000c 80F84030 strb r3, [r0, #64]
		1843	139:Core/Src/main.c **** dev->settings.filter = BME280_FILTER_COEFF_16;
		1844	927 .loc 1 139 3 is_stmt 1 view .LVU270
		1845	139:Core/Src/main.c **** dev->settings.filter = BME280_FILTER_COEFF_16;
		1846	928 .loc 1 139 23 is_stmt 0 view .LVU271
		1847	929 0010 0223 movs r3, #2
		1848	930 0012 80F84130 strb r3, [r0, #65]
		1849	140:Core/Src/main.c ****
		1850	931 .loc 1 140 3 is_stmt 1 view .LVU272
		1851	140:Core/Src/main.c ****
		1852	932 .loc 1 140 24 is_stmt 0 view .LVU273
		1853	933 0016 0423 movs r3, #4
		1854	934 0018 80F84330 strb r3, [r0, #67]
		1855	142:Core/Src/main.c **** \| BME280_FILTER_SEL;
		1856	935 .loc 1 142 3 is_stmt 1 view .LVU274
		1857	936 .LVL42:
		1858	146:Core/Src/main.c **** if (rslt != BME280_OK)
		1859	937 .loc 1 146 3 view .LVU275
		1860	146:Core/Src/main.c **** if (rslt != BME280_OK)
		1861	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 32
16	mjames	1862
		1863
19	mjames	1864	938 .loc 1 146 10 is_stmt 0 view .LVU276
		1865	939 001c 0146 mov r1, r0
		1866	940 001e 0F20 movs r0, #15
		1867	941 .LVL43:
		1868	146:Core/Src/main.c **** if (rslt != BME280_OK)
		1869	942 .loc 1 146 10 view .LVU277
		1870	943 0020 FFF7FEFF bl bme280_set_sensor_settings
		1871	944 .LVL44:
		1872	147:Core/Src/main.c **** {
		1873	945 .loc 1 147 3 is_stmt 1 view .LVU278
		1874	147:Core/Src/main.c **** {
		1875	946 .loc 1 147 6 is_stmt 0 view .LVU279
		1876	947 0024 0346 mov r3, r0
		1877	948 0026 08B1 cbz r0, .L50
		1878	949 .LVL45:
		1879	950 .L48:
		1880	166:Core/Src/main.c **** /* USER CODE END PFP */
		1881	951 .loc 1 166 1 view .LVU280
		1882	952 0028 1846 mov r0, r3
		1883	953 002a 10BD pop {r4, pc}
		1884	954 .LVL46:
		1885	955 .L50:
		1886	156:Core/Src/main.c ****
		1887	956 .loc 1 156 3 is_stmt 1 view .LVU281
		1888	156:Core/Src/main.c ****
		1889	957 .loc 1 156 15 is_stmt 0 view .LVU282
		1890	958 002c 04F14000 add r0, r4, #64
		1891	959 .LVL47:
		1892	156:Core/Src/main.c ****
		1893	960 .loc 1 156 15 view .LVU283
		1894	961 0030 FFF7FEFF bl bme280_cal_meas_delay
		1895	962 .LVL48:
		1896	156:Core/Src/main.c ****
		1897	963 .loc 1 156 13 view .LVU284
		1898	964 0034 034B ldr r3, .L51
		1899	965 0036 1860 str r0, [r3]
		1900	159:Core/Src/main.c **** if (rslt != BME280_OK)
		1901	966 .loc 1 159 3 is_stmt 1 view .LVU285
		1902	159:Core/Src/main.c **** if (rslt != BME280_OK)
		1903	967 .loc 1 159 10 is_stmt 0 view .LVU286
		1904	968 0038 2146 mov r1, r4
		1905	969 003a 0120 movs r0, #1
		1906	970 003c FFF7FEFF bl bme280_set_sensor_mode
		1907	971 .LVL49:
		1908	972 0040 0346 mov r3, r0
		1909	973 .LVL50:
		1910	160:Core/Src/main.c **** {
		1911	974 .loc 1 160 3 is_stmt 1 view .LVU287
		1912	975 0042 F1E7 b .L48
		1913	976 .L52:
		1914	977 .align 2
		1915	978 .L51:
		1916	979 0044 00000000 .word req_delay
		1917	980 .cfi_endproc
		1918	981 .LFE71:
		1919	983 .section .text.SystemClock_Config,"ax",%progbits
		1920	984 .align 1
		1921	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 33
16	mjames	1922
		1923
19	mjames	1924	985 .global SystemClock_Config
		1925	986 .syntax unified
		1926	987 .thumb
		1927	988 .thumb_func
		1928	989 .fpu softvfp
		1929	991 SystemClock_Config:
		1930	992 .LFB73:
		1931	285:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
		1932	993 .loc 1 285 1 view -0
		1933	994 .cfi_startproc
		1934	995 @ args = 0, pretend = 0, frame = 80
		1935	996 @ frame_needed = 0, uses_anonymous_args = 0
		1936	997 0000 30B5 push {r4, r5, lr}
		1937	998 .LCFI25:
		1938	999 .cfi_def_cfa_offset 12
		1939	1000 .cfi_offset 4, -12
		1940	1001 .cfi_offset 5, -8
		1941	1002 .cfi_offset 14, -4
		1942	1003 0002 95B0 sub sp, sp, #84
		1943	1004 .LCFI26:
		1944	1005 .cfi_def_cfa_offset 96
		1945	286:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
		1946	1006 .loc 1 286 3 view .LVU289
		1947	286:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
		1948	1007 .loc 1 286 22 is_stmt 0 view .LVU290
		1949	1008 0004 0024 movs r4, #0
		1950	1009 0006 0C94 str r4, [sp, #48]
		1951	1010 0008 0F94 str r4, [sp, #60]
		1952	1011 000a 1094 str r4, [sp, #64]
		1953	287:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
		1954	1012 .loc 1 287 3 is_stmt 1 view .LVU291
		1955	287:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
		1956	1013 .loc 1 287 22 is_stmt 0 view .LVU292
		1957	1014 000c 0594 str r4, [sp, #20]
		1958	1015 000e 0694 str r4, [sp, #24]
		1959	1016 0010 0794 str r4, [sp, #28]
		1960	1017 0012 0894 str r4, [sp, #32]
		1961	1018 0014 0994 str r4, [sp, #36]
		1962	288:Core/Src/main.c ****
		1963	1019 .loc 1 288 3 is_stmt 1 view .LVU293
		1964	288:Core/Src/main.c ****
		1965	1020 .loc 1 288 28 is_stmt 0 view .LVU294
		1966	1021 0016 0194 str r4, [sp, #4]
		1967	1022 0018 0294 str r4, [sp, #8]
		1968	1023 001a 0394 str r4, [sp, #12]
		1969	1024 001c 0494 str r4, [sp, #16]
		1970	293:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
		1971	1025 .loc 1 293 3 is_stmt 1 view .LVU295
		1972	293:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
		1973	1026 .loc 1 293 36 is_stmt 0 view .LVU296
		1974	1027 001e 0523 movs r3, #5
		1975	1028 0020 0A93 str r3, [sp, #40]
		1976	294:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
		1977	1029 .loc 1 294 3 is_stmt 1 view .LVU297
		1978	294:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
		1979	1030 .loc 1 294 30 is_stmt 0 view .LVU298
		1980	1031 0022 4FF48033 mov r3, #65536
		1981	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 34
16	mjames	1982
		1983
19	mjames	1984	1032 0026 0B93 str r3, [sp, #44]
		1985	295:Core/Src/main.c **** RCC_OscInitStruct.LSEState = RCC_LSE_ON;
		1986	1033 .loc 1 295 3 is_stmt 1 view .LVU299
		1987	296:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON;
		1988	1034 .loc 1 296 3 view .LVU300
		1989	296:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON;
		1990	1035 .loc 1 296 30 is_stmt 0 view .LVU301
		1991	1036 0028 0122 movs r2, #1
		1992	1037 002a 0D92 str r2, [sp, #52]
		1993	297:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
		1994	1038 .loc 1 297 3 is_stmt 1 view .LVU302
		1995	297:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
		1996	1039 .loc 1 297 30 is_stmt 0 view .LVU303
		1997	1040 002c 0E92 str r2, [sp, #56]
		1998	298:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
		1999	1041 .loc 1 298 3 is_stmt 1 view .LVU304
		2000	298:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
		2001	1042 .loc 1 298 34 is_stmt 0 view .LVU305
		2002	1043 002e 0225 movs r5, #2
		2003	1044 0030 1195 str r5, [sp, #68]
		2004	299:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
		2005	1045 .loc 1 299 3 is_stmt 1 view .LVU306
		2006	299:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
		2007	1046 .loc 1 299 35 is_stmt 0 view .LVU307
		2008	1047 0032 1293 str r3, [sp, #72]
		2009	300:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
		2010	1048 .loc 1 300 3 is_stmt 1 view .LVU308
		2011	300:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
		2012	1049 .loc 1 300 32 is_stmt 0 view .LVU309
		2013	1050 0034 4FF4E013 mov r3, #1835008
		2014	1051 0038 1393 str r3, [sp, #76]
		2015	301:Core/Src/main.c **** {
		2016	1052 .loc 1 301 3 is_stmt 1 view .LVU310
		2017	301:Core/Src/main.c **** {
		2018	1053 .loc 1 301 7 is_stmt 0 view .LVU311
		2019	1054 003a 0AA8 add r0, sp, #40
		2020	1055 003c FFF7FEFF bl HAL_RCC_OscConfig
		2021	1056 .LVL51:
		2022	307:Core/Src/main.c **** \|RCC_CLOCKTYPE_PCLK1\|RCC_CLOCKTYPE_PCLK2;
		2023	1057 .loc 1 307 3 is_stmt 1 view .LVU312
		2024	307:Core/Src/main.c **** \|RCC_CLOCKTYPE_PCLK1\|RCC_CLOCKTYPE_PCLK2;
		2025	1058 .loc 1 307 31 is_stmt 0 view .LVU313
		2026	1059 0040 0F23 movs r3, #15
		2027	1060 0042 0593 str r3, [sp, #20]
		2028	309:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
		2029	1061 .loc 1 309 3 is_stmt 1 view .LVU314
		2030	309:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
		2031	1062 .loc 1 309 34 is_stmt 0 view .LVU315
		2032	1063 0044 0695 str r5, [sp, #24]
		2033	310:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
		2034	1064 .loc 1 310 3 is_stmt 1 view .LVU316
		2035	310:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
		2036	1065 .loc 1 310 35 is_stmt 0 view .LVU317
		2037	1066 0046 0794 str r4, [sp, #28]
		2038	311:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
		2039	1067 .loc 1 311 3 is_stmt 1 view .LVU318
		2040	311:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
		2041	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 35
16	mjames	2042
		2043
19	mjames	2044	1068 .loc 1 311 36 is_stmt 0 view .LVU319
		2045	1069 0048 4FF48063 mov r3, #1024
		2046	1070 004c 0893 str r3, [sp, #32]
		2047	312:Core/Src/main.c ****
		2048	1071 .loc 1 312 3 is_stmt 1 view .LVU320
		2049	312:Core/Src/main.c ****
		2050	1072 .loc 1 312 36 is_stmt 0 view .LVU321
		2051	1073 004e 0994 str r4, [sp, #36]
		2052	314:Core/Src/main.c **** {
		2053	1074 .loc 1 314 3 is_stmt 1 view .LVU322
		2054	314:Core/Src/main.c **** {
		2055	1075 .loc 1 314 7 is_stmt 0 view .LVU323
		2056	1076 0050 2946 mov r1, r5
		2057	1077 0052 05A8 add r0, sp, #20
		2058	1078 0054 FFF7FEFF bl HAL_RCC_ClockConfig
		2059	1079 .LVL52:
		2060	318:Core/Src/main.c **** PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
		2061	1080 .loc 1 318 3 is_stmt 1 view .LVU324
		2062	318:Core/Src/main.c **** PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
		2063	1081 .loc 1 318 38 is_stmt 0 view .LVU325
		2064	1082 0058 1123 movs r3, #17
		2065	1083 005a 0193 str r3, [sp, #4]
		2066	319:Core/Src/main.c **** PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
		2067	1084 .loc 1 319 3 is_stmt 1 view .LVU326
		2068	319:Core/Src/main.c **** PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
		2069	1085 .loc 1 319 35 is_stmt 0 view .LVU327
		2070	1086 005c 4FF48073 mov r3, #256
		2071	1087 0060 0293 str r3, [sp, #8]
		2072	320:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
		2073	1088 .loc 1 320 3 is_stmt 1 view .LVU328
		2074	320:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
		2075	1089 .loc 1 320 35 is_stmt 0 view .LVU329
		2076	1090 0062 0494 str r4, [sp, #16]
		2077	321:Core/Src/main.c **** {
		2078	1091 .loc 1 321 3 is_stmt 1 view .LVU330
		2079	321:Core/Src/main.c **** {
		2080	1092 .loc 1 321 7 is_stmt 0 view .LVU331
		2081	1093 0064 01A8 add r0, sp, #4
		2082	1094 0066 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
		2083	1095 .LVL53:
		2084	325:Core/Src/main.c ****
		2085	1096 .loc 1 325 1 view .LVU332
		2086	1097 006a 15B0 add sp, sp, #84
		2087	1098 .LCFI27:
		2088	1099 .cfi_def_cfa_offset 12
		2089	1100 @ sp needed
		2090	1101 006c 30BD pop {r4, r5, pc}
		2091	1102 .cfi_endproc
		2092	1103 .LFE73:
		2093	1105 .section .text.main,"ax",%progbits
		2094	1106 .align 1
		2095	1107 .global main
		2096	1108 .syntax unified
		2097	1109 .thumb
		2098	1110 .thumb_func
		2099	1111 .fpu softvfp
		2100	1113 main:
		2101	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 36
		2102
		2103
		2104	1114 .LFB72:
		2105	179:Core/Src/main.c **** /* USER CODE BEGIN 1 */
		2106	1115 .loc 1 179 1 is_stmt 1 view -0
		2107	1116 .cfi_startproc
		2108	1117 @ args = 0, pretend = 0, frame = 80
		2109	1118 @ frame_needed = 0, uses_anonymous_args = 0
		2110	1119 0000 10B5 push {r4, lr}
		2111	1120 .LCFI28:
		2112	1121 .cfi_def_cfa_offset 8
		2113	1122 .cfi_offset 4, -8
		2114	1123 .cfi_offset 14, -4
		2115	1124 0002 94B0 sub sp, sp, #80
		2116	1125 .LCFI29:
		2117	1126 .cfi_def_cfa_offset 88
16	mjames	2118	188:Core/Src/main.c ****
19	mjames	2119	1127 .loc 1 188 3 view .LVU334
		2120	1128 0004 FFF7FEFF bl HAL_Init
		2121	1129 .LVL54:
		2122	195:Core/Src/main.c ****
		2123	1130 .loc 1 195 3 view .LVU335
		2124	1131 0008 FFF7FEFF bl SystemClock_Config
		2125	1132 .LVL55:
		2126	202:Core/Src/main.c **** MX_SPI1_Init();
		2127	1133 .loc 1 202 3 view .LVU336
		2128	1134 000c FFF7FEFF bl MX_GPIO_Init
		2129	1135 .LVL56:
		2130	203:Core/Src/main.c **** MX_TIM4_Init();
		2131	1136 .loc 1 203 3 view .LVU337
		2132	1137 0010 FFF7FEFF bl MX_SPI1_Init
		2133	1138 .LVL57:
		2134	204:Core/Src/main.c **** MX_USART1_UART_Init();
		2135	1139 .loc 1 204 3 view .LVU338
		2136	1140 0014 FFF7FEFF bl MX_TIM4_Init
		2137	1141 .LVL58:
		2138	205:Core/Src/main.c **** MX_TIM3_Init();
		2139	1142 .loc 1 205 3 view .LVU339
		2140	1143 0018 FFF7FEFF bl MX_USART1_UART_Init
		2141	1144 .LVL59:
		2142	206:Core/Src/main.c **** MX_I2C2_Init();
		2143	1145 .loc 1 206 3 view .LVU340
		2144	1146 001c FFF7FEFF bl MX_TIM3_Init
		2145	1147 .LVL60:
		2146	207:Core/Src/main.c **** MX_RTC_Init();
		2147	1148 .loc 1 207 3 view .LVU341
		2148	1149 0020 FFF7FEFF bl MX_I2C2_Init
		2149	1150 .LVL61:
		2150	208:Core/Src/main.c **** MX_USB_DEVICE_Init();
		2151	1151 .loc 1 208 3 view .LVU342
		2152	1152 0024 FFF7FEFF bl MX_RTC_Init
		2153	1153 .LVL62:
		2154	209:Core/Src/main.c **** /* USER CODE BEGIN 2 */
		2155	1154 .loc 1 209 3 view .LVU343
		2156	1155 0028 FFF7FEFF bl MX_USB_DEVICE_Init
		2157	1156 .LVL63:
		2158	212:Core/Src/main.c **** HAL_Delay (1000);
		2159	1157 .loc 1 212 3 view .LVU344
		2160	1158 002c 1D4C ldr r4, .L60
		2161	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 37
16	mjames	2162
		2163
19	mjames	2164	1159 002e 0022 movs r2, #0
		2165	1160 0030 1021 movs r1, #16
		2166	1161 0032 2046 mov r0, r4
		2167	1162 0034 FFF7FEFF bl HAL_GPIO_WritePin
		2168	1163 .LVL64:
		2169	213:Core/Src/main.c **** HAL_GPIO_WritePin ( USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_SET);
		2170	1164 .loc 1 213 3 view .LVU345
		2171	1165 0038 4FF47A70 mov r0, #1000
		2172	1166 003c FFF7FEFF bl HAL_Delay
		2173	1167 .LVL65:
		2174	214:Core/Src/main.c ****
		2175	1168 .loc 1 214 3 view .LVU346
		2176	1169 0040 0122 movs r2, #1
		2177	1170 0042 1021 movs r1, #16
		2178	1171 0044 2046 mov r0, r4
		2179	1172 0046 FFF7FEFF bl HAL_GPIO_WritePin
		2180	1173 .LVL66:
		2181	217:Core/Src/main.c ****
		2182	1174 .loc 1 217 3 view .LVU347
		2183	1175 004a 174C ldr r4, .L60+4
		2184	1176 004c 1749 ldr r1, .L60+8
		2185	1177 004e 2046 mov r0, r4
		2186	1178 0050 FFF7FEFF bl init_usart_ctl
		2187	1179 .LVL67:
		2188	219:Core/Src/main.c ****
		2189	1180 .loc 1 219 3 view .LVU348
		2190	1181 0054 2046 mov r0, r4
		2191	1182 0056 FFF7FEFF bl EnableSerialRxInterrupt
		2192	1183 .LVL68:
		2193	222:Core/Src/main.c ****
		2194	1184 .loc 1 222 3 view .LVU349
		2195	224:Core/Src/main.c ****
		2196	1185 .loc 1 224 3 view .LVU350
		2197	227:Core/Src/main.c ****
		2198	1186 .loc 1 227 3 view .LVU351
		2199	230:Core/Src/main.c ****
		2200	1187 .loc 1 230 3 view .LVU352
		2201	230:Core/Src/main.c ****
		2202	1188 .loc 1 230 15 is_stmt 0 view .LVU353
		2203	1189 005a 3B23 movs r3, #59
		2204	1190 005c 8DF80430 strb r3, [sp, #4]
		2205	232:Core/Src/main.c **** dev.read = user_i2c_read;
		2206	1191 .loc 1 232 3 is_stmt 1 view .LVU354
		2207	232:Core/Src/main.c **** dev.read = user_i2c_read;
		2208	1192 .loc 1 232 12 is_stmt 0 view .LVU355
		2209	1193 0060 0123 movs r3, #1
		2210	1194 0062 8DF81030 strb r3, [sp, #16]
		2211	233:Core/Src/main.c **** dev.write = user_i2c_write;
		2212	1195 .loc 1 233 3 is_stmt 1 view .LVU356
		2213	233:Core/Src/main.c **** dev.write = user_i2c_write;
		2214	1196 .loc 1 233 12 is_stmt 0 view .LVU357
		2215	1197 0066 124B ldr r3, .L60+12
		2216	1198 0068 0593 str r3, [sp, #20]
		2217	234:Core/Src/main.c **** dev.delay_us = user_delay_us;
		2218	1199 .loc 1 234 3 is_stmt 1 view .LVU358
		2219	234:Core/Src/main.c **** dev.delay_us = user_delay_us;
		2220	1200 .loc 1 234 13 is_stmt 0 view .LVU359
		2221	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 38
16	mjames	2222
		2223
19	mjames	2224	1201 006a 124B ldr r3, .L60+16
		2225	1202 006c 0693 str r3, [sp, #24]
		2226	235:Core/Src/main.c ****
		2227	1203 .loc 1 235 3 is_stmt 1 view .LVU360
		2228	235:Core/Src/main.c ****
		2229	1204 .loc 1 235 16 is_stmt 0 view .LVU361
		2230	1205 006e 124B ldr r3, .L60+20
		2231	1206 0070 0793 str r3, [sp, #28]
		2232	238:Core/Src/main.c ****
		2233	1207 .loc 1 238 3 is_stmt 1 view .LVU362
		2234	238:Core/Src/main.c ****
		2235	1208 .loc 1 238 16 is_stmt 0 view .LVU363
		2236	1209 0072 01AB add r3, sp, #4
		2237	1210 0074 0393 str r3, [sp, #12]
		2238	241:Core/Src/main.c **** if (rslt != BME280_OK)
		2239	1211 .loc 1 241 5 is_stmt 1 view .LVU364
		2240	241:Core/Src/main.c **** if (rslt != BME280_OK)
		2241	1212 .loc 1 241 12 is_stmt 0 view .LVU365
		2242	1213 0076 02A8 add r0, sp, #8
		2243	1214 0078 FFF7FEFF bl bme280_init
		2244	1215 .LVL69:
		2245	242:Core/Src/main.c **** {
		2246	1216 .loc 1 242 5 is_stmt 1 view .LVU366
		2247	242:Core/Src/main.c **** {
		2248	1217 .loc 1 242 8 is_stmt 0 view .LVU367
		2249	1218 007c 10B1 cbz r0, .L56
		2250	245:Core/Src/main.c **** }
		2251	1219 .loc 1 245 9 is_stmt 1 view .LVU368
		2252	1220 007e 0120 movs r0, #1
		2253	1221 .LVL70:
		2254	245:Core/Src/main.c **** }
		2255	1222 .loc 1 245 9 is_stmt 0 view .LVU369
		2256	1223 0080 FFF7FEFF bl exit
		2257	1224 .LVL71:
		2258	1225 .L56:
		2259	249:Core/Src/main.c **** if (rslt != BME280_OK)
		2260	1226 .loc 1 249 5 is_stmt 1 view .LVU370
		2261	249:Core/Src/main.c **** if (rslt != BME280_OK)
		2262	1227 .loc 1 249 12 is_stmt 0 view .LVU371
		2263	1228 0084 02A8 add r0, sp, #8
		2264	1229 .LVL72:
		2265	249:Core/Src/main.c **** if (rslt != BME280_OK)
		2266	1230 .loc 1 249 12 view .LVU372
		2267	1231 0086 FFF7FEFF bl stream_sensor_data_forced_mode
		2268	1232 .LVL73:
		2269	250:Core/Src/main.c **** {
		2270	1233 .loc 1 250 5 is_stmt 1 view .LVU373
		2271	250:Core/Src/main.c **** {
		2272	1234 .loc 1 250 8 is_stmt 0 view .LVU374
		2273	1235 008a 10B1 cbz r0, .L57
		2274	253:Core/Src/main.c **** }
		2275	1236 .loc 1 253 9 is_stmt 1 view .LVU375
		2276	1237 008c 0120 movs r0, #1
		2277	1238 .LVL74:
		2278	253:Core/Src/main.c **** }
		2279	1239 .loc 1 253 9 is_stmt 0 view .LVU376
		2280	1240 008e FFF7FEFF bl exit
		2281	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 39
16	mjames	2282
		2283
19	mjames	2284	1241 .LVL75:
		2285	1242 .L57:
		2286	260:Core/Src/main.c **** /* USER CODE END 2 */
		2287	1243 .loc 1 260 3 is_stmt 1 view .LVU377
		2288	1244 0092 FFF7FEFF bl cc_init
		2289	1245 .LVL76:
		2290	1246 .L58:
		2291	265:Core/Src/main.c **** {
		2292	1247 .loc 1 265 3 discriminator 1 view .LVU378
		2293	267:Core/Src/main.c ****
		2294	1248 .loc 1 267 7 discriminator 1 view .LVU379
		2295	1249 0096 02A8 add r0, sp, #8
		2296	1250 0098 FFF7FEFF bl cc_run
		2297	1251 .LVL77:
		2298	271:Core/Src/main.c ****
		2299	1252 .loc 1 271 7 discriminator 1 view .LVU380
		2300	1253 009c 3220 movs r0, #50
		2301	1254 009e FFF7FEFF bl HAL_Delay
		2302	1255 .LVL78:
		2303	1256 00a2 F8E7 b .L58
		2304	1257 .L61:
		2305	1258 .align 2
		2306	1259 .L60:
		2307	1260 00a4 000C0140 .word 1073810432
		2308	1261 00a8 00000000 .word uc1
		2309	1262 00ac 00000000 .word huart1
		2310	1263 00b0 00000000 .word user_i2c_read
		2311	1264 00b4 00000000 .word user_i2c_write
		2312	1265 00b8 00000000 .word user_delay_us
		2313	1266 .cfi_endproc
		2314	1267 .LFE72:
		2315	1269 .section .text.Error_Handler,"ax",%progbits
		2316	1270 .align 1
		2317	1271 .global Error_Handler
		2318	1272 .syntax unified
		2319	1273 .thumb
		2320	1274 .thumb_func
		2321	1275 .fpu softvfp
		2322	1277 Error_Handler:
		2323	1278 .LFB81:
		2324	626:Core/Src/main.c ****
		2325	627:Core/Src/main.c **** /* USER CODE BEGIN 4 */
		2326	628:Core/Src/main.c ****
		2327	629:Core/Src/main.c **** /* USER CODE END 4 */
		2328	630:Core/Src/main.c ****
		2329	631:Core/Src/main.c ** /
		2330	632:Core/Src/main.c **** * @brief This function is executed in case of error occurrence.
		2331	633:Core/Src/main.c **** * @retval None
		2332	634:Core/Src/main.c **** */
		2333	635:Core/Src/main.c **** void Error_Handler(void)
		2334	636:Core/Src/main.c **** {
		2335	1279 .loc 1 636 1 view -0
		2336	1280 .cfi_startproc
		2337	1281 @ args = 0, pretend = 0, frame = 0
		2338	1282 @ frame_needed = 0, uses_anonymous_args = 0
		2339	1283 @ link register save eliminated.
		2340	637:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */
		2341	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 40
16	mjames	2342
		2343
19	mjames	2344	638:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */
		2345	639:Core/Src/main.c ****
		2346	640:Core/Src/main.c **** /* USER CODE END Error_Handler_Debug */
		2347	641:Core/Src/main.c **** }
		2348	1284 .loc 1 641 1 view .LVU382
		2349	1285 0000 7047 bx lr
		2350	1286 .cfi_endproc
		2351	1287 .LFE81:
		2352	1289 .comm rslt,1,1
		2353	1290 .comm req_delay,4,4
		2354	1291 .comm id,2,4
		2355	1292 .comm dev,72,4
		2356	1293 .comm huart1,64,4
		2357	1294 .comm htim4,64,4
		2358	1295 .comm htim3,64,4
		2359	1296 .comm hspi1,88,4
		2360	1297 .comm hrtc,20,4
		2361	1298 .comm hi2c2,84,4
		2362	1299 .text
		2363	1300 .Letext0:
		2364	1301 .file 2 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.7
		2365	1302 .file 3 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.7
		2366	1303 .file 4 "Drivers/CMSIS/Include/core_cm3.h"
		2367	1304 .file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
		2368	1305 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h"
		2369	1306 .file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h"
		2370	1307 .file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h"
		2371	1308 .file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h"
		2372	1309 .file 10 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h"
		2373	1310 .file 11 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h"
		2374	1311 .file 12 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h"
		2375	1312 .file 13 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rtc.h"
		2376	1313 .file 14 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h"
		2377	1314 .file 15 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h"
		2378	1315 .file 16 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h"
		2379	1316 .file 17 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
		2380	1317 .file 18 "Core/Inc/main.h"
		2381	1318 .file 19 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
		2382	1319 .file 20 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
		2383	1320 .file 21 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
		2384	1321 .file 22 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
		2385	1322 .file 23 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
		2386	1323 .file 24 "../libSerial/inc/libSerial/serial.h"
		2387	1324 .file 25 "../libBME280/inc/libBME280/bme280_defs.h"
		2388	1325 .file 26 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h"
		2389	1326 .file 27 "USB_DEVICE/App/usb_device.h"
		2390	1327 .file 28 "../libBME280/inc/libBME280/bme280.h"
		2391	1328 .file 29 "inc/display.h"
		2392	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 41
		2393
		2394
16	mjames	2395	DEFINED SYMBOLS
		2396	ABS:0000000000000000 main.c
19	mjames	2397	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:16 .text.user_delay_us:0000000000000000 $t
		2398	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:23 .text.user_delay_us:0000000000000000 user_delay_us
		2399	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:54 .text.user_delay_us:0000000000000014 $d
		2400	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:59 .text.user_i2c_write:0000000000000000 $t
		2401	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:65 .text.user_i2c_write:0000000000000000 user_i2c_write
		2402	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:131 .text.user_i2c_write:0000000000000030 $d
16	mjames	2403	COM:0000000000000054 hi2c2
19	mjames	2404	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:136 .text.user_i2c_read:0000000000000000 $t
		2405	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:142 .text.user_i2c_read:0000000000000000 user_i2c_read
		2406	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:208 .text.user_i2c_read:0000000000000030 $d
		2407	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:213 .text.MX_GPIO_Init:0000000000000000 $t
		2408	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:219 .text.MX_GPIO_Init:0000000000000000 MX_GPIO_Init
		2409	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:362 .text.MX_GPIO_Init:00000000000000a4 $d
		2410	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:369 .text.MX_SPI1_Init:0000000000000000 $t
		2411	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:375 .text.MX_SPI1_Init:0000000000000000 MX_SPI1_Init
		2412	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:441 .text.MX_SPI1_Init:000000000000003c $d
16	mjames	2413	COM:0000000000000058 hspi1
19	mjames	2414	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:447 .text.MX_TIM4_Init:0000000000000000 $t
		2415	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:453 .text.MX_TIM4_Init:0000000000000000 MX_TIM4_Init
		2416	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:549 .text.MX_TIM4_Init:0000000000000050 $d
16	mjames	2417	COM:0000000000000040 htim4
19	mjames	2418	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:555 .text.MX_USART1_UART_Init:0000000000000000 $t
		2419	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:561 .text.MX_USART1_UART_Init:0000000000000000 MX_USART1_UART_Init
		2420	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:610 .text.MX_USART1_UART_Init:0000000000000024 $d
16	mjames	2421	COM:0000000000000040 huart1
19	mjames	2422	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:616 .text.MX_TIM3_Init:0000000000000000 $t
		2423	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:622 .text.MX_TIM3_Init:0000000000000000 MX_TIM3_Init
		2424	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:726 .text.MX_TIM3_Init:0000000000000068 $d
16	mjames	2425	COM:0000000000000040 htim3
19	mjames	2426	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:732 .text.MX_I2C2_Init:0000000000000000 $t
		2427	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:738 .text.MX_I2C2_Init:0000000000000000 MX_I2C2_Init
		2428	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:790 .text.MX_I2C2_Init:0000000000000028 $d
		2429	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:797 .text.MX_RTC_Init:0000000000000000 $t
		2430	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:803 .text.MX_RTC_Init:0000000000000000 MX_RTC_Init
		2431	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:888 .text.MX_RTC_Init:000000000000005c $d
16	mjames	2432	COM:0000000000000014 hrtc
19	mjames	2433	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:894 .text.stream_sensor_data_forced_mode:0000000000000000 $t
		2434	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:901 .text.stream_sensor_data_forced_mode:0000000000000000 stream_sensor_data_forced_mode
		2435	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:979 .text.stream_sensor_data_forced_mode:0000000000000044 $d
		2436	COM:0000000000000004 req_delay
		2437	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:984 .text.SystemClock_Config:0000000000000000 $t
		2438	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:991 .text.SystemClock_Config:0000000000000000 SystemClock_Config
		2439	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:1106 .text.main:0000000000000000 $t
		2440	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:1113 .text.main:0000000000000000 main
		2441	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:1260 .text.main:00000000000000a4 $d
		2442	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:1270 .text.Error_Handler:0000000000000000 $t
		2443	C:\Users\mike\AppData\Local\Temp\cchHSijx.s:1277 .text.Error_Handler:0000000000000000 Error_Handler
16	mjames	2444	COM:0000000000000001 rslt
19	mjames	2445	COM:0000000000000002 id
		2446	COM:0000000000000048 dev
16	mjames	2447
		2448	UNDEFINED SYMBOLS
		2449	HAL_Delay
		2450	HAL_I2C_Mem_Write
		2451	HAL_I2C_Mem_Read
19	mjames	2452	ARM GAS C:\Users\mike\AppData\Local\Temp\cchHSijx.s page 42
		2453
		2454
16	mjames	2455	HAL_GPIO_WritePin
		2456	HAL_GPIO_Init
		2457	HAL_SPI_Init
		2458	HAL_TIM_Encoder_Init
		2459	HAL_TIMEx_MasterConfigSynchronization
		2460	HAL_UART_Init
		2461	HAL_TIM_OC_Init
		2462	HAL_TIM_OnePulse_Init
		2463	HAL_TIM_OC_ConfigChannel
		2464	HAL_I2C_Init
		2465	HAL_RTC_Init
		2466	HAL_RTC_SetTime
		2467	HAL_RTC_SetDate
19	mjames	2468	bme280_set_sensor_settings
		2469	bme280_cal_meas_delay
		2470	bme280_set_sensor_mode
16	mjames	2471	HAL_RCC_OscConfig
		2472	HAL_RCC_ClockConfig
		2473	HAL_RCCEx_PeriphCLKConfig
		2474	HAL_Init
		2475	MX_USB_DEVICE_Init
		2476	init_usart_ctl
		2477	EnableSerialRxInterrupt
19	mjames	2478	bme280_init
		2479	exit
16	mjames	2480	cc_init
		2481	cc_run
		2482	uc1

Subversion Repositories dashGPS

(root)/branches/dashGPS-bmp/build/main.lst – Rev 19