WebSVN – dashGPS – Blame – /branches/dashGPS-bmp/build/main.lst

Rev	Author	Line No.	Line
16	mjames	1	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 1
		2
		3
		4	1 .cpu cortex-m3
		5	2 .eabi_attribute 20, 1
		6	3 .eabi_attribute 21, 1
		7	4 .eabi_attribute 23, 3
		8	5 .eabi_attribute 24, 1
		9	6 .eabi_attribute 25, 1
		10	7 .eabi_attribute 26, 1
		11	8 .eabi_attribute 30, 1
		12	9 .eabi_attribute 34, 1
		13	10 .eabi_attribute 18, 4
		14	11 .file "main.c"
		15	12 .text
		16	13 .Ltext0:
		17	14 .cfi_sections .debug_frame
		18	15 .section .text.user_delay_ms,"ax",%progbits
		19	16 .align 1
		20	17 .arch armv7-m
		21	18 .syntax unified
		22	19 .thumb
		23	20 .thumb_func
		24	21 .fpu softvfp
		25	23 user_delay_ms:
		26	24 .LVL0:
		27	25 .LFB70:
		28	26 .file 1 "Core/Src/main.c"
		29	1:Core/Src/main.c **** /* USER CODE BEGIN Header */
		30	2:Core/Src/main.c ** /
		31	3:Core/Src/main.c ** ****************************************************************************
		32	4:Core/Src/main.c **** * @file : main.c
		33	5:Core/Src/main.c **** * @brief : Main program body
		34	6:Core/Src/main.c ** ****************************************************************************
		35	7:Core/Src/main.c **** * @attention
		36	8:Core/Src/main.c **** *
		37	9:Core/Src/main.c **** * <h2><center>© Copyright (c) 2020 STMicroelectronics.
		38	10:Core/Src/main.c **** * All rights reserved.</center></h2>
		39	11:Core/Src/main.c **** *
		40	12:Core/Src/main.c **** * This software component is licensed by ST under BSD 3-Clause license,
		41	13:Core/Src/main.c **** * the "License"; You may not use this file except in compliance with the
		42	14:Core/Src/main.c **** * License. You may obtain a copy of the License at:
		43	15:Core/Src/main.c **** * opensource.org/licenses/BSD-3-Clause
		44	16:Core/Src/main.c **** *
		45	17:Core/Src/main.c ** ****************************************************************************
		46	18:Core/Src/main.c **** */
		47	19:Core/Src/main.c **** /* USER CODE END Header */
		48	20:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/
		49	21:Core/Src/main.c **** #include "main.h"
		50	22:Core/Src/main.c **** #include "usb_device.h"
		51	23:Core/Src/main.c ****
		52	24:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/
		53	25:Core/Src/main.c **** /* USER CODE BEGIN Includes */
		54	26:Core/Src/main.c **** #include "libSerial/serial.h"
		55	27:Core/Src/main.c **** #include "libBMP280/bmp280.h"
		56	28:Core/Src/main.c **** #include "display.h"
		57	29:Core/Src/main.c **** /* USER CODE END Includes */
		58	30:Core/Src/main.c ****
		59	31:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/
		60	32:Core/Src/main.c **** /* USER CODE BEGIN PTD */
		61	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 2
		62
		63
		64	33:Core/Src/main.c ****
		65	34:Core/Src/main.c **** /* USER CODE END PTD */
		66	35:Core/Src/main.c ****
		67	36:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/
		68	37:Core/Src/main.c **** /* USER CODE BEGIN PD */
		69	38:Core/Src/main.c **** /* USER CODE END PD */
		70	39:Core/Src/main.c ****
		71	40:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/
		72	41:Core/Src/main.c **** /* USER CODE BEGIN PM */
		73	42:Core/Src/main.c ****
		74	43:Core/Src/main.c **** /* USER CODE END PM */
		75	44:Core/Src/main.c ****
		76	45:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/
		77	46:Core/Src/main.c **** I2C_HandleTypeDef hi2c2;
		78	47:Core/Src/main.c ****
		79	48:Core/Src/main.c **** RTC_HandleTypeDef hrtc;
		80	49:Core/Src/main.c ****
		81	50:Core/Src/main.c **** SPI_HandleTypeDef hspi1;
		82	51:Core/Src/main.c ****
		83	52:Core/Src/main.c **** TIM_HandleTypeDef htim3;
		84	53:Core/Src/main.c **** TIM_HandleTypeDef htim4;
		85	54:Core/Src/main.c ****
		86	55:Core/Src/main.c **** UART_HandleTypeDef huart1;
		87	56:Core/Src/main.c ****
		88	57:Core/Src/main.c **** /* USER CODE BEGIN PV */
		89	58:Core/Src/main.c **** typedef struct
		90	59:Core/Src/main.c **** {
		91	60:Core/Src/main.c **** uint8_t dev_addr;
		92	61:Core/Src/main.c **** } interface_t;
		93	62:Core/Src/main.c ****
		94	63:Core/Src/main.c **** static int8_t
		95	64:Core/Src/main.c **** user_i2c_write (uint8_t i2c_addr, uint8_t reg_addr, uint8_t *reg_data, uint32_t len)
		96	65:Core/Src/main.c **** {
		97	66:Core/Src/main.c **** HAL_StatusTypeDef st = HAL_I2C_Mem_Write(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000
		98	67:Core/Src/main.c ****
		99	68:Core/Src/main.c **** return st != HAL_OK ? BMP280_E_COMM_FAIL: BMP280_OK;
		100	69:Core/Src/main.c ****
		101	70:Core/Src/main.c **** }
		102	71:Core/Src/main.c **** static int8_t
		103	72:Core/Src/main.c **** user_i2c_read (uint8_t i2c_addr, uint8_t reg_addr, uint8_t *reg_data, uint32_t len)
		104	73:Core/Src/main.c **** {
		105	74:Core/Src/main.c **** HAL_StatusTypeDef st = HAL_I2C_Mem_Read(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000);
		106	75:Core/Src/main.c ****
		107	76:Core/Src/main.c **** return st != HAL_OK ? BMP280_E_COMM_FAIL: BMP280_OK;
		108	77:Core/Src/main.c ****
		109	78:Core/Src/main.c **** }
		110	79:Core/Src/main.c ****
		111	80:Core/Src/main.c **** static void
		112	81:Core/Src/main.c **** user_delay_ms (uint32_t ms, void *handle)
		113	82:Core/Src/main.c **** {
		114	27 .loc 1 82 1 view -0
		115	28 .cfi_startproc
		116	29 @ args = 0, pretend = 0, frame = 0
		117	30 @ frame_needed = 0, uses_anonymous_args = 0
		118	31 .loc 1 82 1 is_stmt 0 view .LVU1
		119	32 0000 08B5 push {r3, lr}
		120	33 .LCFI0:
		121	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 3
		122
		123
		124	34 .cfi_def_cfa_offset 8
		125	35 .cfi_offset 3, -8
		126	36 .cfi_offset 14, -4
		127	83:Core/Src/main.c **** HAL_Delay (ms);
		128	37 .loc 1 83 3 is_stmt 1 view .LVU2
		129	38 0002 FFF7FEFF bl HAL_Delay
		130	39 .LVL1:
		131	84:Core/Src/main.c ****
		132	85:Core/Src/main.c **** }
		133	40 .loc 1 85 1 is_stmt 0 view .LVU3
		134	41 0006 08BD pop {r3, pc}
		135	42 .cfi_endproc
		136	43 .LFE70:
		137	45 .section .text.user_i2c_write,"ax",%progbits
		138	46 .align 1
		139	47 .syntax unified
		140	48 .thumb
		141	49 .thumb_func
		142	50 .fpu softvfp
		143	52 user_i2c_write:
		144	53 .LVL2:
		145	54 .LFB68:
		146	65:Core/Src/main.c **** HAL_StatusTypeDef st = HAL_I2C_Mem_Write(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000
		147	55 .loc 1 65 1 is_stmt 1 view -0
		148	56 .cfi_startproc
		149	57 @ args = 0, pretend = 0, frame = 0
		150	58 @ frame_needed = 0, uses_anonymous_args = 0
		151	65:Core/Src/main.c **** HAL_StatusTypeDef st = HAL_I2C_Mem_Write(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000
		152	59 .loc 1 65 1 is_stmt 0 view .LVU5
		153	60 0000 10B5 push {r4, lr}
		154	61 .LCFI1:
		155	62 .cfi_def_cfa_offset 8
		156	63 .cfi_offset 4, -8
		157	64 .cfi_offset 14, -4
		158	65 0002 84B0 sub sp, sp, #16
		159	66 .LCFI2:
		160	67 .cfi_def_cfa_offset 24
		161	66:Core/Src/main.c ****
		162	68 .loc 1 66 5 is_stmt 1 view .LVU6
		163	66:Core/Src/main.c ****
		164	69 .loc 1 66 28 is_stmt 0 view .LVU7
		165	70 0004 42F21074 movw r4, #10000
		166	71 0008 0294 str r4, [sp, #8]
		167	72 000a 9BB2 uxth r3, r3
		168	73 .LVL3:
		169	66:Core/Src/main.c ****
		170	74 .loc 1 66 28 view .LVU8
		171	75 000c 0193 str r3, [sp, #4]
		172	76 000e 0092 str r2, [sp]
		173	77 0010 0123 movs r3, #1
		174	78 0012 0A46 mov r2, r1
		175	79 .LVL4:
		176	66:Core/Src/main.c ****
		177	80 .loc 1 66 28 view .LVU9
		178	81 0014 00FA03F1 lsl r1, r0, r3
		179	82 .LVL5:
		180	66:Core/Src/main.c ****
		181	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 4
		182
		183
		184	83 .loc 1 66 28 view .LVU10
		185	84 0018 0448 ldr r0, .L8
		186	85 .LVL6:
		187	66:Core/Src/main.c ****
		188	86 .loc 1 66 28 view .LVU11
		189	87 001a FFF7FEFF bl HAL_I2C_Mem_Write
		190	88 .LVL7:
		191	68:Core/Src/main.c ****
		192	89 .loc 1 68 3 is_stmt 1 view .LVU12
		193	68:Core/Src/main.c ****
		194	90 .loc 1 68 44 is_stmt 0 view .LVU13
		195	91 001e 10B9 cbnz r0, .L7
		196	92 0020 0020 movs r0, #0
		197	93 .LVL8:
		198	94 .L4:
		199	70:Core/Src/main.c **** static int8_t
		200	95 .loc 1 70 1 discriminator 4 view .LVU14
		201	96 0022 04B0 add sp, sp, #16
		202	97 .LCFI3:
		203	98 .cfi_remember_state
		204	99 .cfi_def_cfa_offset 8
		205	100 @ sp needed
		206	101 0024 10BD pop {r4, pc}
		207	102 .LVL9:
		208	103 .L7:
		209	104 .LCFI4:
		210	105 .cfi_restore_state
		211	68:Core/Src/main.c ****
		212	106 .loc 1 68 44 view .LVU15
		213	107 0026 6FF00300 mvn r0, #3
		214	108 .LVL10:
		215	68:Core/Src/main.c ****
		216	109 .loc 1 68 44 view .LVU16
		217	110 002a FAE7 b .L4
		218	111 .L9:
		219	112 .align 2
		220	113 .L8:
		221	114 002c 00000000 .word hi2c2
		222	115 .cfi_endproc
		223	116 .LFE68:
		224	118 .section .text.user_i2c_read,"ax",%progbits
		225	119 .align 1
		226	120 .syntax unified
		227	121 .thumb
		228	122 .thumb_func
		229	123 .fpu softvfp
		230	125 user_i2c_read:
		231	126 .LVL11:
		232	127 .LFB69:
		233	73:Core/Src/main.c **** HAL_StatusTypeDef st = HAL_I2C_Mem_Read(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000);
		234	128 .loc 1 73 1 is_stmt 1 view -0
		235	129 .cfi_startproc
		236	130 @ args = 0, pretend = 0, frame = 0
		237	131 @ frame_needed = 0, uses_anonymous_args = 0
		238	73:Core/Src/main.c **** HAL_StatusTypeDef st = HAL_I2C_Mem_Read(&hi2c2, i2c_addr<<1, reg_addr, 1, reg_data, len, 10000);
		239	132 .loc 1 73 1 is_stmt 0 view .LVU18
		240	133 0000 10B5 push {r4, lr}
		241	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 5
		242
		243
		244	134 .LCFI5:
		245	135 .cfi_def_cfa_offset 8
		246	136 .cfi_offset 4, -8
		247	137 .cfi_offset 14, -4
		248	138 0002 84B0 sub sp, sp, #16
		249	139 .LCFI6:
		250	140 .cfi_def_cfa_offset 24
		251	74:Core/Src/main.c ****
		252	141 .loc 1 74 3 is_stmt 1 view .LVU19
		253	74:Core/Src/main.c ****
		254	142 .loc 1 74 26 is_stmt 0 view .LVU20
		255	143 0004 42F21074 movw r4, #10000
		256	144 0008 0294 str r4, [sp, #8]
		257	145 000a 9BB2 uxth r3, r3
		258	146 .LVL12:
		259	74:Core/Src/main.c ****
		260	147 .loc 1 74 26 view .LVU21
		261	148 000c 0193 str r3, [sp, #4]
		262	149 000e 0092 str r2, [sp]
		263	150 0010 0123 movs r3, #1
		264	151 0012 0A46 mov r2, r1
		265	152 .LVL13:
		266	74:Core/Src/main.c ****
		267	153 .loc 1 74 26 view .LVU22
		268	154 0014 00FA03F1 lsl r1, r0, r3
		269	155 .LVL14:
		270	74:Core/Src/main.c ****
		271	156 .loc 1 74 26 view .LVU23
		272	157 0018 0448 ldr r0, .L15
		273	158 .LVL15:
		274	74:Core/Src/main.c ****
		275	159 .loc 1 74 26 view .LVU24
		276	160 001a FFF7FEFF bl HAL_I2C_Mem_Read
		277	161 .LVL16:
		278	76:Core/Src/main.c ****
		279	162 .loc 1 76 3 is_stmt 1 view .LVU25
		280	76:Core/Src/main.c ****
		281	163 .loc 1 76 44 is_stmt 0 view .LVU26
		282	164 001e 10B9 cbnz r0, .L14
		283	165 0020 0020 movs r0, #0
		284	166 .LVL17:
		285	167 .L11:
		286	78:Core/Src/main.c ****
		287	168 .loc 1 78 1 discriminator 4 view .LVU27
		288	169 0022 04B0 add sp, sp, #16
		289	170 .LCFI7:
		290	171 .cfi_remember_state
		291	172 .cfi_def_cfa_offset 8
		292	173 @ sp needed
		293	174 0024 10BD pop {r4, pc}
		294	175 .LVL18:
		295	176 .L14:
		296	177 .LCFI8:
		297	178 .cfi_restore_state
		298	76:Core/Src/main.c ****
		299	179 .loc 1 76 44 view .LVU28
		300	180 0026 6FF00300 mvn r0, #3
		301	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 6
		302
		303
		304	181 .LVL19:
		305	76:Core/Src/main.c ****
		306	182 .loc 1 76 44 view .LVU29
		307	183 002a FAE7 b .L11
		308	184 .L16:
		309	185 .align 2
		310	186 .L15:
		311	187 002c 00000000 .word hi2c2
		312	188 .cfi_endproc
		313	189 .LFE69:
		314	191 .section .text.MX_GPIO_Init,"ax",%progbits
		315	192 .align 1
		316	193 .syntax unified
		317	194 .thumb
		318	195 .thumb_func
		319	196 .fpu softvfp
		320	198 MX_GPIO_Init:
		321	199 .LFB79:
		322	86:Core/Src/main.c ****
		323	87:Core/Src/main.c ****
		324	88:Core/Src/main.c ****
		325	89:Core/Src/main.c ****
		326	90:Core/Src/main.c **** struct bmp280_dev bmp =
		327	91:Core/Src/main.c **** {
		328	92:Core/Src/main.c ****
		329	93:Core/Src/main.c **** .intf = BMP280_I2C_INTF, .read = user_i2c_read, .write = user_i2c_write,
		330	94:Core/Src/main.c **** .delay_ms = user_delay_ms,
		331	95:Core/Src/main.c ****
		332	96:Core/Src/main.c **** /* Update interface pointer with the structure that contains both device address and file des
		333	97:Core/Src/main.c **** .dev_id = BMP280_I2C_ADDR_PRIM };
		334	98:Core/Src/main.c ****
		335	99:Core/Src/main.c **** int8_t rslt;
		336	100:Core/Src/main.c **** struct bmp280_config conf;
		337	101:Core/Src/main.c ****
		338	102:Core/Src/main.c ****
		339	103:Core/Src/main.c **** /* USER CODE END PV */
		340	104:Core/Src/main.c ****
		341	105:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/
		342	106:Core/Src/main.c **** void SystemClock_Config(void);
		343	107:Core/Src/main.c **** static void MX_GPIO_Init(void);
		344	108:Core/Src/main.c **** static void MX_SPI1_Init(void);
		345	109:Core/Src/main.c **** static void MX_TIM4_Init(void);
		346	110:Core/Src/main.c **** static void MX_USART1_UART_Init(void);
		347	111:Core/Src/main.c **** static void MX_TIM3_Init(void);
		348	112:Core/Src/main.c **** static void MX_I2C2_Init(void);
		349	113:Core/Src/main.c **** static void MX_RTC_Init(void);
		350	114:Core/Src/main.c **** /* USER CODE BEGIN PFP */
		351	115:Core/Src/main.c ****
		352	116:Core/Src/main.c **** /* USER CODE END PFP */
		353	117:Core/Src/main.c ****
		354	118:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/
		355	119:Core/Src/main.c **** /* USER CODE BEGIN 0 */
		356	120:Core/Src/main.c ****
		357	121:Core/Src/main.c **** /* USER CODE END 0 */
		358	122:Core/Src/main.c ****
		359	123:Core/Src/main.c ** /
		360	124:Core/Src/main.c **** * @brief The application entry point.
		361	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 7
		362
		363
		364	125:Core/Src/main.c **** * @retval int
		365	126:Core/Src/main.c **** */
		366	127:Core/Src/main.c **** int main(void)
		367	128:Core/Src/main.c **** {
		368	129:Core/Src/main.c **** /* USER CODE BEGIN 1 */
		369	130:Core/Src/main.c ****
		370	131:Core/Src/main.c **** /* USER CODE END 1 */
		371	132:Core/Src/main.c ****
		372	133:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/
		373	134:Core/Src/main.c ****
		374	135:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
		375	136:Core/Src/main.c **** HAL_Init();
		376	137:Core/Src/main.c ****
		377	138:Core/Src/main.c **** /* USER CODE BEGIN Init */
		378	139:Core/Src/main.c ****
		379	140:Core/Src/main.c **** /* USER CODE END Init */
		380	141:Core/Src/main.c ****
		381	142:Core/Src/main.c **** /* Configure the system clock */
		382	143:Core/Src/main.c **** SystemClock_Config();
		383	144:Core/Src/main.c ****
		384	145:Core/Src/main.c **** /* USER CODE BEGIN SysInit */
		385	146:Core/Src/main.c ****
		386	147:Core/Src/main.c **** /* USER CODE END SysInit */
		387	148:Core/Src/main.c ****
		388	149:Core/Src/main.c **** /* Initialize all configured peripherals */
		389	150:Core/Src/main.c **** MX_GPIO_Init();
		390	151:Core/Src/main.c **** MX_SPI1_Init();
		391	152:Core/Src/main.c **** MX_TIM4_Init();
		392	153:Core/Src/main.c **** MX_USART1_UART_Init();
		393	154:Core/Src/main.c **** MX_TIM3_Init();
		394	155:Core/Src/main.c **** MX_I2C2_Init();
		395	156:Core/Src/main.c **** MX_RTC_Init();
		396	157:Core/Src/main.c **** MX_USB_DEVICE_Init();
		397	158:Core/Src/main.c **** /* USER CODE BEGIN 2 */
		398	159:Core/Src/main.c ****
		399	160:Core/Src/main.c **** HAL_GPIO_WritePin ( USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_RESET);
		400	161:Core/Src/main.c **** HAL_Delay (1000);
		401	162:Core/Src/main.c **** HAL_GPIO_WritePin ( USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_SET);
		402	163:Core/Src/main.c ****
		403	164:Core/Src/main.c **** /* setup the USART control blocks */
		404	165:Core/Src/main.c **** init_usart_ctl (&uc1, &huart1);
		405	166:Core/Src/main.c ****
		406	167:Core/Src/main.c **** EnableSerialRxInterrupt (&uc1);
		407	168:Core/Src/main.c ****
		408	169:Core/Src/main.c ****
		409	170:Core/Src/main.c **** /* Initialize the bmp280 */
		410	171:Core/Src/main.c **** rslt = bmp280_init(&bmp);
		411	172:Core/Src/main.c **** // print_rslt(" bmp280_init status", rslt);
		412	173:Core/Src/main.c ****
		413	174:Core/Src/main.c **** /* Always read the current settings before writing, especially when
		414	175:Core/Src/main.c **** * all the configuration is not modified
		415	176:Core/Src/main.c **** */
		416	177:Core/Src/main.c **** rslt = bmp280_get_config(&conf, &bmp);
		417	178:Core/Src/main.c **** // print_rslt(" bmp280_get_config status", rslt);
		418	179:Core/Src/main.c ****
		419	180:Core/Src/main.c **** /* configuring the temperature oversampling, filter coefficient and output data rate */
		420	181:Core/Src/main.c **** /* Overwrite the desired settings */
		421	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 8
		422
		423
		424	182:Core/Src/main.c **** conf.filter = BMP280_FILTER_COEFF_2;
		425	183:Core/Src/main.c ****
		426	184:Core/Src/main.c **** /* Temperature oversampling set at 4x */
		427	185:Core/Src/main.c **** conf.os_temp = BMP280_OS_4X;
		428	186:Core/Src/main.c ****
		429	187:Core/Src/main.c **** /* Pressure over sampling none (disabling pressure measurement) */
		430	188:Core/Src/main.c **** conf.os_pres = BMP280_OS_4X;
		431	189:Core/Src/main.c ****
		432	190:Core/Src/main.c **** /* Setting the output data rate as 2HZ(500ms) */
		433	191:Core/Src/main.c **** conf.odr = BMP280_ODR_500_MS;
		434	192:Core/Src/main.c **** rslt = bmp280_set_config(&conf, &bmp);
		435	193:Core/Src/main.c **** //print_rslt(" bmp280_set_config status", rslt);
		436	194:Core/Src/main.c ****
		437	195:Core/Src/main.c **** /* Always set the power mode after setting the configuration */
		438	196:Core/Src/main.c **** rslt = bmp280_set_power_mode(BMP280_NORMAL_MODE, &bmp);
		439	197:Core/Src/main.c **** //print_rslt(" bmp280_set_power_mode status", rslt);
		440	198:Core/Src/main.c ****
		441	199:Core/Src/main.c ****
		442	200:Core/Src/main.c ****
		443	201:Core/Src/main.c **** cc_init ();
		444	202:Core/Src/main.c **** /* USER CODE END 2 */
		445	203:Core/Src/main.c ****
		446	204:Core/Src/main.c **** /* Infinite loop */
		447	205:Core/Src/main.c **** /* USER CODE BEGIN WHILE */
		448	206:Core/Src/main.c **** while (1)
		449	207:Core/Src/main.c **** {
		450	208:Core/Src/main.c **** cc_run (&bmp);
		451	209:Core/Src/main.c ****
		452	210:Core/Src/main.c ****
		453	211:Core/Src/main.c ****
		454	212:Core/Src/main.c **** HAL_Delay (50);
		455	213:Core/Src/main.c ****
		456	214:Core/Src/main.c **** /* USER CODE END WHILE */
		457	215:Core/Src/main.c ****
		458	216:Core/Src/main.c **** /* USER CODE BEGIN 3 */
		459	217:Core/Src/main.c **** }
		460	218:Core/Src/main.c **** /* USER CODE END 3 */
		461	219:Core/Src/main.c **** }
		462	220:Core/Src/main.c ****
		463	221:Core/Src/main.c ** /
		464	222:Core/Src/main.c **** * @brief System Clock Configuration
		465	223:Core/Src/main.c **** * @retval None
		466	224:Core/Src/main.c **** */
		467	225:Core/Src/main.c **** void SystemClock_Config(void)
		468	226:Core/Src/main.c **** {
		469	227:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
		470	228:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
		471	229:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
		472	230:Core/Src/main.c ****
		473	231:Core/Src/main.c ** / Initializes the RCC Oscillators according to the specified parameters
		474	232:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure.
		475	233:Core/Src/main.c **** */
		476	234:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE\|RCC_OSCILLATORTYPE_LSE;
		477	235:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
		478	236:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
		479	237:Core/Src/main.c **** RCC_OscInitStruct.LSEState = RCC_LSE_ON;
		480	238:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON;
		481	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 9
		482
		483
		484	239:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
		485	240:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
		486	241:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
		487	242:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
		488	243:Core/Src/main.c **** {
		489	244:Core/Src/main.c **** Error_Handler();
		490	245:Core/Src/main.c **** }
		491	246:Core/Src/main.c ** / Initializes the CPU, AHB and APB buses clocks
		492	247:Core/Src/main.c **** */
		493	248:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK\|RCC_CLOCKTYPE_SYSCLK
		494	249:Core/Src/main.c **** \|RCC_CLOCKTYPE_PCLK1\|RCC_CLOCKTYPE_PCLK2;
		495	250:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
		496	251:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
		497	252:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
		498	253:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
		499	254:Core/Src/main.c ****
		500	255:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
		501	256:Core/Src/main.c **** {
		502	257:Core/Src/main.c **** Error_Handler();
		503	258:Core/Src/main.c **** }
		504	259:Core/Src/main.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC\|RCC_PERIPHCLK_USB;
		505	260:Core/Src/main.c **** PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
		506	261:Core/Src/main.c **** PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
		507	262:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
		508	263:Core/Src/main.c **** {
		509	264:Core/Src/main.c **** Error_Handler();
		510	265:Core/Src/main.c **** }
		511	266:Core/Src/main.c **** }
		512	267:Core/Src/main.c ****
		513	268:Core/Src/main.c ** /
		514	269:Core/Src/main.c **** * @brief I2C2 Initialization Function
		515	270:Core/Src/main.c **** * @param None
		516	271:Core/Src/main.c **** * @retval None
		517	272:Core/Src/main.c **** */
		518	273:Core/Src/main.c **** static void MX_I2C2_Init(void)
		519	274:Core/Src/main.c **** {
		520	275:Core/Src/main.c ****
		521	276:Core/Src/main.c **** /* USER CODE BEGIN I2C2_Init 0 */
		522	277:Core/Src/main.c ****
		523	278:Core/Src/main.c **** /* USER CODE END I2C2_Init 0 */
		524	279:Core/Src/main.c ****
		525	280:Core/Src/main.c **** /* USER CODE BEGIN I2C2_Init 1 */
		526	281:Core/Src/main.c ****
		527	282:Core/Src/main.c **** /* USER CODE END I2C2_Init 1 */
		528	283:Core/Src/main.c **** hi2c2.Instance = I2C2;
		529	284:Core/Src/main.c **** hi2c2.Init.ClockSpeed = 100000;
		530	285:Core/Src/main.c **** hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
		531	286:Core/Src/main.c **** hi2c2.Init.OwnAddress1 = 0;
		532	287:Core/Src/main.c **** hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
		533	288:Core/Src/main.c **** hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
		534	289:Core/Src/main.c **** hi2c2.Init.OwnAddress2 = 0;
		535	290:Core/Src/main.c **** hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
		536	291:Core/Src/main.c **** hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
		537	292:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c2) != HAL_OK)
		538	293:Core/Src/main.c **** {
		539	294:Core/Src/main.c **** Error_Handler();
		540	295:Core/Src/main.c **** }
		541	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 10
		542
		543
		544	296:Core/Src/main.c **** /* USER CODE BEGIN I2C2_Init 2 */
		545	297:Core/Src/main.c ****
		546	298:Core/Src/main.c **** /* USER CODE END I2C2_Init 2 */
		547	299:Core/Src/main.c ****
		548	300:Core/Src/main.c **** }
		549	301:Core/Src/main.c ****
		550	302:Core/Src/main.c ** /
		551	303:Core/Src/main.c **** * @brief RTC Initialization Function
		552	304:Core/Src/main.c **** * @param None
		553	305:Core/Src/main.c **** * @retval None
		554	306:Core/Src/main.c **** */
		555	307:Core/Src/main.c **** static void MX_RTC_Init(void)
		556	308:Core/Src/main.c **** {
		557	309:Core/Src/main.c ****
		558	310:Core/Src/main.c **** /* USER CODE BEGIN RTC_Init 0 */
		559	311:Core/Src/main.c ****
		560	312:Core/Src/main.c **** /* USER CODE END RTC_Init 0 */
		561	313:Core/Src/main.c ****
		562	314:Core/Src/main.c **** RTC_TimeTypeDef sTime = {0};
		563	315:Core/Src/main.c **** RTC_DateTypeDef DateToUpdate = {0};
		564	316:Core/Src/main.c ****
		565	317:Core/Src/main.c **** /* USER CODE BEGIN RTC_Init 1 */
		566	318:Core/Src/main.c ****
		567	319:Core/Src/main.c **** /* USER CODE END RTC_Init 1 */
		568	320:Core/Src/main.c ** / Initialize RTC Only
		569	321:Core/Src/main.c **** */
		570	322:Core/Src/main.c **** hrtc.Instance = RTC;
		571	323:Core/Src/main.c **** hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
		572	324:Core/Src/main.c **** hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM;
		573	325:Core/Src/main.c **** if (HAL_RTC_Init(&hrtc) != HAL_OK)
		574	326:Core/Src/main.c **** {
		575	327:Core/Src/main.c **** Error_Handler();
		576	328:Core/Src/main.c **** }
		577	329:Core/Src/main.c ****
		578	330:Core/Src/main.c **** /* USER CODE BEGIN Check_RTC_BKUP */
		579	331:Core/Src/main.c ****
		580	332:Core/Src/main.c **** /* USER CODE END Check_RTC_BKUP */
		581	333:Core/Src/main.c ****
		582	334:Core/Src/main.c ** / Initialize RTC and set the Time and Date
		583	335:Core/Src/main.c **** */
		584	336:Core/Src/main.c **** sTime.Hours = 0x0;
		585	337:Core/Src/main.c **** sTime.Minutes = 0x0;
		586	338:Core/Src/main.c **** sTime.Seconds = 0x0;
		587	339:Core/Src/main.c ****
		588	340:Core/Src/main.c **** if (HAL_RTC_SetTime(&hrtc, &sTime, RTC_FORMAT_BCD) != HAL_OK)
		589	341:Core/Src/main.c **** {
		590	342:Core/Src/main.c **** Error_Handler();
		591	343:Core/Src/main.c **** }
		592	344:Core/Src/main.c **** DateToUpdate.WeekDay = RTC_WEEKDAY_MONDAY;
		593	345:Core/Src/main.c **** DateToUpdate.Month = RTC_MONTH_JANUARY;
		594	346:Core/Src/main.c **** DateToUpdate.Date = 0x1;
		595	347:Core/Src/main.c **** DateToUpdate.Year = 0x0;
		596	348:Core/Src/main.c ****
		597	349:Core/Src/main.c **** if (HAL_RTC_SetDate(&hrtc, &DateToUpdate, RTC_FORMAT_BCD) != HAL_OK)
		598	350:Core/Src/main.c **** {
		599	351:Core/Src/main.c **** Error_Handler();
		600	352:Core/Src/main.c **** }
		601	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 11
		602
		603
		604	353:Core/Src/main.c **** /* USER CODE BEGIN RTC_Init 2 */
		605	354:Core/Src/main.c ****
		606	355:Core/Src/main.c **** /* USER CODE END RTC_Init 2 */
		607	356:Core/Src/main.c ****
		608	357:Core/Src/main.c **** }
		609	358:Core/Src/main.c ****
		610	359:Core/Src/main.c ** /
		611	360:Core/Src/main.c **** * @brief SPI1 Initialization Function
		612	361:Core/Src/main.c **** * @param None
		613	362:Core/Src/main.c **** * @retval None
		614	363:Core/Src/main.c **** */
		615	364:Core/Src/main.c **** static void MX_SPI1_Init(void)
		616	365:Core/Src/main.c **** {
		617	366:Core/Src/main.c ****
		618	367:Core/Src/main.c **** /* USER CODE BEGIN SPI1_Init 0 */
		619	368:Core/Src/main.c ****
		620	369:Core/Src/main.c **** /* USER CODE END SPI1_Init 0 */
		621	370:Core/Src/main.c ****
		622	371:Core/Src/main.c **** /* USER CODE BEGIN SPI1_Init 1 */
		623	372:Core/Src/main.c ****
		624	373:Core/Src/main.c **** /* USER CODE END SPI1_Init 1 */
		625	374:Core/Src/main.c **** /* SPI1 parameter configuration*/
		626	375:Core/Src/main.c **** hspi1.Instance = SPI1;
		627	376:Core/Src/main.c **** hspi1.Init.Mode = SPI_MODE_MASTER;
		628	377:Core/Src/main.c **** hspi1.Init.Direction = SPI_DIRECTION_1LINE;
		629	378:Core/Src/main.c **** hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
		630	379:Core/Src/main.c **** hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
		631	380:Core/Src/main.c **** hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
		632	381:Core/Src/main.c **** hspi1.Init.NSS = SPI_NSS_SOFT;
		633	382:Core/Src/main.c **** hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
		634	383:Core/Src/main.c **** hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
		635	384:Core/Src/main.c **** hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
		636	385:Core/Src/main.c **** hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
		637	386:Core/Src/main.c **** hspi1.Init.CRCPolynomial = 10;
		638	387:Core/Src/main.c **** if (HAL_SPI_Init(&hspi1) != HAL_OK)
		639	388:Core/Src/main.c **** {
		640	389:Core/Src/main.c **** Error_Handler();
		641	390:Core/Src/main.c **** }
		642	391:Core/Src/main.c **** /* USER CODE BEGIN SPI1_Init 2 */
		643	392:Core/Src/main.c ****
		644	393:Core/Src/main.c **** /* USER CODE END SPI1_Init 2 */
		645	394:Core/Src/main.c ****
		646	395:Core/Src/main.c **** }
		647	396:Core/Src/main.c ****
		648	397:Core/Src/main.c ** /
		649	398:Core/Src/main.c **** * @brief TIM3 Initialization Function
		650	399:Core/Src/main.c **** * @param None
		651	400:Core/Src/main.c **** * @retval None
		652	401:Core/Src/main.c **** */
		653	402:Core/Src/main.c **** static void MX_TIM3_Init(void)
		654	403:Core/Src/main.c **** {
		655	404:Core/Src/main.c ****
		656	405:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 0 */
		657	406:Core/Src/main.c ****
		658	407:Core/Src/main.c **** /* USER CODE END TIM3_Init 0 */
		659	408:Core/Src/main.c ****
		660	409:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
		661	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 12
		662
		663
		664	410:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
		665	411:Core/Src/main.c ****
		666	412:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 1 */
		667	413:Core/Src/main.c ****
		668	414:Core/Src/main.c **** /* USER CODE END TIM3_Init 1 */
		669	415:Core/Src/main.c **** htim3.Instance = TIM3;
		670	416:Core/Src/main.c **** htim3.Init.Prescaler = 640;
		671	417:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
		672	418:Core/Src/main.c **** htim3.Init.Period = 10000;
		673	419:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
		674	420:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
		675	421:Core/Src/main.c **** if (HAL_TIM_OC_Init(&htim3) != HAL_OK)
		676	422:Core/Src/main.c **** {
		677	423:Core/Src/main.c **** Error_Handler();
		678	424:Core/Src/main.c **** }
		679	425:Core/Src/main.c **** if (HAL_TIM_OnePulse_Init(&htim3, TIM_OPMODE_SINGLE) != HAL_OK)
		680	426:Core/Src/main.c **** {
		681	427:Core/Src/main.c **** Error_Handler();
		682	428:Core/Src/main.c **** }
		683	429:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_ENABLE;
		684	430:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
		685	431:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
		686	432:Core/Src/main.c **** {
		687	433:Core/Src/main.c **** Error_Handler();
		688	434:Core/Src/main.c **** }
		689	435:Core/Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_TIMING;
		690	436:Core/Src/main.c **** sConfigOC.Pulse = 9999;
		691	437:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
		692	438:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
		693	439:Core/Src/main.c **** if (HAL_TIM_OC_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
		694	440:Core/Src/main.c **** {
		695	441:Core/Src/main.c **** Error_Handler();
		696	442:Core/Src/main.c **** }
		697	443:Core/Src/main.c **** /* USER CODE BEGIN TIM3_Init 2 */
		698	444:Core/Src/main.c ****
		699	445:Core/Src/main.c **** /* USER CODE END TIM3_Init 2 */
		700	446:Core/Src/main.c ****
		701	447:Core/Src/main.c **** }
		702	448:Core/Src/main.c ****
		703	449:Core/Src/main.c ** /
		704	450:Core/Src/main.c **** * @brief TIM4 Initialization Function
		705	451:Core/Src/main.c **** * @param None
		706	452:Core/Src/main.c **** * @retval None
		707	453:Core/Src/main.c **** */
		708	454:Core/Src/main.c **** static void MX_TIM4_Init(void)
		709	455:Core/Src/main.c **** {
		710	456:Core/Src/main.c ****
		711	457:Core/Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */
		712	458:Core/Src/main.c ****
		713	459:Core/Src/main.c **** /* USER CODE END TIM4_Init 0 */
		714	460:Core/Src/main.c ****
		715	461:Core/Src/main.c **** TIM_Encoder_InitTypeDef sConfig = {0};
		716	462:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
		717	463:Core/Src/main.c ****
		718	464:Core/Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */
		719	465:Core/Src/main.c ****
		720	466:Core/Src/main.c **** /* USER CODE END TIM4_Init 1 */
		721	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 13
		722
		723
		724	467:Core/Src/main.c **** htim4.Instance = TIM4;
		725	468:Core/Src/main.c **** htim4.Init.Prescaler = 0;
		726	469:Core/Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
		727	470:Core/Src/main.c **** htim4.Init.Period = 65535;
		728	471:Core/Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
		729	472:Core/Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
		730	473:Core/Src/main.c **** sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
		731	474:Core/Src/main.c **** sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
		732	475:Core/Src/main.c **** sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
		733	476:Core/Src/main.c **** sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
		734	477:Core/Src/main.c **** sConfig.IC1Filter = 8;
		735	478:Core/Src/main.c **** sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
		736	479:Core/Src/main.c **** sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
		737	480:Core/Src/main.c **** sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
		738	481:Core/Src/main.c **** sConfig.IC2Filter = 8;
		739	482:Core/Src/main.c **** if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK)
		740	483:Core/Src/main.c **** {
		741	484:Core/Src/main.c **** Error_Handler();
		742	485:Core/Src/main.c **** }
		743	486:Core/Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
		744	487:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
		745	488:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
		746	489:Core/Src/main.c **** {
		747	490:Core/Src/main.c **** Error_Handler();
		748	491:Core/Src/main.c **** }
		749	492:Core/Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */
		750	493:Core/Src/main.c ****
		751	494:Core/Src/main.c **** /* USER CODE END TIM4_Init 2 */
		752	495:Core/Src/main.c ****
		753	496:Core/Src/main.c **** }
		754	497:Core/Src/main.c ****
		755	498:Core/Src/main.c ** /
		756	499:Core/Src/main.c **** * @brief USART1 Initialization Function
		757	500:Core/Src/main.c **** * @param None
		758	501:Core/Src/main.c **** * @retval None
		759	502:Core/Src/main.c **** */
		760	503:Core/Src/main.c **** static void MX_USART1_UART_Init(void)
		761	504:Core/Src/main.c **** {
		762	505:Core/Src/main.c ****
		763	506:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */
		764	507:Core/Src/main.c ****
		765	508:Core/Src/main.c **** /* USER CODE END USART1_Init 0 */
		766	509:Core/Src/main.c ****
		767	510:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */
		768	511:Core/Src/main.c ****
		769	512:Core/Src/main.c **** /* USER CODE END USART1_Init 1 */
		770	513:Core/Src/main.c **** huart1.Instance = USART1;
		771	514:Core/Src/main.c **** huart1.Init.BaudRate = 115200;
		772	515:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B;
		773	516:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1;
		774	517:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE;
		775	518:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX;
		776	519:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
		777	520:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16;
		778	521:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK)
		779	522:Core/Src/main.c **** {
		780	523:Core/Src/main.c **** Error_Handler();
		781	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 14
		782
		783
		784	524:Core/Src/main.c **** }
		785	525:Core/Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */
		786	526:Core/Src/main.c ****
		787	527:Core/Src/main.c **** /* USER CODE END USART1_Init 2 */
		788	528:Core/Src/main.c ****
		789	529:Core/Src/main.c **** }
		790	530:Core/Src/main.c ****
		791	531:Core/Src/main.c ** /
		792	532:Core/Src/main.c **** * @brief GPIO Initialization Function
		793	533:Core/Src/main.c **** * @param None
		794	534:Core/Src/main.c **** * @retval None
		795	535:Core/Src/main.c **** */
		796	536:Core/Src/main.c **** static void MX_GPIO_Init(void)
		797	537:Core/Src/main.c **** {
		798	200 .loc 1 537 1 is_stmt 1 view -0
		799	201 .cfi_startproc
		800	202 @ args = 0, pretend = 0, frame = 32
		801	203 @ frame_needed = 0, uses_anonymous_args = 0
		802	204 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
		803	205 .LCFI9:
		804	206 .cfi_def_cfa_offset 24
		805	207 .cfi_offset 4, -24
		806	208 .cfi_offset 5, -20
		807	209 .cfi_offset 6, -16
		808	210 .cfi_offset 7, -12
		809	211 .cfi_offset 8, -8
		810	212 .cfi_offset 14, -4
		811	213 0004 88B0 sub sp, sp, #32
		812	214 .LCFI10:
		813	215 .cfi_def_cfa_offset 56
		814	538:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
		815	216 .loc 1 538 3 view .LVU31
		816	217 .loc 1 538 20 is_stmt 0 view .LVU32
		817	218 0006 0024 movs r4, #0
		818	219 0008 0494 str r4, [sp, #16]
		819	220 000a 0594 str r4, [sp, #20]
		820	221 000c 0694 str r4, [sp, #24]
		821	222 000e 0794 str r4, [sp, #28]
		822	539:Core/Src/main.c ****
		823	540:Core/Src/main.c **** /* GPIO Ports Clock Enable */
		824	541:Core/Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
		825	223 .loc 1 541 3 is_stmt 1 view .LVU33
		826	224 .LBB2:
		827	225 .loc 1 541 3 view .LVU34
		828	226 .loc 1 541 3 view .LVU35
		829	227 0010 244B ldr r3, .L19
		830	228 0012 9A69 ldr r2, [r3, #24]
		831	229 0014 42F01002 orr r2, r2, #16
		832	230 0018 9A61 str r2, [r3, #24]
		833	231 .loc 1 541 3 view .LVU36
		834	232 001a 9A69 ldr r2, [r3, #24]
		835	233 001c 02F01002 and r2, r2, #16
		836	234 0020 0092 str r2, [sp]
		837	235 .loc 1 541 3 view .LVU37
		838	236 0022 009A ldr r2, [sp]
		839	237 .LBE2:
		840	542:Core/Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
		841	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 15
		842
		843
		844	238 .loc 1 542 3 view .LVU38
		845	239 .LBB3:
		846	240 .loc 1 542 3 view .LVU39
		847	241 .loc 1 542 3 view .LVU40
		848	242 0024 9A69 ldr r2, [r3, #24]
		849	243 0026 42F02002 orr r2, r2, #32
		850	244 002a 9A61 str r2, [r3, #24]
		851	245 .loc 1 542 3 view .LVU41
		852	246 002c 9A69 ldr r2, [r3, #24]
		853	247 002e 02F02002 and r2, r2, #32
		854	248 0032 0192 str r2, [sp, #4]
		855	249 .loc 1 542 3 view .LVU42
		856	250 0034 019A ldr r2, [sp, #4]
		857	251 .LBE3:
		858	543:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
		859	252 .loc 1 543 3 view .LVU43
		860	253 .LBB4:
		861	254 .loc 1 543 3 view .LVU44
		862	255 .loc 1 543 3 view .LVU45
		863	256 0036 9A69 ldr r2, [r3, #24]
		864	257 0038 42F00402 orr r2, r2, #4
		865	258 003c 9A61 str r2, [r3, #24]
		866	259 .loc 1 543 3 view .LVU46
		867	260 003e 9A69 ldr r2, [r3, #24]
		868	261 0040 02F00402 and r2, r2, #4
		869	262 0044 0292 str r2, [sp, #8]
		870	263 .loc 1 543 3 view .LVU47
		871	264 0046 029A ldr r2, [sp, #8]
		872	265 .LBE4:
		873	544:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
		874	266 .loc 1 544 3 view .LVU48
		875	267 .LBB5:
		876	268 .loc 1 544 3 view .LVU49
		877	269 .loc 1 544 3 view .LVU50
		878	270 0048 9A69 ldr r2, [r3, #24]
		879	271 004a 42F00802 orr r2, r2, #8
		880	272 004e 9A61 str r2, [r3, #24]
		881	273 .loc 1 544 3 view .LVU51
		882	274 0050 9B69 ldr r3, [r3, #24]
		883	275 0052 03F00803 and r3, r3, #8
		884	276 0056 0393 str r3, [sp, #12]
		885	277 .loc 1 544 3 view .LVU52
		886	278 0058 039B ldr r3, [sp, #12]
		887	279 .LBE5:
		888	545:Core/Src/main.c ****
		889	546:Core/Src/main.c **** /Configure GPIO pin Output Level /
		890	547:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, SPI_CD_Pin\|SPI_RESET_Pin\|SPI_NSS1_Pin, GPIO_PIN_RESET);
		891	280 .loc 1 547 3 view .LVU53
		892	281 005a DFF85080 ldr r8, .L19+8
		893	282 005e 2246 mov r2, r4
		894	283 0060 5821 movs r1, #88
		895	284 0062 4046 mov r0, r8
		896	285 0064 FFF7FEFF bl HAL_GPIO_WritePin
		897	286 .LVL20:
		898	548:Core/Src/main.c ****
		899	549:Core/Src/main.c **** /Configure GPIO pin Output Level /
		900	550:Core/Src/main.c **** HAL_GPIO_WritePin(USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_RESET);
		901	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 16
		902
		903
		904	287 .loc 1 550 3 view .LVU54
		905	288 0068 0F4D ldr r5, .L19+4
		906	289 006a 2246 mov r2, r4
		907	290 006c 1021 movs r1, #16
		908	291 006e 2846 mov r0, r5
		909	292 0070 FFF7FEFF bl HAL_GPIO_WritePin
		910	293 .LVL21:
		911	551:Core/Src/main.c ****
		912	552:Core/Src/main.c **** /Configure GPIO pins : SPI_CD_Pin SPI_RESET_Pin SPI_NSS1_Pin /
		913	553:Core/Src/main.c **** GPIO_InitStruct.Pin = SPI_CD_Pin\|SPI_RESET_Pin\|SPI_NSS1_Pin;
		914	294 .loc 1 553 3 view .LVU55
		915	295 .loc 1 553 23 is_stmt 0 view .LVU56
		916	296 0074 5823 movs r3, #88
		917	297 0076 0493 str r3, [sp, #16]
		918	554:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
		919	298 .loc 1 554 3 is_stmt 1 view .LVU57
		920	299 .loc 1 554 24 is_stmt 0 view .LVU58
		921	300 0078 0127 movs r7, #1
		922	301 007a 0597 str r7, [sp, #20]
		923	555:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
		924	302 .loc 1 555 3 is_stmt 1 view .LVU59
		925	303 .loc 1 555 24 is_stmt 0 view .LVU60
		926	304 007c 0694 str r4, [sp, #24]
		927	556:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
		928	305 .loc 1 556 3 is_stmt 1 view .LVU61
		929	306 .loc 1 556 25 is_stmt 0 view .LVU62
		930	307 007e 0226 movs r6, #2
		931	308 0080 0796 str r6, [sp, #28]
		932	557:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
		933	309 .loc 1 557 3 is_stmt 1 view .LVU63
		934	310 0082 04A9 add r1, sp, #16
		935	311 0084 4046 mov r0, r8
		936	312 0086 FFF7FEFF bl HAL_GPIO_Init
		937	313 .LVL22:
		938	558:Core/Src/main.c ****
		939	559:Core/Src/main.c **** /Configure GPIO pin : USB_PULLUP_Pin /
		940	560:Core/Src/main.c **** GPIO_InitStruct.Pin = USB_PULLUP_Pin;
		941	314 .loc 1 560 3 view .LVU64
		942	315 .loc 1 560 23 is_stmt 0 view .LVU65
		943	316 008a 1023 movs r3, #16
		944	317 008c 0493 str r3, [sp, #16]
		945	561:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
		946	318 .loc 1 561 3 is_stmt 1 view .LVU66
		947	319 .loc 1 561 24 is_stmt 0 view .LVU67
		948	320 008e 0597 str r7, [sp, #20]
		949	562:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
		950	321 .loc 1 562 3 is_stmt 1 view .LVU68
		951	322 .loc 1 562 24 is_stmt 0 view .LVU69
		952	323 0090 0694 str r4, [sp, #24]
		953	563:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
		954	324 .loc 1 563 3 is_stmt 1 view .LVU70
		955	325 .loc 1 563 25 is_stmt 0 view .LVU71
		956	326 0092 0796 str r6, [sp, #28]
		957	564:Core/Src/main.c **** HAL_GPIO_Init(USB_PULLUP_GPIO_Port, &GPIO_InitStruct);
		958	327 .loc 1 564 3 is_stmt 1 view .LVU72
		959	328 0094 0DEB0301 add r1, sp, r3
		960	329 0098 2846 mov r0, r5
		961	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 17
		962
		963
		964	330 009a FFF7FEFF bl HAL_GPIO_Init
		965	331 .LVL23:
		966	565:Core/Src/main.c ****
		967	566:Core/Src/main.c **** }
		968	332 .loc 1 566 1 is_stmt 0 view .LVU73
		969	333 009e 08B0 add sp, sp, #32
		970	334 .LCFI11:
		971	335 .cfi_def_cfa_offset 24
		972	336 @ sp needed
		973	337 00a0 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
		974	338 .L20:
		975	339 .align 2
		976	340 .L19:
		977	341 00a4 00100240 .word 1073876992
		978	342 00a8 000C0140 .word 1073810432
		979	343 00ac 00080140 .word 1073809408
		980	344 .cfi_endproc
		981	345 .LFE79:
		982	347 .section .text.MX_SPI1_Init,"ax",%progbits
		983	348 .align 1
		984	349 .syntax unified
		985	350 .thumb
		986	351 .thumb_func
		987	352 .fpu softvfp
		988	354 MX_SPI1_Init:
		989	355 .LFB75:
		990	365:Core/Src/main.c ****
		991	356 .loc 1 365 1 is_stmt 1 view -0
		992	357 .cfi_startproc
		993	358 @ args = 0, pretend = 0, frame = 0
		994	359 @ frame_needed = 0, uses_anonymous_args = 0
		995	360 0000 08B5 push {r3, lr}
		996	361 .LCFI12:
		997	362 .cfi_def_cfa_offset 8
		998	363 .cfi_offset 3, -8
		999	364 .cfi_offset 14, -4
		1000	375:Core/Src/main.c **** hspi1.Init.Mode = SPI_MODE_MASTER;
		1001	365 .loc 1 375 3 view .LVU75
		1002	375:Core/Src/main.c **** hspi1.Init.Mode = SPI_MODE_MASTER;
		1003	366 .loc 1 375 18 is_stmt 0 view .LVU76
		1004	367 0002 0E48 ldr r0, .L23
		1005	368 0004 0E4B ldr r3, .L23+4
		1006	369 0006 0360 str r3, [r0]
		1007	376:Core/Src/main.c **** hspi1.Init.Direction = SPI_DIRECTION_1LINE;
		1008	370 .loc 1 376 3 is_stmt 1 view .LVU77
		1009	376:Core/Src/main.c **** hspi1.Init.Direction = SPI_DIRECTION_1LINE;
		1010	371 .loc 1 376 19 is_stmt 0 view .LVU78
		1011	372 0008 4FF48273 mov r3, #260
		1012	373 000c 4360 str r3, [r0, #4]
		1013	377:Core/Src/main.c **** hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
		1014	374 .loc 1 377 3 is_stmt 1 view .LVU79
		1015	377:Core/Src/main.c **** hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
		1016	375 .loc 1 377 24 is_stmt 0 view .LVU80
		1017	376 000e 4FF40043 mov r3, #32768
		1018	377 0012 8360 str r3, [r0, #8]
		1019	378:Core/Src/main.c **** hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
		1020	378 .loc 1 378 3 is_stmt 1 view .LVU81
		1021	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 18
		1022
		1023
		1024	378:Core/Src/main.c **** hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
		1025	379 .loc 1 378 23 is_stmt 0 view .LVU82
		1026	380 0014 0023 movs r3, #0
		1027	381 0016 C360 str r3, [r0, #12]
		1028	379:Core/Src/main.c **** hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
		1029	382 .loc 1 379 3 is_stmt 1 view .LVU83
		1030	379:Core/Src/main.c **** hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
		1031	383 .loc 1 379 26 is_stmt 0 view .LVU84
		1032	384 0018 0222 movs r2, #2
		1033	385 001a 0261 str r2, [r0, #16]
		1034	380:Core/Src/main.c **** hspi1.Init.NSS = SPI_NSS_SOFT;
		1035	386 .loc 1 380 3 is_stmt 1 view .LVU85
		1036	380:Core/Src/main.c **** hspi1.Init.NSS = SPI_NSS_SOFT;
		1037	387 .loc 1 380 23 is_stmt 0 view .LVU86
		1038	388 001c 0122 movs r2, #1
		1039	389 001e 4261 str r2, [r0, #20]
		1040	381:Core/Src/main.c **** hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
		1041	390 .loc 1 381 3 is_stmt 1 view .LVU87
		1042	381:Core/Src/main.c **** hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
		1043	391 .loc 1 381 18 is_stmt 0 view .LVU88
		1044	392 0020 4FF40072 mov r2, #512
		1045	393 0024 8261 str r2, [r0, #24]
		1046	382:Core/Src/main.c **** hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
		1047	394 .loc 1 382 3 is_stmt 1 view .LVU89
		1048	382:Core/Src/main.c **** hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
		1049	395 .loc 1 382 32 is_stmt 0 view .LVU90
		1050	396 0026 1022 movs r2, #16
		1051	397 0028 C261 str r2, [r0, #28]
		1052	383:Core/Src/main.c **** hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
		1053	398 .loc 1 383 3 is_stmt 1 view .LVU91
		1054	383:Core/Src/main.c **** hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
		1055	399 .loc 1 383 23 is_stmt 0 view .LVU92
		1056	400 002a 0362 str r3, [r0, #32]
		1057	384:Core/Src/main.c **** hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
		1058	401 .loc 1 384 3 is_stmt 1 view .LVU93
		1059	384:Core/Src/main.c **** hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
		1060	402 .loc 1 384 21 is_stmt 0 view .LVU94
		1061	403 002c 4362 str r3, [r0, #36]
		1062	385:Core/Src/main.c **** hspi1.Init.CRCPolynomial = 10;
		1063	404 .loc 1 385 3 is_stmt 1 view .LVU95
		1064	385:Core/Src/main.c **** hspi1.Init.CRCPolynomial = 10;
		1065	405 .loc 1 385 29 is_stmt 0 view .LVU96
		1066	406 002e 8362 str r3, [r0, #40]
		1067	386:Core/Src/main.c **** if (HAL_SPI_Init(&hspi1) != HAL_OK)
		1068	407 .loc 1 386 3 is_stmt 1 view .LVU97
		1069	386:Core/Src/main.c **** if (HAL_SPI_Init(&hspi1) != HAL_OK)
		1070	408 .loc 1 386 28 is_stmt 0 view .LVU98
		1071	409 0030 0A23 movs r3, #10
		1072	410 0032 C362 str r3, [r0, #44]
		1073	387:Core/Src/main.c **** {
		1074	411 .loc 1 387 3 is_stmt 1 view .LVU99
		1075	387:Core/Src/main.c **** {
		1076	412 .loc 1 387 7 is_stmt 0 view .LVU100
		1077	413 0034 FFF7FEFF bl HAL_SPI_Init
		1078	414 .LVL24:
		1079	395:Core/Src/main.c ****
		1080	415 .loc 1 395 1 view .LVU101
		1081	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 19
		1082
		1083
		1084	416 0038 08BD pop {r3, pc}
		1085	417 .L24:
		1086	418 003a 00BF .align 2
		1087	419 .L23:
		1088	420 003c 00000000 .word hspi1
		1089	421 0040 00300140 .word 1073819648
		1090	422 .cfi_endproc
		1091	423 .LFE75:
		1092	425 .section .text.MX_TIM4_Init,"ax",%progbits
		1093	426 .align 1
		1094	427 .syntax unified
		1095	428 .thumb
		1096	429 .thumb_func
		1097	430 .fpu softvfp
		1098	432 MX_TIM4_Init:
		1099	433 .LFB77:
		1100	455:Core/Src/main.c ****
		1101	434 .loc 1 455 1 is_stmt 1 view -0
		1102	435 .cfi_startproc
		1103	436 @ args = 0, pretend = 0, frame = 48
		1104	437 @ frame_needed = 0, uses_anonymous_args = 0
		1105	438 0000 30B5 push {r4, r5, lr}
		1106	439 .LCFI13:
		1107	440 .cfi_def_cfa_offset 12
		1108	441 .cfi_offset 4, -12
		1109	442 .cfi_offset 5, -8
		1110	443 .cfi_offset 14, -4
		1111	444 0002 8DB0 sub sp, sp, #52
		1112	445 .LCFI14:
		1113	446 .cfi_def_cfa_offset 64
		1114	461:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
		1115	447 .loc 1 461 3 view .LVU103
		1116	461:Core/Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
		1117	448 .loc 1 461 27 is_stmt 0 view .LVU104
		1118	449 0004 0024 movs r4, #0
		1119	450 0006 0494 str r4, [sp, #16]
		1120	451 0008 0694 str r4, [sp, #24]
		1121	452 000a 0894 str r4, [sp, #32]
		1122	453 000c 0A94 str r4, [sp, #40]
		1123	462:Core/Src/main.c ****
		1124	454 .loc 1 462 3 is_stmt 1 view .LVU105
		1125	462:Core/Src/main.c ****
		1126	455 .loc 1 462 27 is_stmt 0 view .LVU106
		1127	456 000e 0194 str r4, [sp, #4]
		1128	457 0010 0294 str r4, [sp, #8]
		1129	467:Core/Src/main.c **** htim4.Init.Prescaler = 0;
		1130	458 .loc 1 467 3 is_stmt 1 view .LVU107
		1131	467:Core/Src/main.c **** htim4.Init.Prescaler = 0;
		1132	459 .loc 1 467 18 is_stmt 0 view .LVU108
		1133	460 0012 0F4D ldr r5, .L27
		1134	461 0014 0F4B ldr r3, .L27+4
		1135	462 0016 2B60 str r3, [r5]
		1136	468:Core/Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
		1137	463 .loc 1 468 3 is_stmt 1 view .LVU109
		1138	468:Core/Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
		1139	464 .loc 1 468 24 is_stmt 0 view .LVU110
		1140	465 0018 6C60 str r4, [r5, #4]
		1141	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 20
		1142
		1143
		1144	469:Core/Src/main.c **** htim4.Init.Period = 65535;
		1145	466 .loc 1 469 3 is_stmt 1 view .LVU111
		1146	469:Core/Src/main.c **** htim4.Init.Period = 65535;
		1147	467 .loc 1 469 26 is_stmt 0 view .LVU112
		1148	468 001a AC60 str r4, [r5, #8]
		1149	470:Core/Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
		1150	469 .loc 1 470 3 is_stmt 1 view .LVU113
		1151	470:Core/Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
		1152	470 .loc 1 470 21 is_stmt 0 view .LVU114
		1153	471 001c 4FF6FF73 movw r3, #65535
		1154	472 0020 EB60 str r3, [r5, #12]
		1155	471:Core/Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
		1156	473 .loc 1 471 3 is_stmt 1 view .LVU115
		1157	471:Core/Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
		1158	474 .loc 1 471 28 is_stmt 0 view .LVU116
		1159	475 0022 2C61 str r4, [r5, #16]
		1160	472:Core/Src/main.c **** sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
		1161	476 .loc 1 472 3 is_stmt 1 view .LVU117
		1162	472:Core/Src/main.c **** sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
		1163	477 .loc 1 472 32 is_stmt 0 view .LVU118
		1164	478 0024 AC61 str r4, [r5, #24]
		1165	473:Core/Src/main.c **** sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
		1166	479 .loc 1 473 3 is_stmt 1 view .LVU119
		1167	473:Core/Src/main.c **** sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
		1168	480 .loc 1 473 23 is_stmt 0 view .LVU120
		1169	481 0026 0323 movs r3, #3
		1170	482 0028 0393 str r3, [sp, #12]
		1171	474:Core/Src/main.c **** sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
		1172	483 .loc 1 474 3 is_stmt 1 view .LVU121
		1173	475:Core/Src/main.c **** sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
		1174	484 .loc 1 475 3 view .LVU122
		1175	475:Core/Src/main.c **** sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
		1176	485 .loc 1 475 24 is_stmt 0 view .LVU123
		1177	486 002a 0122 movs r2, #1
		1178	487 002c 0592 str r2, [sp, #20]
		1179	476:Core/Src/main.c **** sConfig.IC1Filter = 8;
		1180	488 .loc 1 476 3 is_stmt 1 view .LVU124
		1181	477:Core/Src/main.c **** sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
		1182	489 .loc 1 477 3 view .LVU125
		1183	477:Core/Src/main.c **** sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
		1184	490 .loc 1 477 21 is_stmt 0 view .LVU126
		1185	491 002e 0823 movs r3, #8
		1186	492 0030 0793 str r3, [sp, #28]
		1187	478:Core/Src/main.c **** sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
		1188	493 .loc 1 478 3 is_stmt 1 view .LVU127
		1189	479:Core/Src/main.c **** sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
		1190	494 .loc 1 479 3 view .LVU128
		1191	479:Core/Src/main.c **** sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
		1192	495 .loc 1 479 24 is_stmt 0 view .LVU129
		1193	496 0032 0992 str r2, [sp, #36]
		1194	480:Core/Src/main.c **** sConfig.IC2Filter = 8;
		1195	497 .loc 1 480 3 is_stmt 1 view .LVU130
		1196	481:Core/Src/main.c **** if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK)
		1197	498 .loc 1 481 3 view .LVU131
		1198	481:Core/Src/main.c **** if (HAL_TIM_Encoder_Init(&htim4, &sConfig) != HAL_OK)
		1199	499 .loc 1 481 21 is_stmt 0 view .LVU132
		1200	500 0034 0B93 str r3, [sp, #44]
		1201	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 21
		1202
		1203
		1204	482:Core/Src/main.c **** {
		1205	501 .loc 1 482 3 is_stmt 1 view .LVU133
		1206	482:Core/Src/main.c **** {
		1207	502 .loc 1 482 7 is_stmt 0 view .LVU134
		1208	503 0036 03A9 add r1, sp, #12
		1209	504 0038 2846 mov r0, r5
		1210	505 003a FFF7FEFF bl HAL_TIM_Encoder_Init
		1211	506 .LVL25:
		1212	486:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
		1213	507 .loc 1 486 3 is_stmt 1 view .LVU135
		1214	486:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
		1215	508 .loc 1 486 37 is_stmt 0 view .LVU136
		1216	509 003e 0194 str r4, [sp, #4]
		1217	487:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
		1218	510 .loc 1 487 3 is_stmt 1 view .LVU137
		1219	487:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
		1220	511 .loc 1 487 33 is_stmt 0 view .LVU138
		1221	512 0040 0294 str r4, [sp, #8]
		1222	488:Core/Src/main.c **** {
		1223	513 .loc 1 488 3 is_stmt 1 view .LVU139
		1224	488:Core/Src/main.c **** {
		1225	514 .loc 1 488 7 is_stmt 0 view .LVU140
		1226	515 0042 01A9 add r1, sp, #4
		1227	516 0044 2846 mov r0, r5
		1228	517 0046 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
		1229	518 .LVL26:
		1230	496:Core/Src/main.c ****
		1231	519 .loc 1 496 1 view .LVU141
		1232	520 004a 0DB0 add sp, sp, #52
		1233	521 .LCFI15:
		1234	522 .cfi_def_cfa_offset 12
		1235	523 @ sp needed
		1236	524 004c 30BD pop {r4, r5, pc}
		1237	525 .L28:
		1238	526 004e 00BF .align 2
		1239	527 .L27:
		1240	528 0050 00000000 .word htim4
		1241	529 0054 00080040 .word 1073743872
		1242	530 .cfi_endproc
		1243	531 .LFE77:
		1244	533 .section .text.MX_USART1_UART_Init,"ax",%progbits
		1245	534 .align 1
		1246	535 .syntax unified
		1247	536 .thumb
		1248	537 .thumb_func
		1249	538 .fpu softvfp
		1250	540 MX_USART1_UART_Init:
		1251	541 .LFB78:
		1252	504:Core/Src/main.c ****
		1253	542 .loc 1 504 1 is_stmt 1 view -0
		1254	543 .cfi_startproc
		1255	544 @ args = 0, pretend = 0, frame = 0
		1256	545 @ frame_needed = 0, uses_anonymous_args = 0
		1257	546 0000 08B5 push {r3, lr}
		1258	547 .LCFI16:
		1259	548 .cfi_def_cfa_offset 8
		1260	549 .cfi_offset 3, -8
		1261	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 22
		1262
		1263
		1264	550 .cfi_offset 14, -4
		1265	513:Core/Src/main.c **** huart1.Init.BaudRate = 115200;
		1266	551 .loc 1 513 3 view .LVU143
		1267	513:Core/Src/main.c **** huart1.Init.BaudRate = 115200;
		1268	552 .loc 1 513 19 is_stmt 0 view .LVU144
		1269	553 0002 0848 ldr r0, .L31
		1270	554 0004 084B ldr r3, .L31+4
		1271	555 0006 0360 str r3, [r0]
		1272	514:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B;
		1273	556 .loc 1 514 3 is_stmt 1 view .LVU145
		1274	514:Core/Src/main.c **** huart1.Init.WordLength = UART_WORDLENGTH_8B;
		1275	557 .loc 1 514 24 is_stmt 0 view .LVU146
		1276	558 0008 4FF4E133 mov r3, #115200
		1277	559 000c 4360 str r3, [r0, #4]
		1278	515:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1;
		1279	560 .loc 1 515 3 is_stmt 1 view .LVU147
		1280	515:Core/Src/main.c **** huart1.Init.StopBits = UART_STOPBITS_1;
		1281	561 .loc 1 515 26 is_stmt 0 view .LVU148
		1282	562 000e 0023 movs r3, #0
		1283	563 0010 8360 str r3, [r0, #8]
		1284	516:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE;
		1285	564 .loc 1 516 3 is_stmt 1 view .LVU149
		1286	516:Core/Src/main.c **** huart1.Init.Parity = UART_PARITY_NONE;
		1287	565 .loc 1 516 24 is_stmt 0 view .LVU150
		1288	566 0012 C360 str r3, [r0, #12]
		1289	517:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX;
		1290	567 .loc 1 517 3 is_stmt 1 view .LVU151
		1291	517:Core/Src/main.c **** huart1.Init.Mode = UART_MODE_TX_RX;
		1292	568 .loc 1 517 22 is_stmt 0 view .LVU152
		1293	569 0014 0361 str r3, [r0, #16]
		1294	518:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
		1295	570 .loc 1 518 3 is_stmt 1 view .LVU153
		1296	518:Core/Src/main.c **** huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
		1297	571 .loc 1 518 20 is_stmt 0 view .LVU154
		1298	572 0016 0C22 movs r2, #12
		1299	573 0018 4261 str r2, [r0, #20]
		1300	519:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16;
		1301	574 .loc 1 519 3 is_stmt 1 view .LVU155
		1302	519:Core/Src/main.c **** huart1.Init.OverSampling = UART_OVERSAMPLING_16;
		1303	575 .loc 1 519 25 is_stmt 0 view .LVU156
		1304	576 001a 8361 str r3, [r0, #24]
		1305	520:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK)
		1306	577 .loc 1 520 3 is_stmt 1 view .LVU157
		1307	520:Core/Src/main.c **** if (HAL_UART_Init(&huart1) != HAL_OK)
		1308	578 .loc 1 520 28 is_stmt 0 view .LVU158
		1309	579 001c C361 str r3, [r0, #28]
		1310	521:Core/Src/main.c **** {
		1311	580 .loc 1 521 3 is_stmt 1 view .LVU159
		1312	521:Core/Src/main.c **** {
		1313	581 .loc 1 521 7 is_stmt 0 view .LVU160
		1314	582 001e FFF7FEFF bl HAL_UART_Init
		1315	583 .LVL27:
		1316	529:Core/Src/main.c ****
		1317	584 .loc 1 529 1 view .LVU161
		1318	585 0022 08BD pop {r3, pc}
		1319	586 .L32:
		1320	587 .align 2
		1321	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 23
		1322
		1323
		1324	588 .L31:
		1325	589 0024 00000000 .word huart1
		1326	590 0028 00380140 .word 1073821696
		1327	591 .cfi_endproc
		1328	592 .LFE78:
		1329	594 .section .text.MX_TIM3_Init,"ax",%progbits
		1330	595 .align 1
		1331	596 .syntax unified
		1332	597 .thumb
		1333	598 .thumb_func
		1334	599 .fpu softvfp
		1335	601 MX_TIM3_Init:
		1336	602 .LFB76:
		1337	403:Core/Src/main.c ****
		1338	603 .loc 1 403 1 is_stmt 1 view -0
		1339	604 .cfi_startproc
		1340	605 @ args = 0, pretend = 0, frame = 40
		1341	606 @ frame_needed = 0, uses_anonymous_args = 0
		1342	607 0000 30B5 push {r4, r5, lr}
		1343	608 .LCFI17:
		1344	609 .cfi_def_cfa_offset 12
		1345	610 .cfi_offset 4, -12
		1346	611 .cfi_offset 5, -8
		1347	612 .cfi_offset 14, -4
		1348	613 0002 8BB0 sub sp, sp, #44
		1349	614 .LCFI18:
		1350	615 .cfi_def_cfa_offset 56
		1351	409:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
		1352	616 .loc 1 409 3 view .LVU163
		1353	409:Core/Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
		1354	617 .loc 1 409 27 is_stmt 0 view .LVU164
		1355	618 0004 0024 movs r4, #0
		1356	619 0006 0894 str r4, [sp, #32]
		1357	620 0008 0994 str r4, [sp, #36]
		1358	410:Core/Src/main.c ****
		1359	621 .loc 1 410 3 is_stmt 1 view .LVU165
		1360	410:Core/Src/main.c ****
		1361	622 .loc 1 410 22 is_stmt 0 view .LVU166
		1362	623 000a 0194 str r4, [sp, #4]
		1363	624 000c 0294 str r4, [sp, #8]
		1364	625 000e 0394 str r4, [sp, #12]
		1365	626 0010 0494 str r4, [sp, #16]
		1366	627 0012 0594 str r4, [sp, #20]
		1367	628 0014 0694 str r4, [sp, #24]
		1368	629 0016 0794 str r4, [sp, #28]
		1369	415:Core/Src/main.c **** htim3.Init.Prescaler = 640;
		1370	630 .loc 1 415 3 is_stmt 1 view .LVU167
		1371	415:Core/Src/main.c **** htim3.Init.Prescaler = 640;
		1372	631 .loc 1 415 18 is_stmt 0 view .LVU168
		1373	632 0018 134D ldr r5, .L35
		1374	633 001a 144B ldr r3, .L35+4
		1375	634 001c 2B60 str r3, [r5]
		1376	416:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
		1377	635 .loc 1 416 3 is_stmt 1 view .LVU169
		1378	416:Core/Src/main.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
		1379	636 .loc 1 416 24 is_stmt 0 view .LVU170
		1380	637 001e 4FF42073 mov r3, #640
		1381	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 24
		1382
		1383
		1384	638 0022 6B60 str r3, [r5, #4]
		1385	417:Core/Src/main.c **** htim3.Init.Period = 10000;
		1386	639 .loc 1 417 3 is_stmt 1 view .LVU171
		1387	417:Core/Src/main.c **** htim3.Init.Period = 10000;
		1388	640 .loc 1 417 26 is_stmt 0 view .LVU172
		1389	641 0024 AC60 str r4, [r5, #8]
		1390	418:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
		1391	642 .loc 1 418 3 is_stmt 1 view .LVU173
		1392	418:Core/Src/main.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
		1393	643 .loc 1 418 21 is_stmt 0 view .LVU174
		1394	644 0026 42F21073 movw r3, #10000
		1395	645 002a EB60 str r3, [r5, #12]
		1396	419:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
		1397	646 .loc 1 419 3 is_stmt 1 view .LVU175
		1398	419:Core/Src/main.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
		1399	647 .loc 1 419 28 is_stmt 0 view .LVU176
		1400	648 002c 2C61 str r4, [r5, #16]
		1401	420:Core/Src/main.c **** if (HAL_TIM_OC_Init(&htim3) != HAL_OK)
		1402	649 .loc 1 420 3 is_stmt 1 view .LVU177
		1403	420:Core/Src/main.c **** if (HAL_TIM_OC_Init(&htim3) != HAL_OK)
		1404	650 .loc 1 420 32 is_stmt 0 view .LVU178
		1405	651 002e AC61 str r4, [r5, #24]
		1406	421:Core/Src/main.c **** {
		1407	652 .loc 1 421 3 is_stmt 1 view .LVU179
		1408	421:Core/Src/main.c **** {
		1409	653 .loc 1 421 7 is_stmt 0 view .LVU180
		1410	654 0030 2846 mov r0, r5
		1411	655 0032 FFF7FEFF bl HAL_TIM_OC_Init
		1412	656 .LVL28:
		1413	425:Core/Src/main.c **** {
		1414	657 .loc 1 425 3 is_stmt 1 view .LVU181
		1415	425:Core/Src/main.c **** {
		1416	658 .loc 1 425 7 is_stmt 0 view .LVU182
		1417	659 0036 0821 movs r1, #8
		1418	660 0038 2846 mov r0, r5
		1419	661 003a FFF7FEFF bl HAL_TIM_OnePulse_Init
		1420	662 .LVL29:
		1421	429:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
		1422	663 .loc 1 429 3 is_stmt 1 view .LVU183
		1423	429:Core/Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
		1424	664 .loc 1 429 37 is_stmt 0 view .LVU184
		1425	665 003e 1023 movs r3, #16
		1426	666 0040 0893 str r3, [sp, #32]
		1427	430:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
		1428	667 .loc 1 430 3 is_stmt 1 view .LVU185
		1429	430:Core/Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
		1430	668 .loc 1 430 33 is_stmt 0 view .LVU186
		1431	669 0042 0994 str r4, [sp, #36]
		1432	431:Core/Src/main.c **** {
		1433	670 .loc 1 431 3 is_stmt 1 view .LVU187
		1434	431:Core/Src/main.c **** {
		1435	671 .loc 1 431 7 is_stmt 0 view .LVU188
		1436	672 0044 08A9 add r1, sp, #32
		1437	673 0046 2846 mov r0, r5
		1438	674 0048 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
		1439	675 .LVL30:
		1440	435:Core/Src/main.c **** sConfigOC.Pulse = 9999;
		1441	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 25
		1442
		1443
		1444	676 .loc 1 435 3 is_stmt 1 view .LVU189
		1445	435:Core/Src/main.c **** sConfigOC.Pulse = 9999;
		1446	677 .loc 1 435 20 is_stmt 0 view .LVU190
		1447	678 004c 0194 str r4, [sp, #4]
		1448	436:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
		1449	679 .loc 1 436 3 is_stmt 1 view .LVU191
		1450	436:Core/Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
		1451	680 .loc 1 436 19 is_stmt 0 view .LVU192
		1452	681 004e 42F20F73 movw r3, #9999
		1453	682 0052 0293 str r3, [sp, #8]
		1454	437:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
		1455	683 .loc 1 437 3 is_stmt 1 view .LVU193
		1456	437:Core/Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
		1457	684 .loc 1 437 24 is_stmt 0 view .LVU194
		1458	685 0054 0394 str r4, [sp, #12]
		1459	438:Core/Src/main.c **** if (HAL_TIM_OC_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
		1460	686 .loc 1 438 3 is_stmt 1 view .LVU195
		1461	438:Core/Src/main.c **** if (HAL_TIM_OC_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
		1462	687 .loc 1 438 24 is_stmt 0 view .LVU196
		1463	688 0056 0594 str r4, [sp, #20]
		1464	439:Core/Src/main.c **** {
		1465	689 .loc 1 439 3 is_stmt 1 view .LVU197
		1466	439:Core/Src/main.c **** {
		1467	690 .loc 1 439 7 is_stmt 0 view .LVU198
		1468	691 0058 2246 mov r2, r4
		1469	692 005a 01A9 add r1, sp, #4
		1470	693 005c 2846 mov r0, r5
		1471	694 005e FFF7FEFF bl HAL_TIM_OC_ConfigChannel
		1472	695 .LVL31:
		1473	447:Core/Src/main.c ****
		1474	696 .loc 1 447 1 view .LVU199
		1475	697 0062 0BB0 add sp, sp, #44
		1476	698 .LCFI19:
		1477	699 .cfi_def_cfa_offset 12
		1478	700 @ sp needed
		1479	701 0064 30BD pop {r4, r5, pc}
		1480	702 .L36:
		1481	703 0066 00BF .align 2
		1482	704 .L35:
		1483	705 0068 00000000 .word htim3
		1484	706 006c 00040040 .word 1073742848
		1485	707 .cfi_endproc
		1486	708 .LFE76:
		1487	710 .section .text.MX_I2C2_Init,"ax",%progbits
		1488	711 .align 1
		1489	712 .syntax unified
		1490	713 .thumb
		1491	714 .thumb_func
		1492	715 .fpu softvfp
		1493	717 MX_I2C2_Init:
		1494	718 .LFB73:
		1495	274:Core/Src/main.c ****
		1496	719 .loc 1 274 1 is_stmt 1 view -0
		1497	720 .cfi_startproc
		1498	721 @ args = 0, pretend = 0, frame = 0
		1499	722 @ frame_needed = 0, uses_anonymous_args = 0
		1500	723 0000 08B5 push {r3, lr}
		1501	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 26
		1502
		1503
		1504	724 .LCFI20:
		1505	725 .cfi_def_cfa_offset 8
		1506	726 .cfi_offset 3, -8
		1507	727 .cfi_offset 14, -4
		1508	283:Core/Src/main.c **** hi2c2.Init.ClockSpeed = 100000;
		1509	728 .loc 1 283 3 view .LVU201
		1510	283:Core/Src/main.c **** hi2c2.Init.ClockSpeed = 100000;
		1511	729 .loc 1 283 18 is_stmt 0 view .LVU202
		1512	730 0002 0948 ldr r0, .L39
		1513	731 0004 094B ldr r3, .L39+4
		1514	732 0006 0360 str r3, [r0]
		1515	284:Core/Src/main.c **** hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
		1516	733 .loc 1 284 3 is_stmt 1 view .LVU203
		1517	284:Core/Src/main.c **** hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
		1518	734 .loc 1 284 25 is_stmt 0 view .LVU204
		1519	735 0008 094B ldr r3, .L39+8
		1520	736 000a 4360 str r3, [r0, #4]
		1521	285:Core/Src/main.c **** hi2c2.Init.OwnAddress1 = 0;
		1522	737 .loc 1 285 3 is_stmt 1 view .LVU205
		1523	285:Core/Src/main.c **** hi2c2.Init.OwnAddress1 = 0;
		1524	738 .loc 1 285 24 is_stmt 0 view .LVU206
		1525	739 000c 0023 movs r3, #0
		1526	740 000e 8360 str r3, [r0, #8]
		1527	286:Core/Src/main.c **** hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
		1528	741 .loc 1 286 3 is_stmt 1 view .LVU207
		1529	286:Core/Src/main.c **** hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
		1530	742 .loc 1 286 26 is_stmt 0 view .LVU208
		1531	743 0010 C360 str r3, [r0, #12]
		1532	287:Core/Src/main.c **** hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
		1533	744 .loc 1 287 3 is_stmt 1 view .LVU209
		1534	287:Core/Src/main.c **** hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
		1535	745 .loc 1 287 29 is_stmt 0 view .LVU210
		1536	746 0012 4FF48042 mov r2, #16384
		1537	747 0016 0261 str r2, [r0, #16]
		1538	288:Core/Src/main.c **** hi2c2.Init.OwnAddress2 = 0;
		1539	748 .loc 1 288 3 is_stmt 1 view .LVU211
		1540	288:Core/Src/main.c **** hi2c2.Init.OwnAddress2 = 0;
		1541	749 .loc 1 288 30 is_stmt 0 view .LVU212
		1542	750 0018 4361 str r3, [r0, #20]
		1543	289:Core/Src/main.c **** hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
		1544	751 .loc 1 289 3 is_stmt 1 view .LVU213
		1545	289:Core/Src/main.c **** hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
		1546	752 .loc 1 289 26 is_stmt 0 view .LVU214
		1547	753 001a 8361 str r3, [r0, #24]
		1548	290:Core/Src/main.c **** hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
		1549	754 .loc 1 290 3 is_stmt 1 view .LVU215
		1550	290:Core/Src/main.c **** hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
		1551	755 .loc 1 290 30 is_stmt 0 view .LVU216
		1552	756 001c C361 str r3, [r0, #28]
		1553	291:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c2) != HAL_OK)
		1554	757 .loc 1 291 3 is_stmt 1 view .LVU217
		1555	291:Core/Src/main.c **** if (HAL_I2C_Init(&hi2c2) != HAL_OK)
		1556	758 .loc 1 291 28 is_stmt 0 view .LVU218
		1557	759 001e 0362 str r3, [r0, #32]
		1558	292:Core/Src/main.c **** {
		1559	760 .loc 1 292 3 is_stmt 1 view .LVU219
		1560	292:Core/Src/main.c **** {
		1561	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 27
		1562
		1563
		1564	761 .loc 1 292 7 is_stmt 0 view .LVU220
		1565	762 0020 FFF7FEFF bl HAL_I2C_Init
		1566	763 .LVL32:
		1567	300:Core/Src/main.c ****
		1568	764 .loc 1 300 1 view .LVU221
		1569	765 0024 08BD pop {r3, pc}
		1570	766 .L40:
		1571	767 0026 00BF .align 2
		1572	768 .L39:
		1573	769 0028 00000000 .word hi2c2
		1574	770 002c 00580040 .word 1073764352
		1575	771 0030 A0860100 .word 100000
		1576	772 .cfi_endproc
		1577	773 .LFE73:
		1578	775 .section .text.MX_RTC_Init,"ax",%progbits
		1579	776 .align 1
		1580	777 .syntax unified
		1581	778 .thumb
		1582	779 .thumb_func
		1583	780 .fpu softvfp
		1584	782 MX_RTC_Init:
		1585	783 .LFB74:
		1586	308:Core/Src/main.c ****
		1587	784 .loc 1 308 1 is_stmt 1 view -0
		1588	785 .cfi_startproc
		1589	786 @ args = 0, pretend = 0, frame = 8
		1590	787 @ frame_needed = 0, uses_anonymous_args = 0
		1591	788 0000 30B5 push {r4, r5, lr}
		1592	789 .LCFI21:
		1593	790 .cfi_def_cfa_offset 12
		1594	791 .cfi_offset 4, -12
		1595	792 .cfi_offset 5, -8
		1596	793 .cfi_offset 14, -4
		1597	794 0002 83B0 sub sp, sp, #12
		1598	795 .LCFI22:
		1599	796 .cfi_def_cfa_offset 24
		1600	314:Core/Src/main.c **** RTC_DateTypeDef DateToUpdate = {0};
		1601	797 .loc 1 314 3 view .LVU223
		1602	314:Core/Src/main.c **** RTC_DateTypeDef DateToUpdate = {0};
		1603	798 .loc 1 314 19 is_stmt 0 view .LVU224
		1604	799 0004 0024 movs r4, #0
		1605	800 0006 ADF80440 strh r4, [sp, #4] @ movhi
		1606	801 000a 8DF80640 strb r4, [sp, #6]
		1607	315:Core/Src/main.c ****
		1608	802 .loc 1 315 3 is_stmt 1 view .LVU225
		1609	315:Core/Src/main.c ****
		1610	803 .loc 1 315 19 is_stmt 0 view .LVU226
		1611	804 000e 0094 str r4, [sp]
		1612	322:Core/Src/main.c **** hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
		1613	805 .loc 1 322 3 is_stmt 1 view .LVU227
		1614	322:Core/Src/main.c **** hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
		1615	806 .loc 1 322 17 is_stmt 0 view .LVU228
		1616	807 0010 124D ldr r5, .L43
		1617	808 0012 134B ldr r3, .L43+4
		1618	809 0014 2B60 str r3, [r5]
		1619	323:Core/Src/main.c **** hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM;
		1620	810 .loc 1 323 3 is_stmt 1 view .LVU229
		1621	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 28
		1622
		1623
		1624	323:Core/Src/main.c **** hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM;
		1625	811 .loc 1 323 26 is_stmt 0 view .LVU230
		1626	812 0016 4FF0FF33 mov r3, #-1
		1627	813 001a 6B60 str r3, [r5, #4]
		1628	324:Core/Src/main.c **** if (HAL_RTC_Init(&hrtc) != HAL_OK)
		1629	814 .loc 1 324 3 is_stmt 1 view .LVU231
		1630	324:Core/Src/main.c **** if (HAL_RTC_Init(&hrtc) != HAL_OK)
		1631	815 .loc 1 324 20 is_stmt 0 view .LVU232
		1632	816 001c 4FF48073 mov r3, #256
		1633	817 0020 AB60 str r3, [r5, #8]
		1634	325:Core/Src/main.c **** {
		1635	818 .loc 1 325 3 is_stmt 1 view .LVU233
		1636	325:Core/Src/main.c **** {
		1637	819 .loc 1 325 7 is_stmt 0 view .LVU234
		1638	820 0022 2846 mov r0, r5
		1639	821 0024 FFF7FEFF bl HAL_RTC_Init
		1640	822 .LVL33:
		1641	336:Core/Src/main.c **** sTime.Minutes = 0x0;
		1642	823 .loc 1 336 3 is_stmt 1 view .LVU235
		1643	336:Core/Src/main.c **** sTime.Minutes = 0x0;
		1644	824 .loc 1 336 15 is_stmt 0 view .LVU236
		1645	825 0028 8DF80440 strb r4, [sp, #4]
		1646	337:Core/Src/main.c **** sTime.Seconds = 0x0;
		1647	826 .loc 1 337 3 is_stmt 1 view .LVU237
		1648	337:Core/Src/main.c **** sTime.Seconds = 0x0;
		1649	827 .loc 1 337 17 is_stmt 0 view .LVU238
		1650	828 002c 8DF80540 strb r4, [sp, #5]
		1651	338:Core/Src/main.c ****
		1652	829 .loc 1 338 3 is_stmt 1 view .LVU239
		1653	338:Core/Src/main.c ****
		1654	830 .loc 1 338 17 is_stmt 0 view .LVU240
		1655	831 0030 8DF80640 strb r4, [sp, #6]
		1656	340:Core/Src/main.c **** {
		1657	832 .loc 1 340 3 is_stmt 1 view .LVU241
		1658	340:Core/Src/main.c **** {
		1659	833 .loc 1 340 7 is_stmt 0 view .LVU242
		1660	834 0034 0122 movs r2, #1
		1661	835 0036 01A9 add r1, sp, #4
		1662	836 0038 2846 mov r0, r5
		1663	837 003a FFF7FEFF bl HAL_RTC_SetTime
		1664	838 .LVL34:
		1665	344:Core/Src/main.c **** DateToUpdate.Month = RTC_MONTH_JANUARY;
		1666	839 .loc 1 344 3 is_stmt 1 view .LVU243
		1667	344:Core/Src/main.c **** DateToUpdate.Month = RTC_MONTH_JANUARY;
		1668	840 .loc 1 344 24 is_stmt 0 view .LVU244
		1669	841 003e 0122 movs r2, #1
		1670	842 0040 8DF80020 strb r2, [sp]
		1671	345:Core/Src/main.c **** DateToUpdate.Date = 0x1;
		1672	843 .loc 1 345 3 is_stmt 1 view .LVU245
		1673	345:Core/Src/main.c **** DateToUpdate.Date = 0x1;
		1674	844 .loc 1 345 22 is_stmt 0 view .LVU246
		1675	845 0044 8DF80120 strb r2, [sp, #1]
		1676	346:Core/Src/main.c **** DateToUpdate.Year = 0x0;
		1677	846 .loc 1 346 3 is_stmt 1 view .LVU247
		1678	346:Core/Src/main.c **** DateToUpdate.Year = 0x0;
		1679	847 .loc 1 346 21 is_stmt 0 view .LVU248
		1680	848 0048 8DF80220 strb r2, [sp, #2]
		1681	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 29
		1682
		1683
		1684	347:Core/Src/main.c ****
		1685	849 .loc 1 347 3 is_stmt 1 view .LVU249
		1686	347:Core/Src/main.c ****
		1687	850 .loc 1 347 21 is_stmt 0 view .LVU250
		1688	851 004c 8DF80340 strb r4, [sp, #3]
		1689	349:Core/Src/main.c **** {
		1690	852 .loc 1 349 3 is_stmt 1 view .LVU251
		1691	349:Core/Src/main.c **** {
		1692	853 .loc 1 349 7 is_stmt 0 view .LVU252
		1693	854 0050 6946 mov r1, sp
		1694	855 0052 2846 mov r0, r5
		1695	856 0054 FFF7FEFF bl HAL_RTC_SetDate
		1696	857 .LVL35:
		1697	357:Core/Src/main.c ****
		1698	858 .loc 1 357 1 view .LVU253
		1699	859 0058 03B0 add sp, sp, #12
		1700	860 .LCFI23:
		1701	861 .cfi_def_cfa_offset 12
		1702	862 @ sp needed
		1703	863 005a 30BD pop {r4, r5, pc}
		1704	864 .L44:
		1705	865 .align 2
		1706	866 .L43:
		1707	867 005c 00000000 .word hrtc
		1708	868 0060 00280040 .word 1073752064
		1709	869 .cfi_endproc
		1710	870 .LFE74:
		1711	872 .section .text.SystemClock_Config,"ax",%progbits
		1712	873 .align 1
		1713	874 .global SystemClock_Config
		1714	875 .syntax unified
		1715	876 .thumb
		1716	877 .thumb_func
		1717	878 .fpu softvfp
		1718	880 SystemClock_Config:
		1719	881 .LFB72:
		1720	226:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
		1721	882 .loc 1 226 1 is_stmt 1 view -0
		1722	883 .cfi_startproc
		1723	884 @ args = 0, pretend = 0, frame = 80
		1724	885 @ frame_needed = 0, uses_anonymous_args = 0
		1725	886 0000 30B5 push {r4, r5, lr}
		1726	887 .LCFI24:
		1727	888 .cfi_def_cfa_offset 12
		1728	889 .cfi_offset 4, -12
		1729	890 .cfi_offset 5, -8
		1730	891 .cfi_offset 14, -4
		1731	892 0002 95B0 sub sp, sp, #84
		1732	893 .LCFI25:
		1733	894 .cfi_def_cfa_offset 96
		1734	227:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
		1735	895 .loc 1 227 3 view .LVU255
		1736	227:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
		1737	896 .loc 1 227 22 is_stmt 0 view .LVU256
		1738	897 0004 0024 movs r4, #0
		1739	898 0006 0C94 str r4, [sp, #48]
		1740	899 0008 0F94 str r4, [sp, #60]
		1741	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 30
		1742
		1743
		1744	900 000a 1094 str r4, [sp, #64]
		1745	228:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
		1746	901 .loc 1 228 3 is_stmt 1 view .LVU257
		1747	228:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
		1748	902 .loc 1 228 22 is_stmt 0 view .LVU258
		1749	903 000c 0594 str r4, [sp, #20]
		1750	904 000e 0694 str r4, [sp, #24]
		1751	905 0010 0794 str r4, [sp, #28]
		1752	906 0012 0894 str r4, [sp, #32]
		1753	907 0014 0994 str r4, [sp, #36]
		1754	229:Core/Src/main.c ****
		1755	908 .loc 1 229 3 is_stmt 1 view .LVU259
		1756	229:Core/Src/main.c ****
		1757	909 .loc 1 229 28 is_stmt 0 view .LVU260
		1758	910 0016 0194 str r4, [sp, #4]
		1759	911 0018 0294 str r4, [sp, #8]
		1760	912 001a 0394 str r4, [sp, #12]
		1761	913 001c 0494 str r4, [sp, #16]
		1762	234:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
		1763	914 .loc 1 234 3 is_stmt 1 view .LVU261
		1764	234:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
		1765	915 .loc 1 234 36 is_stmt 0 view .LVU262
		1766	916 001e 0523 movs r3, #5
		1767	917 0020 0A93 str r3, [sp, #40]
		1768	235:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
		1769	918 .loc 1 235 3 is_stmt 1 view .LVU263
		1770	235:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
		1771	919 .loc 1 235 30 is_stmt 0 view .LVU264
		1772	920 0022 4FF48033 mov r3, #65536
		1773	921 0026 0B93 str r3, [sp, #44]
		1774	236:Core/Src/main.c **** RCC_OscInitStruct.LSEState = RCC_LSE_ON;
		1775	922 .loc 1 236 3 is_stmt 1 view .LVU265
		1776	237:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON;
		1777	923 .loc 1 237 3 view .LVU266
		1778	237:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON;
		1779	924 .loc 1 237 30 is_stmt 0 view .LVU267
		1780	925 0028 0122 movs r2, #1
		1781	926 002a 0D92 str r2, [sp, #52]
		1782	238:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
		1783	927 .loc 1 238 3 is_stmt 1 view .LVU268
		1784	238:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
		1785	928 .loc 1 238 30 is_stmt 0 view .LVU269
		1786	929 002c 0E92 str r2, [sp, #56]
		1787	239:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
		1788	930 .loc 1 239 3 is_stmt 1 view .LVU270
		1789	239:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
		1790	931 .loc 1 239 34 is_stmt 0 view .LVU271
		1791	932 002e 0225 movs r5, #2
		1792	933 0030 1195 str r5, [sp, #68]
		1793	240:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
		1794	934 .loc 1 240 3 is_stmt 1 view .LVU272
		1795	240:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
		1796	935 .loc 1 240 35 is_stmt 0 view .LVU273
		1797	936 0032 1293 str r3, [sp, #72]
		1798	241:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
		1799	937 .loc 1 241 3 is_stmt 1 view .LVU274
		1800	241:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
		1801	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 31
		1802
		1803
		1804	938 .loc 1 241 32 is_stmt 0 view .LVU275
		1805	939 0034 4FF4E013 mov r3, #1835008
		1806	940 0038 1393 str r3, [sp, #76]
		1807	242:Core/Src/main.c **** {
		1808	941 .loc 1 242 3 is_stmt 1 view .LVU276
		1809	242:Core/Src/main.c **** {
		1810	942 .loc 1 242 7 is_stmt 0 view .LVU277
		1811	943 003a 0AA8 add r0, sp, #40
		1812	944 003c FFF7FEFF bl HAL_RCC_OscConfig
		1813	945 .LVL36:
		1814	248:Core/Src/main.c **** \|RCC_CLOCKTYPE_PCLK1\|RCC_CLOCKTYPE_PCLK2;
		1815	946 .loc 1 248 3 is_stmt 1 view .LVU278
		1816	248:Core/Src/main.c **** \|RCC_CLOCKTYPE_PCLK1\|RCC_CLOCKTYPE_PCLK2;
		1817	947 .loc 1 248 31 is_stmt 0 view .LVU279
		1818	948 0040 0F23 movs r3, #15
		1819	949 0042 0593 str r3, [sp, #20]
		1820	250:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
		1821	950 .loc 1 250 3 is_stmt 1 view .LVU280
		1822	250:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
		1823	951 .loc 1 250 34 is_stmt 0 view .LVU281
		1824	952 0044 0695 str r5, [sp, #24]
		1825	251:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
		1826	953 .loc 1 251 3 is_stmt 1 view .LVU282
		1827	251:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
		1828	954 .loc 1 251 35 is_stmt 0 view .LVU283
		1829	955 0046 0794 str r4, [sp, #28]
		1830	252:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
		1831	956 .loc 1 252 3 is_stmt 1 view .LVU284
		1832	252:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
		1833	957 .loc 1 252 36 is_stmt 0 view .LVU285
		1834	958 0048 4FF48063 mov r3, #1024
		1835	959 004c 0893 str r3, [sp, #32]
		1836	253:Core/Src/main.c ****
		1837	960 .loc 1 253 3 is_stmt 1 view .LVU286
		1838	253:Core/Src/main.c ****
		1839	961 .loc 1 253 36 is_stmt 0 view .LVU287
		1840	962 004e 0994 str r4, [sp, #36]
		1841	255:Core/Src/main.c **** {
		1842	963 .loc 1 255 3 is_stmt 1 view .LVU288
		1843	255:Core/Src/main.c **** {
		1844	964 .loc 1 255 7 is_stmt 0 view .LVU289
		1845	965 0050 2946 mov r1, r5
		1846	966 0052 05A8 add r0, sp, #20
		1847	967 0054 FFF7FEFF bl HAL_RCC_ClockConfig
		1848	968 .LVL37:
		1849	259:Core/Src/main.c **** PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
		1850	969 .loc 1 259 3 is_stmt 1 view .LVU290
		1851	259:Core/Src/main.c **** PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
		1852	970 .loc 1 259 38 is_stmt 0 view .LVU291
		1853	971 0058 1123 movs r3, #17
		1854	972 005a 0193 str r3, [sp, #4]
		1855	260:Core/Src/main.c **** PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
		1856	973 .loc 1 260 3 is_stmt 1 view .LVU292
		1857	260:Core/Src/main.c **** PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
		1858	974 .loc 1 260 35 is_stmt 0 view .LVU293
		1859	975 005c 4FF48073 mov r3, #256
		1860	976 0060 0293 str r3, [sp, #8]
		1861	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 32
		1862
		1863
		1864	261:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
		1865	977 .loc 1 261 3 is_stmt 1 view .LVU294
		1866	261:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
		1867	978 .loc 1 261 35 is_stmt 0 view .LVU295
		1868	979 0062 0494 str r4, [sp, #16]
		1869	262:Core/Src/main.c **** {
		1870	980 .loc 1 262 3 is_stmt 1 view .LVU296
		1871	262:Core/Src/main.c **** {
		1872	981 .loc 1 262 7 is_stmt 0 view .LVU297
		1873	982 0064 01A8 add r0, sp, #4
		1874	983 0066 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
		1875	984 .LVL38:
		1876	266:Core/Src/main.c ****
		1877	985 .loc 1 266 1 view .LVU298
		1878	986 006a 15B0 add sp, sp, #84
		1879	987 .LCFI26:
		1880	988 .cfi_def_cfa_offset 12
		1881	989 @ sp needed
		1882	990 006c 30BD pop {r4, r5, pc}
		1883	991 .cfi_endproc
		1884	992 .LFE72:
		1885	994 .section .text.main,"ax",%progbits
		1886	995 .align 1
		1887	996 .global main
		1888	997 .syntax unified
		1889	998 .thumb
		1890	999 .thumb_func
		1891	1000 .fpu softvfp
		1892	1002 main:
		1893	1003 .LFB71:
		1894	128:Core/Src/main.c **** /* USER CODE BEGIN 1 */
		1895	1004 .loc 1 128 1 is_stmt 1 view -0
		1896	1005 .cfi_startproc
		1897	1006 @ Volatile: function does not return.
		1898	1007 @ args = 0, pretend = 0, frame = 0
		1899	1008 @ frame_needed = 0, uses_anonymous_args = 0
		1900	1009 0000 80B5 push {r7, lr}
		1901	1010 .LCFI27:
		1902	1011 .cfi_def_cfa_offset 8
		1903	1012 .cfi_offset 7, -8
		1904	1013 .cfi_offset 14, -4
		1905	136:Core/Src/main.c ****
		1906	1014 .loc 1 136 3 view .LVU300
		1907	1015 0002 FFF7FEFF bl HAL_Init
		1908	1016 .LVL39:
		1909	143:Core/Src/main.c ****
		1910	1017 .loc 1 143 3 view .LVU301
		1911	1018 0006 FFF7FEFF bl SystemClock_Config
		1912	1019 .LVL40:
		1913	150:Core/Src/main.c **** MX_SPI1_Init();
		1914	1020 .loc 1 150 3 view .LVU302
		1915	1021 000a FFF7FEFF bl MX_GPIO_Init
		1916	1022 .LVL41:
		1917	151:Core/Src/main.c **** MX_TIM4_Init();
		1918	1023 .loc 1 151 3 view .LVU303
		1919	1024 000e FFF7FEFF bl MX_SPI1_Init
		1920	1025 .LVL42:
		1921	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 33
		1922
		1923
		1924	152:Core/Src/main.c **** MX_USART1_UART_Init();
		1925	1026 .loc 1 152 3 view .LVU304
		1926	1027 0012 FFF7FEFF bl MX_TIM4_Init
		1927	1028 .LVL43:
		1928	153:Core/Src/main.c **** MX_TIM3_Init();
		1929	1029 .loc 1 153 3 view .LVU305
		1930	1030 0016 FFF7FEFF bl MX_USART1_UART_Init
		1931	1031 .LVL44:
		1932	154:Core/Src/main.c **** MX_I2C2_Init();
		1933	1032 .loc 1 154 3 view .LVU306
		1934	1033 001a FFF7FEFF bl MX_TIM3_Init
		1935	1034 .LVL45:
		1936	155:Core/Src/main.c **** MX_RTC_Init();
		1937	1035 .loc 1 155 3 view .LVU307
		1938	1036 001e FFF7FEFF bl MX_I2C2_Init
		1939	1037 .LVL46:
		1940	156:Core/Src/main.c **** MX_USB_DEVICE_Init();
		1941	1038 .loc 1 156 3 view .LVU308
		1942	1039 0022 FFF7FEFF bl MX_RTC_Init
		1943	1040 .LVL47:
		1944	157:Core/Src/main.c **** /* USER CODE BEGIN 2 */
		1945	1041 .loc 1 157 3 view .LVU309
		1946	1042 0026 FFF7FEFF bl MX_USB_DEVICE_Init
		1947	1043 .LVL48:
		1948	160:Core/Src/main.c **** HAL_Delay (1000);
		1949	1044 .loc 1 160 3 view .LVU310
		1950	1045 002a 1E4C ldr r4, .L50
		1951	1046 002c 0022 movs r2, #0
		1952	1047 002e 1021 movs r1, #16
		1953	1048 0030 2046 mov r0, r4
		1954	1049 0032 FFF7FEFF bl HAL_GPIO_WritePin
		1955	1050 .LVL49:
		1956	161:Core/Src/main.c **** HAL_GPIO_WritePin ( USB_PULLUP_GPIO_Port, USB_PULLUP_Pin, GPIO_PIN_SET);
		1957	1051 .loc 1 161 3 view .LVU311
		1958	1052 0036 4FF47A70 mov r0, #1000
		1959	1053 003a FFF7FEFF bl HAL_Delay
		1960	1054 .LVL50:
		1961	162:Core/Src/main.c ****
		1962	1055 .loc 1 162 3 view .LVU312
		1963	1056 003e 0122 movs r2, #1
		1964	1057 0040 1021 movs r1, #16
		1965	1058 0042 2046 mov r0, r4
		1966	1059 0044 FFF7FEFF bl HAL_GPIO_WritePin
		1967	1060 .LVL51:
		1968	165:Core/Src/main.c ****
		1969	1061 .loc 1 165 3 view .LVU313
		1970	1062 0048 174C ldr r4, .L50+4
		1971	1063 004a 1849 ldr r1, .L50+8
		1972	1064 004c 2046 mov r0, r4
		1973	1065 004e FFF7FEFF bl init_usart_ctl
		1974	1066 .LVL52:
		1975	167:Core/Src/main.c ****
		1976	1067 .loc 1 167 3 view .LVU314
		1977	1068 0052 2046 mov r0, r4
		1978	1069 0054 FFF7FEFF bl EnableSerialRxInterrupt
		1979	1070 .LVL53:
		1980	171:Core/Src/main.c **** // print_rslt(" bmp280_init status", rslt);
		1981	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 34
		1982
		1983
		1984	1071 .loc 1 171 3 view .LVU315
		1985	171:Core/Src/main.c **** // print_rslt(" bmp280_init status", rslt);
		1986	1072 .loc 1 171 10 is_stmt 0 view .LVU316
		1987	1073 0058 154E ldr r6, .L50+12
		1988	1074 005a 3046 mov r0, r6
		1989	1075 005c FFF7FEFF bl bmp280_init
		1990	1076 .LVL54:
		1991	171:Core/Src/main.c **** // print_rslt(" bmp280_init status", rslt);
		1992	1077 .loc 1 171 8 view .LVU317
		1993	1078 0060 144D ldr r5, .L50+16
		1994	1079 0062 2870 strb r0, [r5]
		1995	177:Core/Src/main.c **** // print_rslt(" bmp280_get_config status", rslt);
		1996	1080 .loc 1 177 3 is_stmt 1 view .LVU318
		1997	177:Core/Src/main.c **** // print_rslt(" bmp280_get_config status", rslt);
		1998	1081 .loc 1 177 10 is_stmt 0 view .LVU319
		1999	1082 0064 144C ldr r4, .L50+20
		2000	1083 0066 3146 mov r1, r6
		2001	1084 0068 2046 mov r0, r4
		2002	1085 006a FFF7FEFF bl bmp280_get_config
		2003	1086 .LVL55:
		2004	177:Core/Src/main.c **** // print_rslt(" bmp280_get_config status", rslt);
		2005	1087 .loc 1 177 8 view .LVU320
		2006	1088 006e 2870 strb r0, [r5]
		2007	182:Core/Src/main.c ****
		2008	1089 .loc 1 182 3 is_stmt 1 view .LVU321
		2009	182:Core/Src/main.c ****
		2010	1090 .loc 1 182 15 is_stmt 0 view .LVU322
		2011	1091 0070 0123 movs r3, #1
		2012	1092 0072 E370 strb r3, [r4, #3]
		2013	185:Core/Src/main.c ****
		2014	1093 .loc 1 185 3 is_stmt 1 view .LVU323
		2015	185:Core/Src/main.c ****
		2016	1094 .loc 1 185 16 is_stmt 0 view .LVU324
		2017	1095 0074 0327 movs r7, #3
		2018	1096 0076 2770 strb r7, [r4]
		2019	188:Core/Src/main.c ****
		2020	1097 .loc 1 188 3 is_stmt 1 view .LVU325
		2021	188:Core/Src/main.c ****
		2022	1098 .loc 1 188 16 is_stmt 0 view .LVU326
		2023	1099 0078 6770 strb r7, [r4, #1]
		2024	191:Core/Src/main.c **** rslt = bmp280_set_config(&conf, &bmp);
		2025	1100 .loc 1 191 3 is_stmt 1 view .LVU327
		2026	191:Core/Src/main.c **** rslt = bmp280_set_config(&conf, &bmp);
		2027	1101 .loc 1 191 12 is_stmt 0 view .LVU328
		2028	1102 007a 0423 movs r3, #4
		2029	1103 007c A370 strb r3, [r4, #2]
		2030	192:Core/Src/main.c **** //print_rslt(" bmp280_set_config status", rslt);
		2031	1104 .loc 1 192 3 is_stmt 1 view .LVU329
		2032	192:Core/Src/main.c **** //print_rslt(" bmp280_set_config status", rslt);
		2033	1105 .loc 1 192 10 is_stmt 0 view .LVU330
		2034	1106 007e 3146 mov r1, r6
		2035	1107 0080 2046 mov r0, r4
		2036	1108 0082 FFF7FEFF bl bmp280_set_config
		2037	1109 .LVL56:
		2038	192:Core/Src/main.c **** //print_rslt(" bmp280_set_config status", rslt);
		2039	1110 .loc 1 192 8 view .LVU331
		2040	1111 0086 2870 strb r0, [r5]
		2041	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 35
		2042
		2043
		2044	196:Core/Src/main.c **** //print_rslt(" bmp280_set_power_mode status", rslt);
		2045	1112 .loc 1 196 3 is_stmt 1 view .LVU332
		2046	196:Core/Src/main.c **** //print_rslt(" bmp280_set_power_mode status", rslt);
		2047	1113 .loc 1 196 10 is_stmt 0 view .LVU333
		2048	1114 0088 3146 mov r1, r6
		2049	1115 008a 3846 mov r0, r7
		2050	1116 008c FFF7FEFF bl bmp280_set_power_mode
		2051	1117 .LVL57:
		2052	196:Core/Src/main.c **** //print_rslt(" bmp280_set_power_mode status", rslt);
		2053	1118 .loc 1 196 8 view .LVU334
		2054	1119 0090 2870 strb r0, [r5]
		2055	201:Core/Src/main.c **** /* USER CODE END 2 */
		2056	1120 .loc 1 201 3 is_stmt 1 view .LVU335
		2057	1121 0092 FFF7FEFF bl cc_init
		2058	1122 .LVL58:
		2059	1123 .L48:
		2060	206:Core/Src/main.c **** {
		2061	1124 .loc 1 206 3 discriminator 1 view .LVU336
		2062	208:Core/Src/main.c ****
		2063	1125 .loc 1 208 7 discriminator 1 view .LVU337
		2064	1126 0096 0648 ldr r0, .L50+12
		2065	1127 0098 FFF7FEFF bl cc_run
		2066	1128 .LVL59:
		2067	212:Core/Src/main.c ****
		2068	1129 .loc 1 212 7 discriminator 1 view .LVU338
		2069	1130 009c 3220 movs r0, #50
		2070	1131 009e FFF7FEFF bl HAL_Delay
		2071	1132 .LVL60:
		2072	1133 00a2 F8E7 b .L48
		2073	1134 .L51:
		2074	1135 .align 2
		2075	1136 .L50:
		2076	1137 00a4 000C0140 .word 1073810432
		2077	1138 00a8 00000000 .word uc1
		2078	1139 00ac 00000000 .word huart1
		2079	1140 00b0 00000000 .word .LANCHOR0
		2080	1141 00b4 00000000 .word rslt
		2081	1142 00b8 00000000 .word conf
		2082	1143 .cfi_endproc
		2083	1144 .LFE71:
		2084	1146 .section .text.Error_Handler,"ax",%progbits
		2085	1147 .align 1
		2086	1148 .global Error_Handler
		2087	1149 .syntax unified
		2088	1150 .thumb
		2089	1151 .thumb_func
		2090	1152 .fpu softvfp
		2091	1154 Error_Handler:
		2092	1155 .LFB80:
		2093	567:Core/Src/main.c ****
		2094	568:Core/Src/main.c **** /* USER CODE BEGIN 4 */
		2095	569:Core/Src/main.c ****
		2096	570:Core/Src/main.c **** /* USER CODE END 4 */
		2097	571:Core/Src/main.c ****
		2098	572:Core/Src/main.c ** /
		2099	573:Core/Src/main.c **** * @brief This function is executed in case of error occurrence.
		2100	574:Core/Src/main.c **** * @retval None
		2101	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 36
		2102
		2103
		2104	575:Core/Src/main.c **** */
		2105	576:Core/Src/main.c **** void Error_Handler(void)
		2106	577:Core/Src/main.c **** {
		2107	1156 .loc 1 577 1 view -0
		2108	1157 .cfi_startproc
		2109	1158 @ args = 0, pretend = 0, frame = 0
		2110	1159 @ frame_needed = 0, uses_anonymous_args = 0
		2111	1160 @ link register save eliminated.
		2112	578:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */
		2113	579:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */
		2114	580:Core/Src/main.c ****
		2115	581:Core/Src/main.c **** /* USER CODE END Error_Handler_Debug */
		2116	582:Core/Src/main.c **** }
		2117	1161 .loc 1 582 1 view .LVU340
		2118	1162 0000 7047 bx lr
		2119	1163 .cfi_endproc
		2120	1164 .LFE80:
		2121	1166 .comm conf,5,4
		2122	1167 .comm rslt,1,1
		2123	1168 .global bmp
		2124	1169 .comm huart1,64,4
		2125	1170 .comm htim4,64,4
		2126	1171 .comm htim3,64,4
		2127	1172 .comm hspi1,88,4
		2128	1173 .comm hrtc,20,4
		2129	1174 .comm hi2c2,84,4
		2130	1175 .section .data.bmp,"aw"
		2131	1176 .align 2
		2132	1177 .set .LANCHOR0,. + 0
		2133	1180 bmp:
		2134	1181 0000 00 .space 1
		2135	1182 0001 76 .byte 118
		2136	1183 0002 01 .byte 1
		2137	1184 0003 00 .space 1
		2138	1185 0004 00000000 .word user_i2c_read
		2139	1186 0008 00000000 .word user_i2c_write
		2140	1187 000c 00000000 .word user_delay_ms
		2141	1188 0010 00000000 .space 36
		2142	1188 00000000
		2143	1188 00000000
		2144	1188 00000000
		2145	1188 00000000
		2146	1189 .text
		2147	1190 .Letext0:
		2148	1191 .file 2 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.7
		2149	1192 .file 3 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.7
		2150	1193 .file 4 "Drivers/CMSIS/Include/core_cm3.h"
		2151	1194 .file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
		2152	1195 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h"
		2153	1196 .file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h"
		2154	1197 .file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h"
		2155	1198 .file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h"
		2156	1199 .file 10 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h"
		2157	1200 .file 11 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h"
		2158	1201 .file 12 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h"
		2159	1202 .file 13 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rtc.h"
		2160	1203 .file 14 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h"
		2161	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 37
		2162
		2163
		2164	1204 .file 15 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h"
		2165	1205 .file 16 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h"
		2166	1206 .file 17 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
		2167	1207 .file 18 "Core/Inc/main.h"
		2168	1208 .file 19 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
		2169	1209 .file 20 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
		2170	1210 .file 21 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
		2171	1211 .file 22 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
		2172	1212 .file 23 "c:\\users\\mike\\appdata\\roaming\\xpacks\\@gnu-mcu-eclipse\\arm-none-eabi-gcc\\8.2.1-1.
		2173	1213 .file 24 "../libSerial/inc/libSerial/serial.h"
		2174	1214 .file 25 "../libBMP280/inc/libBMP280/bmp280_defs.h"
		2175	1215 .file 26 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h"
		2176	1216 .file 27 "USB_DEVICE/App/usb_device.h"
		2177	1217 .file 28 "../libBMP280/inc/libBMP280/bmp280.h"
		2178	1218 .file 29 "inc/display.h"
		2179	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 38
		2180
		2181
		2182	DEFINED SYMBOLS
		2183	ABS:0000000000000000 main.c
		2184	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:16 .text.user_delay_ms:0000000000000000 $t
		2185	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:23 .text.user_delay_ms:0000000000000000 user_delay_ms
		2186	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:46 .text.user_i2c_write:0000000000000000 $t
		2187	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:52 .text.user_i2c_write:0000000000000000 user_i2c_write
		2188	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:114 .text.user_i2c_write:000000000000002c $d
		2189	COM:0000000000000054 hi2c2
		2190	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:119 .text.user_i2c_read:0000000000000000 $t
		2191	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:125 .text.user_i2c_read:0000000000000000 user_i2c_read
		2192	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:187 .text.user_i2c_read:000000000000002c $d
		2193	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:192 .text.MX_GPIO_Init:0000000000000000 $t
		2194	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:198 .text.MX_GPIO_Init:0000000000000000 MX_GPIO_Init
		2195	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:341 .text.MX_GPIO_Init:00000000000000a4 $d
		2196	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:348 .text.MX_SPI1_Init:0000000000000000 $t
		2197	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:354 .text.MX_SPI1_Init:0000000000000000 MX_SPI1_Init
		2198	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:420 .text.MX_SPI1_Init:000000000000003c $d
		2199	COM:0000000000000058 hspi1
		2200	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:426 .text.MX_TIM4_Init:0000000000000000 $t
		2201	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:432 .text.MX_TIM4_Init:0000000000000000 MX_TIM4_Init
		2202	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:528 .text.MX_TIM4_Init:0000000000000050 $d
		2203	COM:0000000000000040 htim4
		2204	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:534 .text.MX_USART1_UART_Init:0000000000000000 $t
		2205	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:540 .text.MX_USART1_UART_Init:0000000000000000 MX_USART1_UART_Init
		2206	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:589 .text.MX_USART1_UART_Init:0000000000000024 $d
		2207	COM:0000000000000040 huart1
		2208	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:595 .text.MX_TIM3_Init:0000000000000000 $t
		2209	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:601 .text.MX_TIM3_Init:0000000000000000 MX_TIM3_Init
		2210	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:705 .text.MX_TIM3_Init:0000000000000068 $d
		2211	COM:0000000000000040 htim3
		2212	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:711 .text.MX_I2C2_Init:0000000000000000 $t
		2213	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:717 .text.MX_I2C2_Init:0000000000000000 MX_I2C2_Init
		2214	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:769 .text.MX_I2C2_Init:0000000000000028 $d
		2215	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:776 .text.MX_RTC_Init:0000000000000000 $t
		2216	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:782 .text.MX_RTC_Init:0000000000000000 MX_RTC_Init
		2217	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:867 .text.MX_RTC_Init:000000000000005c $d
		2218	COM:0000000000000014 hrtc
		2219	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:873 .text.SystemClock_Config:0000000000000000 $t
		2220	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:880 .text.SystemClock_Config:0000000000000000 SystemClock_Config
		2221	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:995 .text.main:0000000000000000 $t
		2222	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:1002 .text.main:0000000000000000 main
		2223	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:1137 .text.main:00000000000000a4 $d
		2224	COM:0000000000000001 rslt
		2225	COM:0000000000000005 conf
		2226	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:1147 .text.Error_Handler:0000000000000000 $t
		2227	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:1154 .text.Error_Handler:0000000000000000 Error_Handler
		2228	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:1180 .data.bmp:0000000000000000 bmp
		2229	C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s:1176 .data.bmp:0000000000000000 $d
		2230
		2231	UNDEFINED SYMBOLS
		2232	HAL_Delay
		2233	HAL_I2C_Mem_Write
		2234	HAL_I2C_Mem_Read
		2235	HAL_GPIO_WritePin
		2236	HAL_GPIO_Init
		2237	HAL_SPI_Init
		2238	HAL_TIM_Encoder_Init
		2239	ARM GAS C:\Users\mike\AppData\Local\Temp\ccQ2mrgm.s page 39
		2240
		2241
		2242	HAL_TIMEx_MasterConfigSynchronization
		2243	HAL_UART_Init
		2244	HAL_TIM_OC_Init
		2245	HAL_TIM_OnePulse_Init
		2246	HAL_TIM_OC_ConfigChannel
		2247	HAL_I2C_Init
		2248	HAL_RTC_Init
		2249	HAL_RTC_SetTime
		2250	HAL_RTC_SetDate
		2251	HAL_RCC_OscConfig
		2252	HAL_RCC_ClockConfig
		2253	HAL_RCCEx_PeriphCLKConfig
		2254	HAL_Init
		2255	MX_USB_DEVICE_Init
		2256	init_usart_ctl
		2257	EnableSerialRxInterrupt
		2258	bmp280_init
		2259	bmp280_get_config
		2260	bmp280_set_config
		2261	bmp280_set_power_mode
		2262	cc_init
		2263	cc_run
		2264	uc1

Subversion Repositories dashGPS

(root)/branches/dashGPS-bmp/build/main.lst – Rev 18