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2 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32f1xx_hal_tim_ex.c |
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4 | * @author MCD Application Team |
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5 | * @brief TIM HAL module driver. |
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6 | * This file provides firmware functions to manage the following |
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7 | * functionalities of the Timer Extended peripheral: |
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8 | * + Time Hall Sensor Interface Initialization |
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9 | * + Time Hall Sensor Interface Start |
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10 | * + Time Complementary signal break and dead time configuration |
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11 | * + Time Master and Slave synchronization configuration |
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12 | * + Timer remapping capabilities configuration |
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13 | @verbatim |
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14 | ============================================================================== |
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15 | ##### TIMER Extended features ##### |
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16 | ============================================================================== |
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17 | [..] |
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18 | The Timer Extended features include: |
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19 | (#) Complementary outputs with programmable dead-time for : |
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20 | (++) Output Compare |
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21 | (++) PWM generation (Edge and Center-aligned Mode) |
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22 | (++) One-pulse mode output |
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23 | (#) Synchronization circuit to control the timer with external signals and to |
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24 | interconnect several timers together. |
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25 | (#) Break input to put the timer output signals in reset state or in a known state. |
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26 | (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for |
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27 | positioning purposes |
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28 | |||
29 | ##### How to use this driver ##### |
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30 | ============================================================================== |
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31 | [..] |
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32 | (#) Initialize the TIM low level resources by implementing the following functions |
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33 | depending on the selected feature: |
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34 | (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit() |
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35 | |||
36 | (#) Initialize the TIM low level resources : |
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37 | (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); |
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38 | (##) TIM pins configuration |
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39 | (+++) Enable the clock for the TIM GPIOs using the following function: |
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40 | __HAL_RCC_GPIOx_CLK_ENABLE(); |
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41 | (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); |
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42 | |||
43 | (#) The external Clock can be configured, if needed (the default clock is the |
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44 | internal clock from the APBx), using the following function: |
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45 | HAL_TIM_ConfigClockSource, the clock configuration should be done before |
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46 | any start function. |
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47 | |||
48 | (#) Configure the TIM in the desired functioning mode using one of the |
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49 | initialization function of this driver: |
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50 | (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the |
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51 | Timer Hall Sensor Interface and the commutation event with the corresponding |
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52 | Interrupt and DMA request if needed (Note that One Timer is used to interface |
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53 | with the Hall sensor Interface and another Timer should be used to use |
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54 | the commutation event). |
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55 | |||
56 | (#) Activate the TIM peripheral using one of the start functions: |
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57 | (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT() |
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58 | (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT() |
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59 | (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT() |
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60 | (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT(). |
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61 | |||
62 | @endverbatim |
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63 | ****************************************************************************** |
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64 | * @attention |
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65 | * |
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66 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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67 | * All rights reserved.</center></h2> |
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68 | * |
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69 | * This software component is licensed by ST under BSD 3-Clause license, |
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70 | * the "License"; You may not use this file except in compliance with the |
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71 | * License. You may obtain a copy of the License at: |
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72 | * opensource.org/licenses/BSD-3-Clause |
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73 | * |
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74 | ****************************************************************************** |
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75 | */ |
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76 | |||
77 | /* Includes ------------------------------------------------------------------*/ |
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78 | #include "stm32f1xx_hal.h" |
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79 | |||
80 | /** @addtogroup STM32F1xx_HAL_Driver |
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81 | * @{ |
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82 | */ |
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83 | |||
84 | /** @defgroup TIMEx TIMEx |
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85 | * @brief TIM Extended HAL module driver |
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86 | * @{ |
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87 | */ |
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88 | |||
89 | #ifdef HAL_TIM_MODULE_ENABLED |
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90 | |||
91 | /* Private typedef -----------------------------------------------------------*/ |
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92 | /* Private define ------------------------------------------------------------*/ |
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93 | /* Private macro -------------------------------------------------------------*/ |
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94 | /* Private variables ---------------------------------------------------------*/ |
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95 | /* Private function prototypes -----------------------------------------------*/ |
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96 | static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState); |
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97 | |||
98 | /* Exported functions --------------------------------------------------------*/ |
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99 | /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions |
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100 | * @{ |
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101 | */ |
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102 | |||
103 | /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions |
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104 | * @brief Timer Hall Sensor functions |
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105 | * |
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106 | @verbatim |
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107 | ============================================================================== |
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108 | ##### Timer Hall Sensor functions ##### |
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109 | ============================================================================== |
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110 | [..] |
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111 | This section provides functions allowing to: |
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112 | (+) Initialize and configure TIM HAL Sensor. |
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113 | (+) De-initialize TIM HAL Sensor. |
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114 | (+) Start the Hall Sensor Interface. |
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115 | (+) Stop the Hall Sensor Interface. |
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116 | (+) Start the Hall Sensor Interface and enable interrupts. |
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117 | (+) Stop the Hall Sensor Interface and disable interrupts. |
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118 | (+) Start the Hall Sensor Interface and enable DMA transfers. |
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119 | (+) Stop the Hall Sensor Interface and disable DMA transfers. |
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120 | |||
121 | @endverbatim |
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122 | * @{ |
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123 | */ |
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124 | /** |
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125 | * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle. |
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126 | * @param htim TIM Hall Sensor Interface handle |
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127 | * @param sConfig TIM Hall Sensor configuration structure |
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128 | * @retval HAL status |
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129 | */ |
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130 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig) |
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131 | { |
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132 | TIM_OC_InitTypeDef OC_Config; |
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133 | |||
134 | /* Check the TIM handle allocation */ |
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135 | if (htim == NULL) |
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136 | { |
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137 | return HAL_ERROR; |
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138 | } |
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139 | |||
140 | /* Check the parameters */ |
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141 | assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); |
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142 | assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); |
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143 | assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); |
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144 | assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); |
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145 | assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); |
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146 | assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); |
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147 | assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); |
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148 | |||
149 | if (htim->State == HAL_TIM_STATE_RESET) |
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150 | { |
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151 | /* Allocate lock resource and initialize it */ |
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152 | htim->Lock = HAL_UNLOCKED; |
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153 | |||
154 | #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) |
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155 | /* Reset interrupt callbacks to legacy week callbacks */ |
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156 | TIM_ResetCallback(htim); |
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157 | |||
158 | if (htim->HallSensor_MspInitCallback == NULL) |
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159 | { |
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160 | htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; |
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161 | } |
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162 | /* Init the low level hardware : GPIO, CLOCK, NVIC */ |
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163 | htim->HallSensor_MspInitCallback(htim); |
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164 | #else |
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165 | /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ |
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166 | HAL_TIMEx_HallSensor_MspInit(htim); |
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167 | #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ |
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168 | } |
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169 | |||
170 | /* Set the TIM state */ |
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171 | htim->State = HAL_TIM_STATE_BUSY; |
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172 | |||
173 | /* Configure the Time base in the Encoder Mode */ |
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174 | TIM_Base_SetConfig(htim->Instance, &htim->Init); |
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175 | |||
176 | /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */ |
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177 | TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); |
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178 | |||
179 | /* Reset the IC1PSC Bits */ |
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180 | htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; |
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181 | /* Set the IC1PSC value */ |
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182 | htim->Instance->CCMR1 |= sConfig->IC1Prescaler; |
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183 | |||
184 | /* Enable the Hall sensor interface (XOR function of the three inputs) */ |
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185 | htim->Instance->CR2 |= TIM_CR2_TI1S; |
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186 | |||
187 | /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ |
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188 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
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189 | htim->Instance->SMCR |= TIM_TS_TI1F_ED; |
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190 | |||
191 | /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ |
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192 | htim->Instance->SMCR &= ~TIM_SMCR_SMS; |
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193 | htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; |
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194 | |||
195 | /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ |
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196 | OC_Config.OCFastMode = TIM_OCFAST_DISABLE; |
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197 | OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; |
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198 | OC_Config.OCMode = TIM_OCMODE_PWM2; |
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199 | OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; |
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200 | OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; |
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201 | OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; |
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202 | OC_Config.Pulse = sConfig->Commutation_Delay; |
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203 | |||
204 | TIM_OC2_SetConfig(htim->Instance, &OC_Config); |
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205 | |||
206 | /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 |
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207 | register to 101 */ |
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208 | htim->Instance->CR2 &= ~TIM_CR2_MMS; |
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209 | htim->Instance->CR2 |= TIM_TRGO_OC2REF; |
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210 | |||
211 | /* Initialize the TIM state*/ |
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212 | htim->State = HAL_TIM_STATE_READY; |
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213 | |||
214 | return HAL_OK; |
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215 | } |
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216 | |||
217 | /** |
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218 | * @brief DeInitializes the TIM Hall Sensor interface |
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219 | * @param htim TIM Hall Sensor Interface handle |
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220 | * @retval HAL status |
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221 | */ |
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222 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) |
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223 | { |
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224 | /* Check the parameters */ |
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225 | assert_param(IS_TIM_INSTANCE(htim->Instance)); |
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226 | |||
227 | htim->State = HAL_TIM_STATE_BUSY; |
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228 | |||
229 | /* Disable the TIM Peripheral Clock */ |
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230 | __HAL_TIM_DISABLE(htim); |
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231 | |||
232 | #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) |
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233 | if (htim->HallSensor_MspDeInitCallback == NULL) |
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234 | { |
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235 | htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; |
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236 | } |
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237 | /* DeInit the low level hardware */ |
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238 | htim->HallSensor_MspDeInitCallback(htim); |
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239 | #else |
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240 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ |
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241 | HAL_TIMEx_HallSensor_MspDeInit(htim); |
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242 | #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ |
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243 | |||
244 | /* Change TIM state */ |
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245 | htim->State = HAL_TIM_STATE_RESET; |
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246 | |||
247 | /* Release Lock */ |
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248 | __HAL_UNLOCK(htim); |
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249 | |||
250 | return HAL_OK; |
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251 | } |
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252 | |||
253 | /** |
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254 | * @brief Initializes the TIM Hall Sensor MSP. |
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255 | * @param htim TIM Hall Sensor Interface handle |
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256 | * @retval None |
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257 | */ |
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258 | __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) |
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259 | { |
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260 | /* Prevent unused argument(s) compilation warning */ |
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261 | UNUSED(htim); |
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262 | |||
263 | /* NOTE : This function should not be modified, when the callback is needed, |
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264 | the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file |
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265 | */ |
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266 | } |
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267 | |||
268 | /** |
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269 | * @brief DeInitializes TIM Hall Sensor MSP. |
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270 | * @param htim TIM Hall Sensor Interface handle |
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271 | * @retval None |
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272 | */ |
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273 | __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) |
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274 | { |
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275 | /* Prevent unused argument(s) compilation warning */ |
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276 | UNUSED(htim); |
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277 | |||
278 | /* NOTE : This function should not be modified, when the callback is needed, |
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279 | the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file |
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280 | */ |
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281 | } |
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282 | |||
283 | /** |
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284 | * @brief Starts the TIM Hall Sensor Interface. |
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285 | * @param htim TIM Hall Sensor Interface handle |
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286 | * @retval HAL status |
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287 | */ |
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288 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) |
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289 | { |
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290 | uint32_t tmpsmcr; |
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291 | |||
292 | /* Check the parameters */ |
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293 | assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); |
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294 | |||
295 | /* Enable the Input Capture channel 1 |
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296 | (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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297 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
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298 | |||
299 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
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300 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
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301 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
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302 | { |
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303 | __HAL_TIM_ENABLE(htim); |
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304 | } |
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305 | |||
306 | /* Return function status */ |
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307 | return HAL_OK; |
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308 | } |
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309 | |||
310 | /** |
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311 | * @brief Stops the TIM Hall sensor Interface. |
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312 | * @param htim TIM Hall Sensor Interface handle |
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313 | * @retval HAL status |
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314 | */ |
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315 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) |
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316 | { |
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317 | /* Check the parameters */ |
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318 | assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); |
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319 | |||
320 | /* Disable the Input Capture channels 1, 2 and 3 |
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321 | (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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322 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
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323 | |||
324 | /* Disable the Peripheral */ |
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325 | __HAL_TIM_DISABLE(htim); |
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326 | |||
327 | /* Return function status */ |
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328 | return HAL_OK; |
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329 | } |
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330 | |||
331 | /** |
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332 | * @brief Starts the TIM Hall Sensor Interface in interrupt mode. |
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333 | * @param htim TIM Hall Sensor Interface handle |
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334 | * @retval HAL status |
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335 | */ |
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336 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) |
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337 | { |
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338 | uint32_t tmpsmcr; |
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339 | |||
340 | /* Check the parameters */ |
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341 | assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); |
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342 | |||
343 | /* Enable the capture compare Interrupts 1 event */ |
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344 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
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345 | |||
346 | /* Enable the Input Capture channel 1 |
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347 | (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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348 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
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349 | |||
350 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
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351 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
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352 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
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353 | { |
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354 | __HAL_TIM_ENABLE(htim); |
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355 | } |
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356 | |||
357 | /* Return function status */ |
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358 | return HAL_OK; |
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359 | } |
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360 | |||
361 | /** |
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362 | * @brief Stops the TIM Hall Sensor Interface in interrupt mode. |
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363 | * @param htim TIM Hall Sensor Interface handle |
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364 | * @retval HAL status |
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365 | */ |
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366 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) |
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367 | { |
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368 | /* Check the parameters */ |
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369 | assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); |
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370 | |||
371 | /* Disable the Input Capture channel 1 |
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372 | (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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373 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
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374 | |||
375 | /* Disable the capture compare Interrupts event */ |
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376 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
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377 | |||
378 | /* Disable the Peripheral */ |
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379 | __HAL_TIM_DISABLE(htim); |
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380 | |||
381 | /* Return function status */ |
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382 | return HAL_OK; |
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383 | } |
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384 | |||
385 | /** |
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386 | * @brief Starts the TIM Hall Sensor Interface in DMA mode. |
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387 | * @param htim TIM Hall Sensor Interface handle |
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388 | * @param pData The destination Buffer address. |
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389 | * @param Length The length of data to be transferred from TIM peripheral to memory. |
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390 | * @retval HAL status |
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391 | */ |
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392 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) |
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393 | { |
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394 | uint32_t tmpsmcr; |
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395 | |||
396 | /* Check the parameters */ |
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397 | assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); |
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398 | |||
399 | if (htim->State == HAL_TIM_STATE_BUSY) |
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400 | { |
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401 | return HAL_BUSY; |
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402 | } |
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403 | else if (htim->State == HAL_TIM_STATE_READY) |
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404 | { |
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405 | if (((uint32_t)pData == 0U) && (Length > 0U)) |
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406 | { |
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407 | return HAL_ERROR; |
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408 | } |
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409 | else |
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410 | { |
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411 | htim->State = HAL_TIM_STATE_BUSY; |
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412 | } |
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413 | } |
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414 | else |
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415 | { |
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416 | /* nothing to do */ |
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417 | } |
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418 | /* Enable the Input Capture channel 1 |
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419 | (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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420 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
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421 | |||
422 | /* Set the DMA Input Capture 1 Callbacks */ |
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423 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; |
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424 | htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; |
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425 | /* Set the DMA error callback */ |
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426 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; |
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427 | |||
428 | /* Enable the DMA channel for Capture 1*/ |
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429 | if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK) |
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430 | { |
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431 | return HAL_ERROR; |
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432 | } |
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433 | /* Enable the capture compare 1 Interrupt */ |
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434 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
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435 | |||
436 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
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437 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
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438 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
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439 | { |
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440 | __HAL_TIM_ENABLE(htim); |
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441 | } |
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442 | |||
443 | /* Return function status */ |
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444 | return HAL_OK; |
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445 | } |
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446 | |||
447 | /** |
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448 | * @brief Stops the TIM Hall Sensor Interface in DMA mode. |
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449 | * @param htim TIM Hall Sensor Interface handle |
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450 | * @retval HAL status |
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451 | */ |
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452 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) |
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453 | { |
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454 | /* Check the parameters */ |
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455 | assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); |
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456 | |||
457 | /* Disable the Input Capture channel 1 |
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458 | (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
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459 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
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460 | |||
461 | |||
462 | /* Disable the capture compare Interrupts 1 event */ |
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463 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
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464 | |||
465 | (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); |
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466 | /* Disable the Peripheral */ |
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467 | __HAL_TIM_DISABLE(htim); |
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468 | |||
469 | /* Return function status */ |
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470 | return HAL_OK; |
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471 | } |
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472 | |||
473 | /** |
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474 | * @} |
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475 | */ |
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476 | |||
477 | /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions |
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478 | * @brief Timer Complementary Output Compare functions |
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479 | * |
||
480 | @verbatim |
||
481 | ============================================================================== |
||
482 | ##### Timer Complementary Output Compare functions ##### |
||
483 | ============================================================================== |
||
484 | [..] |
||
485 | This section provides functions allowing to: |
||
486 | (+) Start the Complementary Output Compare/PWM. |
||
487 | (+) Stop the Complementary Output Compare/PWM. |
||
488 | (+) Start the Complementary Output Compare/PWM and enable interrupts. |
||
489 | (+) Stop the Complementary Output Compare/PWM and disable interrupts. |
||
490 | (+) Start the Complementary Output Compare/PWM and enable DMA transfers. |
||
491 | (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. |
||
492 | |||
493 | @endverbatim |
||
494 | * @{ |
||
495 | */ |
||
496 | |||
497 | /** |
||
498 | * @brief Starts the TIM Output Compare signal generation on the complementary |
||
499 | * output. |
||
500 | * @param htim TIM Output Compare handle |
||
501 | * @param Channel TIM Channel to be enabled |
||
502 | * This parameter can be one of the following values: |
||
503 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
504 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
505 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
506 | * @retval HAL status |
||
507 | */ |
||
508 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
509 | { |
||
510 | uint32_t tmpsmcr; |
||
511 | |||
512 | /* Check the parameters */ |
||
513 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
514 | |||
515 | /* Enable the Capture compare channel N */ |
||
516 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
517 | |||
518 | /* Enable the Main Output */ |
||
519 | __HAL_TIM_MOE_ENABLE(htim); |
||
520 | |||
521 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
||
522 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
||
523 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
||
524 | { |
||
525 | __HAL_TIM_ENABLE(htim); |
||
526 | } |
||
527 | |||
528 | /* Return function status */ |
||
529 | return HAL_OK; |
||
530 | } |
||
531 | |||
532 | /** |
||
533 | * @brief Stops the TIM Output Compare signal generation on the complementary |
||
534 | * output. |
||
535 | * @param htim TIM handle |
||
536 | * @param Channel TIM Channel to be disabled |
||
537 | * This parameter can be one of the following values: |
||
538 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
539 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
540 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
541 | * @retval HAL status |
||
542 | */ |
||
543 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
544 | { |
||
545 | /* Check the parameters */ |
||
546 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
547 | |||
548 | /* Disable the Capture compare channel N */ |
||
549 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
550 | |||
551 | /* Disable the Main Output */ |
||
552 | __HAL_TIM_MOE_DISABLE(htim); |
||
553 | |||
554 | /* Disable the Peripheral */ |
||
555 | __HAL_TIM_DISABLE(htim); |
||
556 | |||
557 | /* Return function status */ |
||
558 | return HAL_OK; |
||
559 | } |
||
560 | |||
561 | /** |
||
562 | * @brief Starts the TIM Output Compare signal generation in interrupt mode |
||
563 | * on the complementary output. |
||
564 | * @param htim TIM OC handle |
||
565 | * @param Channel TIM Channel to be enabled |
||
566 | * This parameter can be one of the following values: |
||
567 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
568 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
569 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
570 | * @retval HAL status |
||
571 | */ |
||
572 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
573 | { |
||
574 | uint32_t tmpsmcr; |
||
575 | |||
576 | /* Check the parameters */ |
||
577 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
578 | |||
579 | switch (Channel) |
||
580 | { |
||
581 | case TIM_CHANNEL_1: |
||
582 | { |
||
583 | /* Enable the TIM Output Compare interrupt */ |
||
584 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
||
585 | break; |
||
586 | } |
||
587 | |||
588 | case TIM_CHANNEL_2: |
||
589 | { |
||
590 | /* Enable the TIM Output Compare interrupt */ |
||
591 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
||
592 | break; |
||
593 | } |
||
594 | |||
595 | case TIM_CHANNEL_3: |
||
596 | { |
||
597 | /* Enable the TIM Output Compare interrupt */ |
||
598 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
||
599 | break; |
||
600 | } |
||
601 | |||
602 | |||
603 | default: |
||
604 | break; |
||
605 | } |
||
606 | |||
607 | /* Enable the TIM Break interrupt */ |
||
608 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); |
||
609 | |||
610 | /* Enable the Capture compare channel N */ |
||
611 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
612 | |||
613 | /* Enable the Main Output */ |
||
614 | __HAL_TIM_MOE_ENABLE(htim); |
||
615 | |||
616 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
||
617 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
||
618 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
||
619 | { |
||
620 | __HAL_TIM_ENABLE(htim); |
||
621 | } |
||
622 | |||
623 | /* Return function status */ |
||
624 | return HAL_OK; |
||
625 | } |
||
626 | |||
627 | /** |
||
628 | * @brief Stops the TIM Output Compare signal generation in interrupt mode |
||
629 | * on the complementary output. |
||
630 | * @param htim TIM Output Compare handle |
||
631 | * @param Channel TIM Channel to be disabled |
||
632 | * This parameter can be one of the following values: |
||
633 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
634 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
635 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
636 | * @retval HAL status |
||
637 | */ |
||
638 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
639 | { |
||
640 | uint32_t tmpccer; |
||
641 | /* Check the parameters */ |
||
642 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
643 | |||
644 | switch (Channel) |
||
645 | { |
||
646 | case TIM_CHANNEL_1: |
||
647 | { |
||
648 | /* Disable the TIM Output Compare interrupt */ |
||
649 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
||
650 | break; |
||
651 | } |
||
652 | |||
653 | case TIM_CHANNEL_2: |
||
654 | { |
||
655 | /* Disable the TIM Output Compare interrupt */ |
||
656 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
||
657 | break; |
||
658 | } |
||
659 | |||
660 | case TIM_CHANNEL_3: |
||
661 | { |
||
662 | /* Disable the TIM Output Compare interrupt */ |
||
663 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
||
664 | break; |
||
665 | } |
||
666 | |||
667 | default: |
||
668 | break; |
||
669 | } |
||
670 | |||
671 | /* Disable the Capture compare channel N */ |
||
672 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
673 | |||
674 | /* Disable the TIM Break interrupt (only if no more channel is active) */ |
||
675 | tmpccer = htim->Instance->CCER; |
||
676 | if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) |
||
677 | { |
||
678 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); |
||
679 | } |
||
680 | |||
681 | /* Disable the Main Output */ |
||
682 | __HAL_TIM_MOE_DISABLE(htim); |
||
683 | |||
684 | /* Disable the Peripheral */ |
||
685 | __HAL_TIM_DISABLE(htim); |
||
686 | |||
687 | /* Return function status */ |
||
688 | return HAL_OK; |
||
689 | } |
||
690 | |||
691 | /** |
||
692 | * @brief Starts the TIM Output Compare signal generation in DMA mode |
||
693 | * on the complementary output. |
||
694 | * @param htim TIM Output Compare handle |
||
695 | * @param Channel TIM Channel to be enabled |
||
696 | * This parameter can be one of the following values: |
||
697 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
698 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
699 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
700 | * @param pData The source Buffer address. |
||
701 | * @param Length The length of data to be transferred from memory to TIM peripheral |
||
702 | * @retval HAL status |
||
703 | */ |
||
704 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
||
705 | { |
||
706 | uint32_t tmpsmcr; |
||
707 | |||
708 | /* Check the parameters */ |
||
709 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
710 | |||
711 | if (htim->State == HAL_TIM_STATE_BUSY) |
||
712 | { |
||
713 | return HAL_BUSY; |
||
714 | } |
||
715 | else if (htim->State == HAL_TIM_STATE_READY) |
||
716 | { |
||
717 | if (((uint32_t)pData == 0U) && (Length > 0U)) |
||
718 | { |
||
719 | return HAL_ERROR; |
||
720 | } |
||
721 | else |
||
722 | { |
||
723 | htim->State = HAL_TIM_STATE_BUSY; |
||
724 | } |
||
725 | } |
||
726 | else |
||
727 | { |
||
728 | /* nothing to do */ |
||
729 | } |
||
730 | |||
731 | switch (Channel) |
||
732 | { |
||
733 | case TIM_CHANNEL_1: |
||
734 | { |
||
735 | /* Set the DMA compare callbacks */ |
||
736 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
737 | htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; |
||
738 | |||
739 | /* Set the DMA error callback */ |
||
740 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; |
||
741 | |||
742 | /* Enable the DMA channel */ |
||
743 | if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK) |
||
744 | { |
||
745 | return HAL_ERROR; |
||
746 | } |
||
747 | /* Enable the TIM Output Compare DMA request */ |
||
748 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
||
749 | break; |
||
750 | } |
||
751 | |||
752 | case TIM_CHANNEL_2: |
||
753 | { |
||
754 | /* Set the DMA compare callbacks */ |
||
755 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
756 | htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; |
||
757 | |||
758 | /* Set the DMA error callback */ |
||
759 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; |
||
760 | |||
761 | /* Enable the DMA channel */ |
||
762 | if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK) |
||
763 | { |
||
764 | return HAL_ERROR; |
||
765 | } |
||
766 | /* Enable the TIM Output Compare DMA request */ |
||
767 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
||
768 | break; |
||
769 | } |
||
770 | |||
771 | case TIM_CHANNEL_3: |
||
772 | { |
||
773 | /* Set the DMA compare callbacks */ |
||
774 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
775 | htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; |
||
776 | |||
777 | /* Set the DMA error callback */ |
||
778 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; |
||
779 | |||
780 | /* Enable the DMA channel */ |
||
781 | if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK) |
||
782 | { |
||
783 | return HAL_ERROR; |
||
784 | } |
||
785 | /* Enable the TIM Output Compare DMA request */ |
||
786 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
||
787 | break; |
||
788 | } |
||
789 | |||
790 | default: |
||
791 | break; |
||
792 | } |
||
793 | |||
794 | /* Enable the Capture compare channel N */ |
||
795 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
796 | |||
797 | /* Enable the Main Output */ |
||
798 | __HAL_TIM_MOE_ENABLE(htim); |
||
799 | |||
800 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
||
801 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
||
802 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
||
803 | { |
||
804 | __HAL_TIM_ENABLE(htim); |
||
805 | } |
||
806 | |||
807 | /* Return function status */ |
||
808 | return HAL_OK; |
||
809 | } |
||
810 | |||
811 | /** |
||
812 | * @brief Stops the TIM Output Compare signal generation in DMA mode |
||
813 | * on the complementary output. |
||
814 | * @param htim TIM Output Compare handle |
||
815 | * @param Channel TIM Channel to be disabled |
||
816 | * This parameter can be one of the following values: |
||
817 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
818 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
819 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
820 | * @retval HAL status |
||
821 | */ |
||
822 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
823 | { |
||
824 | /* Check the parameters */ |
||
825 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
826 | |||
827 | switch (Channel) |
||
828 | { |
||
829 | case TIM_CHANNEL_1: |
||
830 | { |
||
831 | /* Disable the TIM Output Compare DMA request */ |
||
832 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
||
833 | (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); |
||
834 | break; |
||
835 | } |
||
836 | |||
837 | case TIM_CHANNEL_2: |
||
838 | { |
||
839 | /* Disable the TIM Output Compare DMA request */ |
||
840 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
||
841 | (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); |
||
842 | break; |
||
843 | } |
||
844 | |||
845 | case TIM_CHANNEL_3: |
||
846 | { |
||
847 | /* Disable the TIM Output Compare DMA request */ |
||
848 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
||
849 | (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); |
||
850 | break; |
||
851 | } |
||
852 | |||
853 | default: |
||
854 | break; |
||
855 | } |
||
856 | |||
857 | /* Disable the Capture compare channel N */ |
||
858 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
859 | |||
860 | /* Disable the Main Output */ |
||
861 | __HAL_TIM_MOE_DISABLE(htim); |
||
862 | |||
863 | /* Disable the Peripheral */ |
||
864 | __HAL_TIM_DISABLE(htim); |
||
865 | |||
866 | /* Change the htim state */ |
||
867 | htim->State = HAL_TIM_STATE_READY; |
||
868 | |||
869 | /* Return function status */ |
||
870 | return HAL_OK; |
||
871 | } |
||
872 | |||
873 | /** |
||
874 | * @} |
||
875 | */ |
||
876 | |||
877 | /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions |
||
878 | * @brief Timer Complementary PWM functions |
||
879 | * |
||
880 | @verbatim |
||
881 | ============================================================================== |
||
882 | ##### Timer Complementary PWM functions ##### |
||
883 | ============================================================================== |
||
884 | [..] |
||
885 | This section provides functions allowing to: |
||
886 | (+) Start the Complementary PWM. |
||
887 | (+) Stop the Complementary PWM. |
||
888 | (+) Start the Complementary PWM and enable interrupts. |
||
889 | (+) Stop the Complementary PWM and disable interrupts. |
||
890 | (+) Start the Complementary PWM and enable DMA transfers. |
||
891 | (+) Stop the Complementary PWM and disable DMA transfers. |
||
892 | (+) Start the Complementary Input Capture measurement. |
||
893 | (+) Stop the Complementary Input Capture. |
||
894 | (+) Start the Complementary Input Capture and enable interrupts. |
||
895 | (+) Stop the Complementary Input Capture and disable interrupts. |
||
896 | (+) Start the Complementary Input Capture and enable DMA transfers. |
||
897 | (+) Stop the Complementary Input Capture and disable DMA transfers. |
||
898 | (+) Start the Complementary One Pulse generation. |
||
899 | (+) Stop the Complementary One Pulse. |
||
900 | (+) Start the Complementary One Pulse and enable interrupts. |
||
901 | (+) Stop the Complementary One Pulse and disable interrupts. |
||
902 | |||
903 | @endverbatim |
||
904 | * @{ |
||
905 | */ |
||
906 | |||
907 | /** |
||
908 | * @brief Starts the PWM signal generation on the complementary output. |
||
909 | * @param htim TIM handle |
||
910 | * @param Channel TIM Channel to be enabled |
||
911 | * This parameter can be one of the following values: |
||
912 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
913 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
914 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
915 | * @retval HAL status |
||
916 | */ |
||
917 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
918 | { |
||
919 | uint32_t tmpsmcr; |
||
920 | |||
921 | /* Check the parameters */ |
||
922 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
923 | |||
924 | /* Enable the complementary PWM output */ |
||
925 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
926 | |||
927 | /* Enable the Main Output */ |
||
928 | __HAL_TIM_MOE_ENABLE(htim); |
||
929 | |||
930 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
||
931 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
||
932 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
||
933 | { |
||
934 | __HAL_TIM_ENABLE(htim); |
||
935 | } |
||
936 | |||
937 | /* Return function status */ |
||
938 | return HAL_OK; |
||
939 | } |
||
940 | |||
941 | /** |
||
942 | * @brief Stops the PWM signal generation on the complementary output. |
||
943 | * @param htim TIM handle |
||
944 | * @param Channel TIM Channel to be disabled |
||
945 | * This parameter can be one of the following values: |
||
946 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
947 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
948 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
949 | * @retval HAL status |
||
950 | */ |
||
951 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
952 | { |
||
953 | /* Check the parameters */ |
||
954 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
955 | |||
956 | /* Disable the complementary PWM output */ |
||
957 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
958 | |||
959 | /* Disable the Main Output */ |
||
960 | __HAL_TIM_MOE_DISABLE(htim); |
||
961 | |||
962 | /* Disable the Peripheral */ |
||
963 | __HAL_TIM_DISABLE(htim); |
||
964 | |||
965 | /* Return function status */ |
||
966 | return HAL_OK; |
||
967 | } |
||
968 | |||
969 | /** |
||
970 | * @brief Starts the PWM signal generation in interrupt mode on the |
||
971 | * complementary output. |
||
972 | * @param htim TIM handle |
||
973 | * @param Channel TIM Channel to be disabled |
||
974 | * This parameter can be one of the following values: |
||
975 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
976 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
977 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
978 | * @retval HAL status |
||
979 | */ |
||
980 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
981 | { |
||
982 | uint32_t tmpsmcr; |
||
983 | |||
984 | /* Check the parameters */ |
||
985 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
986 | |||
987 | switch (Channel) |
||
988 | { |
||
989 | case TIM_CHANNEL_1: |
||
990 | { |
||
991 | /* Enable the TIM Capture/Compare 1 interrupt */ |
||
992 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
||
993 | break; |
||
994 | } |
||
995 | |||
996 | case TIM_CHANNEL_2: |
||
997 | { |
||
998 | /* Enable the TIM Capture/Compare 2 interrupt */ |
||
999 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
||
1000 | break; |
||
1001 | } |
||
1002 | |||
1003 | case TIM_CHANNEL_3: |
||
1004 | { |
||
1005 | /* Enable the TIM Capture/Compare 3 interrupt */ |
||
1006 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
||
1007 | break; |
||
1008 | } |
||
1009 | |||
1010 | default: |
||
1011 | break; |
||
1012 | } |
||
1013 | |||
1014 | /* Enable the TIM Break interrupt */ |
||
1015 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); |
||
1016 | |||
1017 | /* Enable the complementary PWM output */ |
||
1018 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
1019 | |||
1020 | /* Enable the Main Output */ |
||
1021 | __HAL_TIM_MOE_ENABLE(htim); |
||
1022 | |||
1023 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
||
1024 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
||
1025 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
||
1026 | { |
||
1027 | __HAL_TIM_ENABLE(htim); |
||
1028 | } |
||
1029 | |||
1030 | /* Return function status */ |
||
1031 | return HAL_OK; |
||
1032 | } |
||
1033 | |||
1034 | /** |
||
1035 | * @brief Stops the PWM signal generation in interrupt mode on the |
||
1036 | * complementary output. |
||
1037 | * @param htim TIM handle |
||
1038 | * @param Channel TIM Channel to be disabled |
||
1039 | * This parameter can be one of the following values: |
||
1040 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
1041 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
1042 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
1043 | * @retval HAL status |
||
1044 | */ |
||
1045 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
1046 | { |
||
1047 | uint32_t tmpccer; |
||
1048 | |||
1049 | /* Check the parameters */ |
||
1050 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
1051 | |||
1052 | switch (Channel) |
||
1053 | { |
||
1054 | case TIM_CHANNEL_1: |
||
1055 | { |
||
1056 | /* Disable the TIM Capture/Compare 1 interrupt */ |
||
1057 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
||
1058 | break; |
||
1059 | } |
||
1060 | |||
1061 | case TIM_CHANNEL_2: |
||
1062 | { |
||
1063 | /* Disable the TIM Capture/Compare 2 interrupt */ |
||
1064 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
||
1065 | break; |
||
1066 | } |
||
1067 | |||
1068 | case TIM_CHANNEL_3: |
||
1069 | { |
||
1070 | /* Disable the TIM Capture/Compare 3 interrupt */ |
||
1071 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
||
1072 | break; |
||
1073 | } |
||
1074 | |||
1075 | default: |
||
1076 | break; |
||
1077 | } |
||
1078 | |||
1079 | /* Disable the complementary PWM output */ |
||
1080 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
1081 | |||
1082 | /* Disable the TIM Break interrupt (only if no more channel is active) */ |
||
1083 | tmpccer = htim->Instance->CCER; |
||
1084 | if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) |
||
1085 | { |
||
1086 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); |
||
1087 | } |
||
1088 | |||
1089 | /* Disable the Main Output */ |
||
1090 | __HAL_TIM_MOE_DISABLE(htim); |
||
1091 | |||
1092 | /* Disable the Peripheral */ |
||
1093 | __HAL_TIM_DISABLE(htim); |
||
1094 | |||
1095 | /* Return function status */ |
||
1096 | return HAL_OK; |
||
1097 | } |
||
1098 | |||
1099 | /** |
||
1100 | * @brief Starts the TIM PWM signal generation in DMA mode on the |
||
1101 | * complementary output |
||
1102 | * @param htim TIM handle |
||
1103 | * @param Channel TIM Channel to be enabled |
||
1104 | * This parameter can be one of the following values: |
||
1105 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
1106 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
1107 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
1108 | * @param pData The source Buffer address. |
||
1109 | * @param Length The length of data to be transferred from memory to TIM peripheral |
||
1110 | * @retval HAL status |
||
1111 | */ |
||
1112 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
||
1113 | { |
||
1114 | uint32_t tmpsmcr; |
||
1115 | |||
1116 | /* Check the parameters */ |
||
1117 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
1118 | |||
1119 | if (htim->State == HAL_TIM_STATE_BUSY) |
||
1120 | { |
||
1121 | return HAL_BUSY; |
||
1122 | } |
||
1123 | else if (htim->State == HAL_TIM_STATE_READY) |
||
1124 | { |
||
1125 | if (((uint32_t)pData == 0U) && (Length > 0U)) |
||
1126 | { |
||
1127 | return HAL_ERROR; |
||
1128 | } |
||
1129 | else |
||
1130 | { |
||
1131 | htim->State = HAL_TIM_STATE_BUSY; |
||
1132 | } |
||
1133 | } |
||
1134 | else |
||
1135 | { |
||
1136 | /* nothing to do */ |
||
1137 | } |
||
1138 | switch (Channel) |
||
1139 | { |
||
1140 | case TIM_CHANNEL_1: |
||
1141 | { |
||
1142 | /* Set the DMA compare callbacks */ |
||
1143 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
1144 | htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; |
||
1145 | |||
1146 | /* Set the DMA error callback */ |
||
1147 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; |
||
1148 | |||
1149 | /* Enable the DMA channel */ |
||
1150 | if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK) |
||
1151 | { |
||
1152 | return HAL_ERROR; |
||
1153 | } |
||
1154 | /* Enable the TIM Capture/Compare 1 DMA request */ |
||
1155 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
||
1156 | break; |
||
1157 | } |
||
1158 | |||
1159 | case TIM_CHANNEL_2: |
||
1160 | { |
||
1161 | /* Set the DMA compare callbacks */ |
||
1162 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
1163 | htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; |
||
1164 | |||
1165 | /* Set the DMA error callback */ |
||
1166 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; |
||
1167 | |||
1168 | /* Enable the DMA channel */ |
||
1169 | if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK) |
||
1170 | { |
||
1171 | return HAL_ERROR; |
||
1172 | } |
||
1173 | /* Enable the TIM Capture/Compare 2 DMA request */ |
||
1174 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
||
1175 | break; |
||
1176 | } |
||
1177 | |||
1178 | case TIM_CHANNEL_3: |
||
1179 | { |
||
1180 | /* Set the DMA compare callbacks */ |
||
1181 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; |
||
1182 | htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; |
||
1183 | |||
1184 | /* Set the DMA error callback */ |
||
1185 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; |
||
1186 | |||
1187 | /* Enable the DMA channel */ |
||
1188 | if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK) |
||
1189 | { |
||
1190 | return HAL_ERROR; |
||
1191 | } |
||
1192 | /* Enable the TIM Capture/Compare 3 DMA request */ |
||
1193 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
||
1194 | break; |
||
1195 | } |
||
1196 | |||
1197 | default: |
||
1198 | break; |
||
1199 | } |
||
1200 | |||
1201 | /* Enable the complementary PWM output */ |
||
1202 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
||
1203 | |||
1204 | /* Enable the Main Output */ |
||
1205 | __HAL_TIM_MOE_ENABLE(htim); |
||
1206 | |||
1207 | /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ |
||
1208 | tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; |
||
1209 | if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) |
||
1210 | { |
||
1211 | __HAL_TIM_ENABLE(htim); |
||
1212 | } |
||
1213 | |||
1214 | /* Return function status */ |
||
1215 | return HAL_OK; |
||
1216 | } |
||
1217 | |||
1218 | /** |
||
1219 | * @brief Stops the TIM PWM signal generation in DMA mode on the complementary |
||
1220 | * output |
||
1221 | * @param htim TIM handle |
||
1222 | * @param Channel TIM Channel to be disabled |
||
1223 | * This parameter can be one of the following values: |
||
1224 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
1225 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
1226 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
||
1227 | * @retval HAL status |
||
1228 | */ |
||
1229 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
||
1230 | { |
||
1231 | /* Check the parameters */ |
||
1232 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
||
1233 | |||
1234 | switch (Channel) |
||
1235 | { |
||
1236 | case TIM_CHANNEL_1: |
||
1237 | { |
||
1238 | /* Disable the TIM Capture/Compare 1 DMA request */ |
||
1239 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
||
1240 | (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); |
||
1241 | break; |
||
1242 | } |
||
1243 | |||
1244 | case TIM_CHANNEL_2: |
||
1245 | { |
||
1246 | /* Disable the TIM Capture/Compare 2 DMA request */ |
||
1247 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
||
1248 | (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); |
||
1249 | break; |
||
1250 | } |
||
1251 | |||
1252 | case TIM_CHANNEL_3: |
||
1253 | { |
||
1254 | /* Disable the TIM Capture/Compare 3 DMA request */ |
||
1255 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
||
1256 | (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); |
||
1257 | break; |
||
1258 | } |
||
1259 | |||
1260 | default: |
||
1261 | break; |
||
1262 | } |
||
1263 | |||
1264 | /* Disable the complementary PWM output */ |
||
1265 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
||
1266 | |||
1267 | /* Disable the Main Output */ |
||
1268 | __HAL_TIM_MOE_DISABLE(htim); |
||
1269 | |||
1270 | /* Disable the Peripheral */ |
||
1271 | __HAL_TIM_DISABLE(htim); |
||
1272 | |||
1273 | /* Change the htim state */ |
||
1274 | htim->State = HAL_TIM_STATE_READY; |
||
1275 | |||
1276 | /* Return function status */ |
||
1277 | return HAL_OK; |
||
1278 | } |
||
1279 | |||
1280 | /** |
||
1281 | * @} |
||
1282 | */ |
||
1283 | |||
1284 | /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions |
||
1285 | * @brief Timer Complementary One Pulse functions |
||
1286 | * |
||
1287 | @verbatim |
||
1288 | ============================================================================== |
||
1289 | ##### Timer Complementary One Pulse functions ##### |
||
1290 | ============================================================================== |
||
1291 | [..] |
||
1292 | This section provides functions allowing to: |
||
1293 | (+) Start the Complementary One Pulse generation. |
||
1294 | (+) Stop the Complementary One Pulse. |
||
1295 | (+) Start the Complementary One Pulse and enable interrupts. |
||
1296 | (+) Stop the Complementary One Pulse and disable interrupts. |
||
1297 | |||
1298 | @endverbatim |
||
1299 | * @{ |
||
1300 | */ |
||
1301 | |||
1302 | /** |
||
1303 | * @brief Starts the TIM One Pulse signal generation on the complementary |
||
1304 | * output. |
||
1305 | * @param htim TIM One Pulse handle |
||
1306 | * @param OutputChannel TIM Channel to be enabled |
||
1307 | * This parameter can be one of the following values: |
||
1308 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
1309 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
1310 | * @retval HAL status |
||
1311 | */ |
||
1312 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
||
1313 | { |
||
1314 | /* Check the parameters */ |
||
1315 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
||
1316 | |||
1317 | /* Enable the complementary One Pulse output */ |
||
1318 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
||
1319 | |||
1320 | /* Enable the Main Output */ |
||
1321 | __HAL_TIM_MOE_ENABLE(htim); |
||
1322 | |||
1323 | /* Return function status */ |
||
1324 | return HAL_OK; |
||
1325 | } |
||
1326 | |||
1327 | /** |
||
1328 | * @brief Stops the TIM One Pulse signal generation on the complementary |
||
1329 | * output. |
||
1330 | * @param htim TIM One Pulse handle |
||
1331 | * @param OutputChannel TIM Channel to be disabled |
||
1332 | * This parameter can be one of the following values: |
||
1333 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
1334 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
1335 | * @retval HAL status |
||
1336 | */ |
||
1337 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
||
1338 | { |
||
1339 | |||
1340 | /* Check the parameters */ |
||
1341 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
||
1342 | |||
1343 | /* Disable the complementary One Pulse output */ |
||
1344 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
||
1345 | |||
1346 | /* Disable the Main Output */ |
||
1347 | __HAL_TIM_MOE_DISABLE(htim); |
||
1348 | |||
1349 | /* Disable the Peripheral */ |
||
1350 | __HAL_TIM_DISABLE(htim); |
||
1351 | |||
1352 | /* Return function status */ |
||
1353 | return HAL_OK; |
||
1354 | } |
||
1355 | |||
1356 | /** |
||
1357 | * @brief Starts the TIM One Pulse signal generation in interrupt mode on the |
||
1358 | * complementary channel. |
||
1359 | * @param htim TIM One Pulse handle |
||
1360 | * @param OutputChannel TIM Channel to be enabled |
||
1361 | * This parameter can be one of the following values: |
||
1362 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
1363 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
1364 | * @retval HAL status |
||
1365 | */ |
||
1366 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
||
1367 | { |
||
1368 | /* Check the parameters */ |
||
1369 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
||
1370 | |||
1371 | /* Enable the TIM Capture/Compare 1 interrupt */ |
||
1372 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
||
1373 | |||
1374 | /* Enable the TIM Capture/Compare 2 interrupt */ |
||
1375 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
||
1376 | |||
1377 | /* Enable the complementary One Pulse output */ |
||
1378 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
||
1379 | |||
1380 | /* Enable the Main Output */ |
||
1381 | __HAL_TIM_MOE_ENABLE(htim); |
||
1382 | |||
1383 | /* Return function status */ |
||
1384 | return HAL_OK; |
||
1385 | } |
||
1386 | |||
1387 | /** |
||
1388 | * @brief Stops the TIM One Pulse signal generation in interrupt mode on the |
||
1389 | * complementary channel. |
||
1390 | * @param htim TIM One Pulse handle |
||
1391 | * @param OutputChannel TIM Channel to be disabled |
||
1392 | * This parameter can be one of the following values: |
||
1393 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
||
1394 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
||
1395 | * @retval HAL status |
||
1396 | */ |
||
1397 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
||
1398 | { |
||
1399 | /* Check the parameters */ |
||
1400 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
||
1401 | |||
1402 | /* Disable the TIM Capture/Compare 1 interrupt */ |
||
1403 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
||
1404 | |||
1405 | /* Disable the TIM Capture/Compare 2 interrupt */ |
||
1406 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
||
1407 | |||
1408 | /* Disable the complementary One Pulse output */ |
||
1409 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
||
1410 | |||
1411 | /* Disable the Main Output */ |
||
1412 | __HAL_TIM_MOE_DISABLE(htim); |
||
1413 | |||
1414 | /* Disable the Peripheral */ |
||
1415 | __HAL_TIM_DISABLE(htim); |
||
1416 | |||
1417 | /* Return function status */ |
||
1418 | return HAL_OK; |
||
1419 | } |
||
1420 | |||
1421 | /** |
||
1422 | * @} |
||
1423 | */ |
||
1424 | |||
1425 | /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions |
||
1426 | * @brief Peripheral Control functions |
||
1427 | * |
||
1428 | @verbatim |
||
1429 | ============================================================================== |
||
1430 | ##### Peripheral Control functions ##### |
||
1431 | ============================================================================== |
||
1432 | [..] |
||
1433 | This section provides functions allowing to: |
||
1434 | (+) Configure the commutation event in case of use of the Hall sensor interface. |
||
1435 | (+) Configure Output channels for OC and PWM mode. |
||
1436 | |||
1437 | (+) Configure Complementary channels, break features and dead time. |
||
1438 | (+) Configure Master synchronization. |
||
1439 | (+) Configure timer remapping capabilities. |
||
1440 | |||
1441 | @endverbatim |
||
1442 | * @{ |
||
1443 | */ |
||
1444 | |||
1445 | /** |
||
1446 | * @brief Configure the TIM commutation event sequence. |
||
1447 | * @note This function is mandatory to use the commutation event in order to |
||
1448 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
||
1449 | * the typical use of this feature is with the use of another Timer(interface Timer) |
||
1450 | * configured in Hall sensor interface, this interface Timer will generate the |
||
1451 | * commutation at its TRGO output (connected to Timer used in this function) each time |
||
1452 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
||
1453 | * @param htim TIM handle |
||
1454 | * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
||
1455 | * This parameter can be one of the following values: |
||
1456 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
||
1457 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
||
1458 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
||
1459 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
||
1460 | * @arg TIM_TS_NONE: No trigger is needed |
||
1461 | * @param CommutationSource the Commutation Event source |
||
1462 | * This parameter can be one of the following values: |
||
1463 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
||
1464 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
||
1465 | * @retval HAL status |
||
1466 | */ |
||
1467 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, |
||
1468 | uint32_t CommutationSource) |
||
1469 | { |
||
1470 | /* Check the parameters */ |
||
1471 | assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); |
||
1472 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
||
1473 | |||
1474 | __HAL_LOCK(htim); |
||
1475 | |||
1476 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
||
1477 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
||
1478 | { |
||
1479 | /* Select the Input trigger */ |
||
1480 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
||
1481 | htim->Instance->SMCR |= InputTrigger; |
||
1482 | } |
||
1483 | |||
1484 | /* Select the Capture Compare preload feature */ |
||
1485 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
||
1486 | /* Select the Commutation event source */ |
||
1487 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
||
1488 | htim->Instance->CR2 |= CommutationSource; |
||
1489 | |||
1490 | /* Disable Commutation Interrupt */ |
||
1491 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM); |
||
1492 | |||
1493 | /* Disable Commutation DMA request */ |
||
1494 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM); |
||
1495 | |||
1496 | __HAL_UNLOCK(htim); |
||
1497 | |||
1498 | return HAL_OK; |
||
1499 | } |
||
1500 | |||
1501 | /** |
||
1502 | * @brief Configure the TIM commutation event sequence with interrupt. |
||
1503 | * @note This function is mandatory to use the commutation event in order to |
||
1504 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
||
1505 | * the typical use of this feature is with the use of another Timer(interface Timer) |
||
1506 | * configured in Hall sensor interface, this interface Timer will generate the |
||
1507 | * commutation at its TRGO output (connected to Timer used in this function) each time |
||
1508 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
||
1509 | * @param htim TIM handle |
||
1510 | * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
||
1511 | * This parameter can be one of the following values: |
||
1512 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
||
1513 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
||
1514 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
||
1515 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
||
1516 | * @arg TIM_TS_NONE: No trigger is needed |
||
1517 | * @param CommutationSource the Commutation Event source |
||
1518 | * This parameter can be one of the following values: |
||
1519 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
||
1520 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
||
1521 | * @retval HAL status |
||
1522 | */ |
||
1523 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, |
||
1524 | uint32_t CommutationSource) |
||
1525 | { |
||
1526 | /* Check the parameters */ |
||
1527 | assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); |
||
1528 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
||
1529 | |||
1530 | __HAL_LOCK(htim); |
||
1531 | |||
1532 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
||
1533 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
||
1534 | { |
||
1535 | /* Select the Input trigger */ |
||
1536 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
||
1537 | htim->Instance->SMCR |= InputTrigger; |
||
1538 | } |
||
1539 | |||
1540 | /* Select the Capture Compare preload feature */ |
||
1541 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
||
1542 | /* Select the Commutation event source */ |
||
1543 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
||
1544 | htim->Instance->CR2 |= CommutationSource; |
||
1545 | |||
1546 | /* Disable Commutation DMA request */ |
||
1547 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM); |
||
1548 | |||
1549 | /* Enable the Commutation Interrupt */ |
||
1550 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); |
||
1551 | |||
1552 | __HAL_UNLOCK(htim); |
||
1553 | |||
1554 | return HAL_OK; |
||
1555 | } |
||
1556 | |||
1557 | /** |
||
1558 | * @brief Configure the TIM commutation event sequence with DMA. |
||
1559 | * @note This function is mandatory to use the commutation event in order to |
||
1560 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
||
1561 | * the typical use of this feature is with the use of another Timer(interface Timer) |
||
1562 | * configured in Hall sensor interface, this interface Timer will generate the |
||
1563 | * commutation at its TRGO output (connected to Timer used in this function) each time |
||
1564 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
||
1565 | * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set |
||
1566 | * @param htim TIM handle |
||
1567 | * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor |
||
1568 | * This parameter can be one of the following values: |
||
1569 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
||
1570 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
||
1571 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
||
1572 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
||
1573 | * @arg TIM_TS_NONE: No trigger is needed |
||
1574 | * @param CommutationSource the Commutation Event source |
||
1575 | * This parameter can be one of the following values: |
||
1576 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
||
1577 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
||
1578 | * @retval HAL status |
||
1579 | */ |
||
1580 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, |
||
1581 | uint32_t CommutationSource) |
||
1582 | { |
||
1583 | /* Check the parameters */ |
||
1584 | assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); |
||
1585 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
||
1586 | |||
1587 | __HAL_LOCK(htim); |
||
1588 | |||
1589 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
||
1590 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
||
1591 | { |
||
1592 | /* Select the Input trigger */ |
||
1593 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
||
1594 | htim->Instance->SMCR |= InputTrigger; |
||
1595 | } |
||
1596 | |||
1597 | /* Select the Capture Compare preload feature */ |
||
1598 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
||
1599 | /* Select the Commutation event source */ |
||
1600 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
||
1601 | htim->Instance->CR2 |= CommutationSource; |
||
1602 | |||
1603 | /* Enable the Commutation DMA Request */ |
||
1604 | /* Set the DMA Commutation Callback */ |
||
1605 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; |
||
1606 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; |
||
1607 | /* Set the DMA error callback */ |
||
1608 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError; |
||
1609 | |||
1610 | /* Disable Commutation Interrupt */ |
||
1611 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM); |
||
1612 | |||
1613 | /* Enable the Commutation DMA Request */ |
||
1614 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); |
||
1615 | |||
1616 | __HAL_UNLOCK(htim); |
||
1617 | |||
1618 | return HAL_OK; |
||
1619 | } |
||
1620 | |||
1621 | /** |
||
1622 | * @brief Configures the TIM in master mode. |
||
1623 | * @param htim TIM handle. |
||
1624 | * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that |
||
1625 | * contains the selected trigger output (TRGO) and the Master/Slave |
||
1626 | * mode. |
||
1627 | * @retval HAL status |
||
1628 | */ |
||
1629 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, |
||
1630 | TIM_MasterConfigTypeDef *sMasterConfig) |
||
1631 | { |
||
1632 | uint32_t tmpcr2; |
||
1633 | uint32_t tmpsmcr; |
||
1634 | |||
1635 | /* Check the parameters */ |
||
1636 | assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance)); |
||
1637 | assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); |
||
1638 | assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); |
||
1639 | |||
1640 | /* Check input state */ |
||
1641 | __HAL_LOCK(htim); |
||
1642 | |||
1643 | /* Change the handler state */ |
||
1644 | htim->State = HAL_TIM_STATE_BUSY; |
||
1645 | |||
1646 | /* Get the TIMx CR2 register value */ |
||
1647 | tmpcr2 = htim->Instance->CR2; |
||
1648 | |||
1649 | /* Get the TIMx SMCR register value */ |
||
1650 | tmpsmcr = htim->Instance->SMCR; |
||
1651 | |||
1652 | /* Reset the MMS Bits */ |
||
1653 | tmpcr2 &= ~TIM_CR2_MMS; |
||
1654 | /* Select the TRGO source */ |
||
1655 | tmpcr2 |= sMasterConfig->MasterOutputTrigger; |
||
1656 | |||
1657 | /* Reset the MSM Bit */ |
||
1658 | tmpsmcr &= ~TIM_SMCR_MSM; |
||
1659 | /* Set master mode */ |
||
1660 | tmpsmcr |= sMasterConfig->MasterSlaveMode; |
||
1661 | |||
1662 | /* Update TIMx CR2 */ |
||
1663 | htim->Instance->CR2 = tmpcr2; |
||
1664 | |||
1665 | /* Update TIMx SMCR */ |
||
1666 | htim->Instance->SMCR = tmpsmcr; |
||
1667 | |||
1668 | /* Change the htim state */ |
||
1669 | htim->State = HAL_TIM_STATE_READY; |
||
1670 | |||
1671 | __HAL_UNLOCK(htim); |
||
1672 | |||
1673 | return HAL_OK; |
||
1674 | } |
||
1675 | |||
1676 | /** |
||
1677 | * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State |
||
1678 | * and the AOE(automatic output enable). |
||
1679 | * @param htim TIM handle |
||
1680 | * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that |
||
1681 | * contains the BDTR Register configuration information for the TIM peripheral. |
||
1682 | * @note Interrupts can be generated when an active level is detected on the |
||
1683 | * break input, the break 2 input or the system break input. Break |
||
1684 | * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro. |
||
1685 | * @retval HAL status |
||
1686 | */ |
||
1687 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, |
||
1688 | TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig) |
||
1689 | { |
||
1690 | /* Keep this variable initialized to 0 as it is used to configure BDTR register */ |
||
1691 | uint32_t tmpbdtr = 0U; |
||
1692 | |||
1693 | /* Check the parameters */ |
||
1694 | assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); |
||
1695 | assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); |
||
1696 | assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); |
||
1697 | assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); |
||
1698 | assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); |
||
1699 | assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); |
||
1700 | assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); |
||
1701 | assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); |
||
1702 | |||
1703 | /* Check input state */ |
||
1704 | __HAL_LOCK(htim); |
||
1705 | |||
1706 | /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, |
||
1707 | the OSSI State, the dead time value and the Automatic Output Enable Bit */ |
||
1708 | |||
1709 | /* Set the BDTR bits */ |
||
1710 | MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); |
||
1711 | MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); |
||
1712 | MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); |
||
1713 | MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); |
||
1714 | MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); |
||
1715 | MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); |
||
1716 | MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); |
||
1717 | |||
1718 | |||
1719 | /* Set TIMx_BDTR */ |
||
1720 | htim->Instance->BDTR = tmpbdtr; |
||
1721 | |||
1722 | __HAL_UNLOCK(htim); |
||
1723 | |||
1724 | return HAL_OK; |
||
1725 | } |
||
1726 | |||
1727 | /** |
||
1728 | * @brief Configures the TIMx Remapping input capabilities. |
||
1729 | * @param htim TIM handle. |
||
1730 | * @param Remap specifies the TIM remapping source. |
||
1731 | * |
||
1732 | * @retval HAL status |
||
1733 | */ |
||
1734 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) |
||
1735 | { |
||
1736 | |||
1737 | return HAL_OK; |
||
1738 | } |
||
1739 | |||
1740 | /** |
||
1741 | * @} |
||
1742 | */ |
||
1743 | |||
1744 | /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions |
||
1745 | * @brief Extended Callbacks functions |
||
1746 | * |
||
1747 | @verbatim |
||
1748 | ============================================================================== |
||
1749 | ##### Extended Callbacks functions ##### |
||
1750 | ============================================================================== |
||
1751 | [..] |
||
1752 | This section provides Extended TIM callback functions: |
||
1753 | (+) Timer Commutation callback |
||
1754 | (+) Timer Break callback |
||
1755 | |||
1756 | @endverbatim |
||
1757 | * @{ |
||
1758 | */ |
||
1759 | |||
1760 | /** |
||
1761 | * @brief Hall commutation changed callback in non-blocking mode |
||
1762 | * @param htim TIM handle |
||
1763 | * @retval None |
||
1764 | */ |
||
1765 | __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) |
||
1766 | { |
||
1767 | /* Prevent unused argument(s) compilation warning */ |
||
1768 | UNUSED(htim); |
||
1769 | |||
1770 | /* NOTE : This function should not be modified, when the callback is needed, |
||
1771 | the HAL_TIMEx_CommutCallback could be implemented in the user file |
||
1772 | */ |
||
1773 | } |
||
1774 | /** |
||
1775 | * @brief Hall commutation changed half complete callback in non-blocking mode |
||
1776 | * @param htim TIM handle |
||
1777 | * @retval None |
||
1778 | */ |
||
1779 | __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim) |
||
1780 | { |
||
1781 | /* Prevent unused argument(s) compilation warning */ |
||
1782 | UNUSED(htim); |
||
1783 | |||
1784 | /* NOTE : This function should not be modified, when the callback is needed, |
||
1785 | the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file |
||
1786 | */ |
||
1787 | } |
||
1788 | |||
1789 | /** |
||
1790 | * @brief Hall Break detection callback in non-blocking mode |
||
1791 | * @param htim TIM handle |
||
1792 | * @retval None |
||
1793 | */ |
||
1794 | __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) |
||
1795 | { |
||
1796 | /* Prevent unused argument(s) compilation warning */ |
||
1797 | UNUSED(htim); |
||
1798 | |||
1799 | /* NOTE : This function should not be modified, when the callback is needed, |
||
1800 | the HAL_TIMEx_BreakCallback could be implemented in the user file |
||
1801 | */ |
||
1802 | } |
||
1803 | /** |
||
1804 | * @} |
||
1805 | */ |
||
1806 | |||
1807 | /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions |
||
1808 | * @brief Extended Peripheral State functions |
||
1809 | * |
||
1810 | @verbatim |
||
1811 | ============================================================================== |
||
1812 | ##### Extended Peripheral State functions ##### |
||
1813 | ============================================================================== |
||
1814 | [..] |
||
1815 | This subsection permits to get in run-time the status of the peripheral |
||
1816 | and the data flow. |
||
1817 | |||
1818 | @endverbatim |
||
1819 | * @{ |
||
1820 | */ |
||
1821 | |||
1822 | /** |
||
1823 | * @brief Return the TIM Hall Sensor interface handle state. |
||
1824 | * @param htim TIM Hall Sensor handle |
||
1825 | * @retval HAL state |
||
1826 | */ |
||
1827 | HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim) |
||
1828 | { |
||
1829 | return htim->State; |
||
1830 | } |
||
1831 | |||
1832 | /** |
||
1833 | * @} |
||
1834 | */ |
||
1835 | |||
1836 | /** |
||
1837 | * @} |
||
1838 | */ |
||
1839 | |||
1840 | /* Private functions ---------------------------------------------------------*/ |
||
1841 | /** @defgroup TIMEx_Private_Functions TIMEx Private Functions |
||
1842 | * @{ |
||
1843 | */ |
||
1844 | |||
1845 | /** |
||
1846 | * @brief TIM DMA Commutation callback. |
||
1847 | * @param hdma pointer to DMA handle. |
||
1848 | * @retval None |
||
1849 | */ |
||
1850 | void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) |
||
1851 | { |
||
1852 | TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
||
1853 | |||
1854 | /* Change the htim state */ |
||
1855 | htim->State = HAL_TIM_STATE_READY; |
||
1856 | |||
1857 | #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) |
||
1858 | htim->CommutationCallback(htim); |
||
1859 | #else |
||
1860 | HAL_TIMEx_CommutCallback(htim); |
||
1861 | #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ |
||
1862 | } |
||
1863 | |||
1864 | /** |
||
1865 | * @brief TIM DMA Commutation half complete callback. |
||
1866 | * @param hdma pointer to DMA handle. |
||
1867 | * @retval None |
||
1868 | */ |
||
1869 | void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma) |
||
1870 | { |
||
1871 | TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; |
||
1872 | |||
1873 | /* Change the htim state */ |
||
1874 | htim->State = HAL_TIM_STATE_READY; |
||
1875 | |||
1876 | #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) |
||
1877 | htim->CommutationHalfCpltCallback(htim); |
||
1878 | #else |
||
1879 | HAL_TIMEx_CommutHalfCpltCallback(htim); |
||
1880 | #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ |
||
1881 | } |
||
1882 | |||
1883 | |||
1884 | /** |
||
1885 | * @brief Enables or disables the TIM Capture Compare Channel xN. |
||
1886 | * @param TIMx to select the TIM peripheral |
||
1887 | * @param Channel specifies the TIM Channel |
||
1888 | * This parameter can be one of the following values: |
||
1889 | * @arg TIM_CHANNEL_1: TIM Channel 1 |
||
1890 | * @arg TIM_CHANNEL_2: TIM Channel 2 |
||
1891 | * @arg TIM_CHANNEL_3: TIM Channel 3 |
||
1892 | * @param ChannelNState specifies the TIM Channel CCxNE bit new state. |
||
1893 | * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. |
||
1894 | * @retval None |
||
1895 | */ |
||
1896 | static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState) |
||
1897 | { |
||
1898 | uint32_t tmp; |
||
1899 | |||
1900 | tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ |
||
1901 | |||
1902 | /* Reset the CCxNE Bit */ |
||
1903 | TIMx->CCER &= ~tmp; |
||
1904 | |||
1905 | /* Set or reset the CCxNE Bit */ |
||
1906 | TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ |
||
1907 | } |
||
1908 | /** |
||
1909 | * @} |
||
1910 | */ |
||
1911 | |||
1912 | #endif /* HAL_TIM_MODULE_ENABLED */ |
||
1913 | /** |
||
1914 | * @} |
||
1915 | */ |
||
1916 | |||
1917 | /** |
||
1918 | * @} |
||
1919 | */ |
||
1920 | |||
1921 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |