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| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f1xx_ll_wwdg.h |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief Header file of WWDG LL module. |
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| 6 | ****************************************************************************** |
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| 7 | * @attention |
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| 8 | * |
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| 9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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| 10 | * All rights reserved.</center></h2> |
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| 11 | * |
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| 12 | * This software component is licensed by ST under BSD 3-Clause license, |
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| 13 | * the "License"; You may not use this file except in compliance with the |
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| 14 | * License. You may obtain a copy of the License at: |
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| 15 | * opensource.org/licenses/BSD-3-Clause |
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| 16 | * |
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| 17 | ****************************************************************************** |
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| 18 | */ |
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| 19 | |||
| 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 21 | #ifndef STM32F1xx_LL_WWDG_H |
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| 22 | #define STM32F1xx_LL_WWDG_H |
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| 23 | |||
| 24 | #ifdef __cplusplus |
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| 25 | extern "C" { |
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| 26 | #endif |
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| 27 | |||
| 28 | /* Includes ------------------------------------------------------------------*/ |
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| 29 | #include "stm32f1xx.h" |
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| 30 | |||
| 31 | /** @addtogroup STM32F1xx_LL_Driver |
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| 32 | * @{ |
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| 33 | */ |
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| 34 | |||
| 35 | #if defined (WWDG) |
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| 36 | /** @defgroup WWDG_LL WWDG |
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| 37 | * @{ |
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| 38 | */ |
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| 39 | |||
| 40 | /* Private types -------------------------------------------------------------*/ |
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| 41 | /* Private variables ---------------------------------------------------------*/ |
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| 42 | /* Private constants ---------------------------------------------------------*/ |
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| 43 | /* Private macros ------------------------------------------------------------*/ |
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| 44 | /* Exported types ------------------------------------------------------------*/ |
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| 45 | /* Exported constants --------------------------------------------------------*/ |
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| 46 | /** @defgroup WWDG_LL_Exported_Constants WWDG Exported Constants |
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| 47 | * @{ |
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| 48 | */ |
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| 49 | |||
| 50 | /** @defgroup WWDG_LL_EC_IT IT Defines |
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| 51 | * @brief IT defines which can be used with LL_WWDG_ReadReg and LL_WWDG_WriteReg functions |
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| 52 | * @{ |
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| 53 | */ |
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| 54 | #define LL_WWDG_CFR_EWI WWDG_CFR_EWI |
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| 55 | /** |
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| 56 | * @} |
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| 57 | */ |
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| 58 | |||
| 59 | /** @defgroup WWDG_LL_EC_PRESCALER PRESCALER |
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| 60 | * @{ |
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| 61 | */ |
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| 62 | #define LL_WWDG_PRESCALER_1 0x00000000U /*!< WWDG counter clock = (PCLK1/4096)/1 */ |
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| 63 | #define LL_WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */ |
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| 64 | #define LL_WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */ |
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| 65 | #define LL_WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1) /*!< WWDG counter clock = (PCLK1/4096)/8 */ |
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| 66 | /** |
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| 67 | * @} |
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| 68 | */ |
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| 69 | |||
| 70 | /** |
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| 71 | * @} |
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| 72 | */ |
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| 73 | |||
| 74 | /* Exported macro ------------------------------------------------------------*/ |
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| 75 | /** @defgroup WWDG_LL_Exported_Macros WWDG Exported Macros |
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| 76 | * @{ |
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| 77 | */ |
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| 78 | /** @defgroup WWDG_LL_EM_WRITE_READ Common Write and read registers macros |
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| 79 | * @{ |
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| 80 | */ |
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| 81 | /** |
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| 82 | * @brief Write a value in WWDG register |
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| 83 | * @param __INSTANCE__ WWDG Instance |
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| 84 | * @param __REG__ Register to be written |
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| 85 | * @param __VALUE__ Value to be written in the register |
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| 86 | * @retval None |
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| 87 | */ |
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| 88 | #define LL_WWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
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| 89 | |||
| 90 | /** |
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| 91 | * @brief Read a value in WWDG register |
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| 92 | * @param __INSTANCE__ WWDG Instance |
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| 93 | * @param __REG__ Register to be read |
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| 94 | * @retval Register value |
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| 95 | */ |
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| 96 | #define LL_WWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
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| 97 | /** |
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| 98 | * @} |
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| 99 | */ |
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| 100 | |||
| 101 | /** |
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| 102 | * @} |
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| 103 | */ |
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| 104 | |||
| 105 | /* Exported functions --------------------------------------------------------*/ |
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| 106 | /** @defgroup WWDG_LL_Exported_Functions WWDG Exported Functions |
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| 107 | * @{ |
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| 108 | */ |
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| 109 | |||
| 110 | /** @defgroup WWDG_LL_EF_Configuration Configuration |
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| 111 | * @{ |
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| 112 | */ |
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| 113 | /** |
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| 114 | * @brief Enable Window Watchdog. The watchdog is always disabled after a reset. |
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| 115 | * @note It is enabled by setting the WDGA bit in the WWDG_CR register, |
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| 116 | * then it cannot be disabled again except by a reset. |
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| 117 | * This bit is set by software and only cleared by hardware after a reset. |
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| 118 | * When WDGA = 1, the watchdog can generate a reset. |
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| 119 | * @rmtoll CR WDGA LL_WWDG_Enable |
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| 120 | * @param WWDGx WWDG Instance |
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| 121 | * @retval None |
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| 122 | */ |
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| 123 | __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx) |
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| 124 | { |
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| 125 | SET_BIT(WWDGx->CR, WWDG_CR_WDGA); |
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| 126 | } |
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| 127 | |||
| 128 | /** |
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| 129 | * @brief Checks if Window Watchdog is enabled |
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| 130 | * @rmtoll CR WDGA LL_WWDG_IsEnabled |
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| 131 | * @param WWDGx WWDG Instance |
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| 132 | * @retval State of bit (1 or 0). |
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| 133 | */ |
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| 134 | __STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx) |
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| 135 | { |
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| 136 | return ((READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA)) ? 1UL : 0UL); |
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| 137 | } |
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| 138 | |||
| 139 | /** |
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| 140 | * @brief Set the Watchdog counter value to provided value (7-bits T[6:0]) |
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| 141 | * @note When writing to the WWDG_CR register, always write 1 in the MSB b6 to avoid generating an immediate reset |
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| 142 | * This counter is decremented every (4096 x 2expWDGTB) PCLK cycles |
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| 143 | * A reset is produced when it rolls over from 0x40 to 0x3F (bit T6 becomes cleared) |
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| 144 | * Setting the counter lower then 0x40 causes an immediate reset (if WWDG enabled) |
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| 145 | * @rmtoll CR T LL_WWDG_SetCounter |
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| 146 | * @param WWDGx WWDG Instance |
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| 147 | * @param Counter 0..0x7F (7 bit counter value) |
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| 148 | * @retval None |
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| 149 | */ |
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| 150 | __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter) |
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| 151 | { |
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| 152 | MODIFY_REG(WWDGx->CR, WWDG_CR_T, Counter); |
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| 153 | } |
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| 154 | |||
| 155 | /** |
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| 156 | * @brief Return current Watchdog Counter Value (7 bits counter value) |
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| 157 | * @rmtoll CR T LL_WWDG_GetCounter |
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| 158 | * @param WWDGx WWDG Instance |
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| 159 | * @retval 7 bit Watchdog Counter value |
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| 160 | */ |
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| 161 | __STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx) |
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| 162 | { |
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| 163 | return (READ_BIT(WWDGx->CR, WWDG_CR_T)); |
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| 164 | } |
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| 165 | |||
| 166 | /** |
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| 167 | * @brief Set the time base of the prescaler (WDGTB). |
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| 168 | * @note Prescaler is used to apply ratio on PCLK clock, so that Watchdog counter |
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| 169 | * is decremented every (4096 x 2expWDGTB) PCLK cycles |
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| 170 | * @rmtoll CFR WDGTB LL_WWDG_SetPrescaler |
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| 171 | * @param WWDGx WWDG Instance |
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| 172 | * @param Prescaler This parameter can be one of the following values: |
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| 173 | * @arg @ref LL_WWDG_PRESCALER_1 |
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| 174 | * @arg @ref LL_WWDG_PRESCALER_2 |
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| 175 | * @arg @ref LL_WWDG_PRESCALER_4 |
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| 176 | * @arg @ref LL_WWDG_PRESCALER_8 |
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| 177 | * @retval None |
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| 178 | */ |
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| 179 | __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescaler) |
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| 180 | { |
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| 181 | MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler); |
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| 182 | } |
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| 183 | |||
| 184 | /** |
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| 185 | * @brief Return current Watchdog Prescaler Value |
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| 186 | * @rmtoll CFR WDGTB LL_WWDG_GetPrescaler |
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| 187 | * @param WWDGx WWDG Instance |
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| 188 | * @retval Returned value can be one of the following values: |
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| 189 | * @arg @ref LL_WWDG_PRESCALER_1 |
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| 190 | * @arg @ref LL_WWDG_PRESCALER_2 |
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| 191 | * @arg @ref LL_WWDG_PRESCALER_4 |
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| 192 | * @arg @ref LL_WWDG_PRESCALER_8 |
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| 193 | */ |
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| 194 | __STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx) |
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| 195 | { |
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| 196 | return (READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB)); |
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| 197 | } |
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| 198 | |||
| 199 | /** |
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| 200 | * @brief Set the Watchdog Window value to be compared to the downcounter (7-bits W[6:0]). |
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| 201 | * @note This window value defines when write in the WWDG_CR register |
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| 202 | * to program Watchdog counter is allowed. |
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| 203 | * Watchdog counter value update must occur only when the counter value |
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| 204 | * is lower than the Watchdog window register value. |
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| 205 | * Otherwise, a MCU reset is generated if the 7-bit Watchdog counter value |
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| 206 | * (in the control register) is refreshed before the downcounter has reached |
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| 207 | * the watchdog window register value. |
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| 208 | * Physically is possible to set the Window lower then 0x40 but it is not recommended. |
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| 209 | * To generate an immediate reset, it is possible to set the Counter lower than 0x40. |
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| 210 | * @rmtoll CFR W LL_WWDG_SetWindow |
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| 211 | * @param WWDGx WWDG Instance |
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| 212 | * @param Window 0x00..0x7F (7 bit Window value) |
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| 213 | * @retval None |
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| 214 | */ |
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| 215 | __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window) |
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| 216 | { |
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| 217 | MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window); |
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| 218 | } |
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| 219 | |||
| 220 | /** |
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| 221 | * @brief Return current Watchdog Window Value (7 bits value) |
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| 222 | * @rmtoll CFR W LL_WWDG_GetWindow |
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| 223 | * @param WWDGx WWDG Instance |
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| 224 | * @retval 7 bit Watchdog Window value |
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| 225 | */ |
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| 226 | __STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx) |
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| 227 | { |
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| 228 | return (READ_BIT(WWDGx->CFR, WWDG_CFR_W)); |
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| 229 | } |
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| 230 | |||
| 231 | /** |
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| 232 | * @} |
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| 233 | */ |
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| 234 | |||
| 235 | /** @defgroup WWDG_LL_EF_FLAG_Management FLAG_Management |
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| 236 | * @{ |
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| 237 | */ |
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| 238 | /** |
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| 239 | * @brief Indicates if the WWDG Early Wakeup Interrupt Flag is set or not. |
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| 240 | * @note This bit is set by hardware when the counter has reached the value 0x40. |
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| 241 | * It must be cleared by software by writing 0. |
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| 242 | * A write of 1 has no effect. This bit is also set if the interrupt is not enabled. |
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| 243 | * @rmtoll SR EWIF LL_WWDG_IsActiveFlag_EWKUP |
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| 244 | * @param WWDGx WWDG Instance |
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| 245 | * @retval State of bit (1 or 0). |
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| 246 | */ |
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| 247 | __STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx) |
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| 248 | { |
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| 249 | return ((READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF)) ? 1UL : 0UL); |
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| 250 | } |
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| 251 | |||
| 252 | /** |
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| 253 | * @brief Clear WWDG Early Wakeup Interrupt Flag (EWIF) |
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| 254 | * @rmtoll SR EWIF LL_WWDG_ClearFlag_EWKUP |
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| 255 | * @param WWDGx WWDG Instance |
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| 256 | * @retval None |
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| 257 | */ |
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| 258 | __STATIC_INLINE void LL_WWDG_ClearFlag_EWKUP(WWDG_TypeDef *WWDGx) |
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| 259 | { |
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| 260 | WRITE_REG(WWDGx->SR, ~WWDG_SR_EWIF); |
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| 261 | } |
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| 262 | |||
| 263 | /** |
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| 264 | * @} |
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| 265 | */ |
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| 266 | |||
| 267 | /** @defgroup WWDG_LL_EF_IT_Management IT_Management |
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| 268 | * @{ |
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| 269 | */ |
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| 270 | /** |
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| 271 | * @brief Enable the Early Wakeup Interrupt. |
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| 272 | * @note When set, an interrupt occurs whenever the counter reaches value 0x40. |
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| 273 | * This interrupt is only cleared by hardware after a reset |
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| 274 | * @rmtoll CFR EWI LL_WWDG_EnableIT_EWKUP |
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| 275 | * @param WWDGx WWDG Instance |
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| 276 | * @retval None |
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| 277 | */ |
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| 278 | __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx) |
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| 279 | { |
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| 280 | SET_BIT(WWDGx->CFR, WWDG_CFR_EWI); |
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| 281 | } |
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| 282 | |||
| 283 | /** |
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| 284 | * @brief Check if Early Wakeup Interrupt is enabled |
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| 285 | * @rmtoll CFR EWI LL_WWDG_IsEnabledIT_EWKUP |
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| 286 | * @param WWDGx WWDG Instance |
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| 287 | * @retval State of bit (1 or 0). |
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| 288 | */ |
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| 289 | __STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx) |
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| 290 | { |
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| 291 | return ((READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI)) ? 1UL : 0UL); |
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| 292 | } |
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| 293 | |||
| 294 | /** |
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| 295 | * @} |
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| 296 | */ |
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| 297 | |||
| 298 | /** |
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| 299 | * @} |
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| 300 | */ |
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| 301 | |||
| 302 | /** |
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| 303 | * @} |
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| 304 | */ |
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| 305 | |||
| 306 | #endif /* WWDG */ |
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| 307 | |||
| 308 | /** |
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| 309 | * @} |
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| 310 | */ |
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| 311 | |||
| 312 | #ifdef __cplusplus |
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| 313 | } |
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| 314 | #endif |
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| 315 | |||
| 316 | #endif /* STM32F1xx_LL_WWDG_H */ |
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| 317 | |||
| 318 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |