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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 2 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32f1xx_ll_rtc.h |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief Header file of RTC LL module. |
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| 6 | ****************************************************************************** |
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| 7 | * @attention |
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| 8 | * |
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| 9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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| 10 | * All rights reserved.</center></h2> |
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| 11 | * |
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| 12 | * This software component is licensed by ST under BSD 3-Clause license, |
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| 13 | * the "License"; You may not use this file except in compliance with the |
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| 14 | * License. You may obtain a copy of the License at: |
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| 15 | * opensource.org/licenses/BSD-3-Clause |
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| 16 | * |
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| 17 | ****************************************************************************** |
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| 18 | */ |
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| 19 | |||
| 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 21 | #ifndef __STM32F1xx_LL_RTC_H |
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| 22 | #define __STM32F1xx_LL_RTC_H |
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| 23 | |||
| 24 | #ifdef __cplusplus |
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| 25 | extern "C" { |
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| 26 | #endif |
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| 27 | |||
| 28 | /* Includes ------------------------------------------------------------------*/ |
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| 29 | #include "stm32f1xx.h" |
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| 30 | |||
| 31 | /** @addtogroup STM32F1xx_LL_Driver |
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| 32 | * @{ |
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| 33 | */ |
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| 34 | |||
| 35 | #if defined(RTC) |
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| 36 | |||
| 37 | /** @defgroup RTC_LL RTC |
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| 38 | * @{ |
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| 39 | */ |
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| 40 | |||
| 41 | /* Private types -------------------------------------------------------------*/ |
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| 42 | /* Private variables ---------------------------------------------------------*/ |
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| 43 | /* Private constants ---------------------------------------------------------*/ |
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| 44 | |||
| 45 | /* Private macros ------------------------------------------------------------*/ |
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| 46 | #if defined(USE_FULL_LL_DRIVER) |
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| 47 | /** @defgroup RTC_LL_Private_Macros RTC Private Macros |
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| 48 | * @{ |
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| 49 | */ |
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| 50 | /** |
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| 51 | * @} |
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| 52 | */ |
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| 53 | #endif /*USE_FULL_LL_DRIVER*/ |
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| 54 | |||
| 55 | /* Exported types ------------------------------------------------------------*/ |
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| 56 | #if defined(USE_FULL_LL_DRIVER) |
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| 57 | /** @defgroup RTC_LL_ES_INIT RTC Exported Init structure |
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| 58 | * @{ |
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| 59 | */ |
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| 60 | |||
| 61 | /** |
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| 62 | * @brief RTC Init structures definition |
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| 63 | */ |
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| 64 | typedef struct |
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| 65 | { |
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| 66 | uint32_t AsynchPrescaler; /*!< Specifies the RTC Asynchronous Predivider value. |
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| 67 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFFF |
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| 68 | |||
| 69 | This feature can be modified afterwards using unitary function |
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| 70 | @ref LL_RTC_SetAsynchPrescaler(). */ |
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| 71 | |||
| 72 | uint32_t OutPutSource; /*!< Specifies which signal will be routed to the RTC Tamper pin. |
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| 73 | This parameter can be a value of @ref LL_RTC_Output_Source |
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| 74 | |||
| 75 | This feature can be modified afterwards using unitary function |
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| 76 | @ref LL_RTC_SetOutputSource(). */ |
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| 77 | |||
| 78 | } LL_RTC_InitTypeDef; |
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| 79 | |||
| 80 | /** |
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| 81 | * @brief RTC Time structure definition |
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| 82 | */ |
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| 83 | typedef struct |
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| 84 | { |
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| 85 | uint8_t Hours; /*!< Specifies the RTC Time Hours. |
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| 86 | This parameter must be a number between Min_Data = 0 and Max_Data = 23 */ |
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| 87 | |||
| 88 | uint8_t Minutes; /*!< Specifies the RTC Time Minutes. |
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| 89 | This parameter must be a number between Min_Data = 0 and Max_Data = 59 */ |
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| 90 | |||
| 91 | uint8_t Seconds; /*!< Specifies the RTC Time Seconds. |
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| 92 | This parameter must be a number between Min_Data = 0 and Max_Data = 59 */ |
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| 93 | } LL_RTC_TimeTypeDef; |
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| 94 | |||
| 95 | |||
| 96 | /** |
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| 97 | * @brief RTC Alarm structure definition |
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| 98 | */ |
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| 99 | typedef struct |
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| 100 | { |
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| 101 | LL_RTC_TimeTypeDef AlarmTime; /*!< Specifies the RTC Alarm Time members. */ |
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| 102 | |||
| 103 | } LL_RTC_AlarmTypeDef; |
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| 104 | |||
| 105 | /** |
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| 106 | * @} |
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| 107 | */ |
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| 108 | #endif /* USE_FULL_LL_DRIVER */ |
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| 109 | |||
| 110 | /* Exported constants --------------------------------------------------------*/ |
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| 111 | /** @defgroup RTC_LL_Exported_Constants RTC Exported Constants |
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| 112 | * @{ |
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| 113 | */ |
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| 114 | |||
| 115 | #if defined(USE_FULL_LL_DRIVER) |
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| 116 | /** @defgroup RTC_LL_EC_FORMAT FORMAT |
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| 117 | * @{ |
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| 118 | */ |
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| 119 | #define LL_RTC_FORMAT_BIN (0x000000000U) /*!< Binary data format */ |
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| 120 | #define LL_RTC_FORMAT_BCD (0x000000001U) /*!< BCD data format */ |
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| 121 | /** |
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| 122 | * @} |
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| 123 | */ |
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| 124 | #endif /* USE_FULL_LL_DRIVER */ |
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| 125 | |||
| 126 | /** @defgroup RTC_LL_EC_BKP BACKUP |
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| 127 | * @{ |
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| 128 | */ |
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| 129 | #if RTC_BKP_NUMBER > 0 |
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| 130 | #define LL_RTC_BKP_DR1 (0x00000001U) |
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| 131 | #define LL_RTC_BKP_DR2 (0x00000002U) |
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| 132 | #define LL_RTC_BKP_DR3 (0x00000003U) |
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| 133 | #define LL_RTC_BKP_DR4 (0x00000004U) |
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| 134 | #define LL_RTC_BKP_DR5 (0x00000005U) |
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| 135 | #define LL_RTC_BKP_DR6 (0x00000006U) |
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| 136 | #define LL_RTC_BKP_DR7 (0x00000007U) |
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| 137 | #define LL_RTC_BKP_DR8 (0x00000008U) |
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| 138 | #define LL_RTC_BKP_DR9 (0x00000009U) |
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| 139 | #define LL_RTC_BKP_DR10 (0x0000000AU) |
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| 140 | #endif /* RTC_BKP_NUMBER > 0 */ |
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| 141 | #if RTC_BKP_NUMBER > 10 |
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| 142 | #define LL_RTC_BKP_DR11 (0x0000000BU) |
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| 143 | #define LL_RTC_BKP_DR12 (0x0000000CU) |
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| 144 | #define LL_RTC_BKP_DR13 (0x0000000DU) |
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| 145 | #define LL_RTC_BKP_DR14 (0x0000000EU) |
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| 146 | #define LL_RTC_BKP_DR15 (0x0000000FU) |
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| 147 | #define LL_RTC_BKP_DR16 (0x00000010U) |
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| 148 | #define LL_RTC_BKP_DR17 (0x00000011U) |
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| 149 | #define LL_RTC_BKP_DR18 (0x00000012U) |
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| 150 | #define LL_RTC_BKP_DR19 (0x00000013U) |
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| 151 | #define LL_RTC_BKP_DR20 (0x00000014U) |
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| 152 | #define LL_RTC_BKP_DR21 (0x00000015U) |
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| 153 | #define LL_RTC_BKP_DR22 (0x00000016U) |
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| 154 | #define LL_RTC_BKP_DR23 (0x00000017U) |
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| 155 | #define LL_RTC_BKP_DR24 (0x00000018U) |
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| 156 | #define LL_RTC_BKP_DR25 (0x00000019U) |
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| 157 | #define LL_RTC_BKP_DR26 (0x0000001AU) |
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| 158 | #define LL_RTC_BKP_DR27 (0x0000001BU) |
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| 159 | #define LL_RTC_BKP_DR28 (0x0000001CU) |
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| 160 | #define LL_RTC_BKP_DR29 (0x0000001DU) |
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| 161 | #define LL_RTC_BKP_DR30 (0x0000001EU) |
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| 162 | #define LL_RTC_BKP_DR31 (0x0000001FU) |
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| 163 | #define LL_RTC_BKP_DR32 (0x00000020U) |
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| 164 | #define LL_RTC_BKP_DR33 (0x00000021U) |
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| 165 | #define LL_RTC_BKP_DR34 (0x00000022U) |
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| 166 | #define LL_RTC_BKP_DR35 (0x00000023U) |
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| 167 | #define LL_RTC_BKP_DR36 (0x00000024U) |
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| 168 | #define LL_RTC_BKP_DR37 (0x00000025U) |
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| 169 | #define LL_RTC_BKP_DR38 (0x00000026U) |
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| 170 | #define LL_RTC_BKP_DR39 (0x00000027U) |
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| 171 | #define LL_RTC_BKP_DR40 (0x00000028U) |
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| 172 | #define LL_RTC_BKP_DR41 (0x00000029U) |
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| 173 | #define LL_RTC_BKP_DR42 (0x0000002AU) |
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| 174 | #endif /* RTC_BKP_NUMBER > 10 */ |
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| 175 | |||
| 176 | /** |
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| 177 | * @} |
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| 178 | */ |
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| 179 | |||
| 180 | /** @defgroup RTC_LL_EC_TAMPLEVEL Tamper Active Level |
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| 181 | * @{ |
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| 182 | */ |
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| 183 | #define LL_RTC_TAMPER_ACTIVELEVEL_LOW BKP_CR_TPAL /*!< A high level on the TAMPER pin resets all data backup registers (if TPE bit is set) */ |
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| 184 | #define LL_RTC_TAMPER_ACTIVELEVEL_HIGH (0x00000000U) /*!< A low level on the TAMPER pin resets all data backup registers (if TPE bit is set) */ |
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| 185 | |||
| 186 | /** |
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| 187 | * @} |
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| 188 | */ |
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| 189 | |||
| 190 | /** @defgroup LL_RTC_Output_Source Clock Source to output on the Tamper Pin |
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| 191 | * @{ |
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| 192 | */ |
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| 193 | #define LL_RTC_CALIB_OUTPUT_NONE (0x00000000U) /*!< Calibration output disabled */ |
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| 194 | #define LL_RTC_CALIB_OUTPUT_RTCCLOCK BKP_RTCCR_CCO /*!< Calibration output is RTC Clock with a frequency divided by 64 on the TAMPER Pin */ |
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| 195 | #define LL_RTC_CALIB_OUTPUT_ALARM BKP_RTCCR_ASOE /*!< Calibration output is Alarm pulse signal on the TAMPER pin */ |
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| 196 | #define LL_RTC_CALIB_OUTPUT_SECOND (BKP_RTCCR_ASOS | BKP_RTCCR_ASOE) /*!< Calibration output is Second pulse signal on the TAMPER pin*/ |
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| 197 | /** |
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| 198 | * @} |
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| 199 | */ |
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| 200 | |||
| 201 | /** |
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| 202 | * @} |
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| 203 | */ |
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| 204 | |||
| 205 | /* Exported macro ------------------------------------------------------------*/ |
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| 206 | /** @defgroup RTC_LL_Exported_Macros RTC Exported Macros |
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| 207 | * @{ |
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| 208 | */ |
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| 209 | |||
| 210 | /** @defgroup RTC_LL_EM_WRITE_READ Common Write and read registers Macros |
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| 211 | * @{ |
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| 212 | */ |
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| 213 | |||
| 214 | /** |
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| 215 | * @brief Write a value in RTC register |
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| 216 | * @param __INSTANCE__ RTC Instance |
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| 217 | * @param __REG__ Register to be written |
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| 218 | * @param __VALUE__ Value to be written in the register |
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| 219 | * @retval None |
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| 220 | */ |
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| 221 | #define LL_RTC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
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| 222 | |||
| 223 | /** |
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| 224 | * @brief Read a value in RTC register |
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| 225 | * @param __INSTANCE__ RTC Instance |
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| 226 | * @param __REG__ Register to be read |
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| 227 | * @retval Register value |
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| 228 | */ |
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| 229 | #define LL_RTC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
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| 230 | /** |
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| 231 | * @} |
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| 232 | */ |
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| 233 | |||
| 234 | /** @defgroup RTC_LL_EM_Convert Convert helper Macros |
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| 235 | * @{ |
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| 236 | */ |
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| 237 | |||
| 238 | /** |
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| 239 | * @brief Helper macro to convert a value from 2 digit decimal format to BCD format |
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| 240 | * @param __VALUE__ Byte to be converted |
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| 241 | * @retval Converted byte |
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| 242 | */ |
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| 243 | #define __LL_RTC_CONVERT_BIN2BCD(__VALUE__) (uint8_t)((((__VALUE__) / 10U) << 4U) | ((__VALUE__) % 10U)) |
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| 244 | |||
| 245 | /** |
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| 246 | * @brief Helper macro to convert a value from BCD format to 2 digit decimal format |
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| 247 | * @param __VALUE__ BCD value to be converted |
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| 248 | * @retval Converted byte |
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| 249 | */ |
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| 250 | #define __LL_RTC_CONVERT_BCD2BIN(__VALUE__) (uint8_t)(((uint8_t)((__VALUE__) & (uint8_t)0xF0U) >> (uint8_t)0x4U) * 10U + ((__VALUE__) & (uint8_t)0x0FU)) |
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| 251 | |||
| 252 | /** |
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| 253 | * @} |
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| 254 | */ |
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| 255 | |||
| 256 | /** |
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| 257 | * @} |
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| 258 | */ |
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| 259 | |||
| 260 | /* Exported functions --------------------------------------------------------*/ |
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| 261 | /** @defgroup RTC_LL_Exported_Functions RTC Exported Functions |
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| 262 | * @{ |
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| 263 | */ |
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| 264 | |||
| 265 | /** @defgroup RTC_LL_EF_Configuration Configuration |
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| 266 | * @{ |
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| 267 | */ |
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| 268 | |||
| 269 | /** |
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| 270 | * @brief Set Asynchronous prescaler factor |
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| 271 | * @rmtoll PRLH PRL LL_RTC_SetAsynchPrescaler\n |
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| 272 | * @rmtoll PRLL PRL LL_RTC_SetAsynchPrescaler\n |
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| 273 | * @param RTCx RTC Instance |
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| 274 | * @param AsynchPrescaler Value between Min_Data = 0 and Max_Data = 0xFFFFF |
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| 275 | * @retval None |
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| 276 | */ |
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| 277 | __STATIC_INLINE void LL_RTC_SetAsynchPrescaler(RTC_TypeDef *RTCx, uint32_t AsynchPrescaler) |
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| 278 | { |
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| 279 | MODIFY_REG(RTCx->PRLH, RTC_PRLH_PRL, (AsynchPrescaler >> 16)); |
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| 280 | MODIFY_REG(RTCx->PRLL, RTC_PRLL_PRL, (AsynchPrescaler & RTC_PRLL_PRL)); |
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| 281 | } |
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| 282 | |||
| 283 | /** |
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| 284 | * @brief Get Asynchronous prescaler factor |
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| 285 | * @rmtoll DIVH DIV LL_RTC_GetDivider\n |
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| 286 | * @rmtoll DIVL DIV LL_RTC_GetDivider\n |
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| 287 | * @param RTCx RTC Instance |
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| 288 | * @retval Value between Min_Data = 0 and Max_Data = 0xFFFFF |
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| 289 | */ |
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| 290 | __STATIC_INLINE uint32_t LL_RTC_GetDivider(RTC_TypeDef *RTCx) |
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| 291 | { |
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| 292 | register uint16_t Highprescaler = 0, Lowprescaler = 0; |
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| 293 | Highprescaler = READ_REG(RTCx->DIVH & RTC_DIVH_RTC_DIV); |
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| 294 | Lowprescaler = READ_REG(RTCx->DIVL & RTC_DIVL_RTC_DIV); |
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| 295 | |||
| 296 | return (((uint32_t) Highprescaler << 16U) | Lowprescaler); |
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| 297 | } |
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| 298 | |||
| 299 | /** |
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| 300 | * @brief Set Output Source |
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| 301 | * @rmtoll RTCCR CCO LL_RTC_SetOutputSource |
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| 302 | * @rmtoll RTCCR ASOE LL_RTC_SetOutputSource |
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| 303 | * @rmtoll RTCCR ASOS LL_RTC_SetOutputSource |
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| 304 | * @param BKPx BKP Instance |
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| 305 | * @param OutputSource This parameter can be one of the following values: |
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| 306 | * @arg @ref LL_RTC_CALIB_OUTPUT_NONE |
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| 307 | * @arg @ref LL_RTC_CALIB_OUTPUT_RTCCLOCK |
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| 308 | * @arg @ref LL_RTC_CALIB_OUTPUT_ALARM |
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| 309 | * @arg @ref LL_RTC_CALIB_OUTPUT_SECOND |
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| 310 | * @retval None |
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| 311 | */ |
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| 312 | __STATIC_INLINE void LL_RTC_SetOutputSource(BKP_TypeDef *BKPx, uint32_t OutputSource) |
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| 313 | { |
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| 314 | MODIFY_REG(BKPx->RTCCR, (BKP_RTCCR_CCO | BKP_RTCCR_ASOE | BKP_RTCCR_ASOS), OutputSource); |
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| 315 | } |
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| 316 | |||
| 317 | /** |
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| 318 | * @brief Get Output Source |
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| 319 | * @rmtoll RTCCR CCO LL_RTC_GetOutPutSource |
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| 320 | * @rmtoll RTCCR ASOE LL_RTC_GetOutPutSource |
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| 321 | * @rmtoll RTCCR ASOS LL_RTC_GetOutPutSource |
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| 322 | * @param BKPx BKP Instance |
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| 323 | * @retval Returned value can be one of the following values: |
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| 324 | * @arg @ref LL_RTC_CALIB_OUTPUT_NONE |
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| 325 | * @arg @ref LL_RTC_CALIB_OUTPUT_RTCCLOCK |
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| 326 | * @arg @ref LL_RTC_CALIB_OUTPUT_ALARM |
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| 327 | * @arg @ref LL_RTC_CALIB_OUTPUT_SECOND |
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| 328 | */ |
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| 329 | __STATIC_INLINE uint32_t LL_RTC_GetOutPutSource(BKP_TypeDef *BKPx) |
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| 330 | { |
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| 331 | return (uint32_t)(READ_BIT(BKPx->RTCCR, (BKP_RTCCR_CCO | BKP_RTCCR_ASOE | BKP_RTCCR_ASOS))); |
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| 332 | } |
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| 333 | |||
| 334 | /** |
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| 335 | * @brief Enable the write protection for RTC registers. |
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| 336 | * @rmtoll CRL CNF LL_RTC_EnableWriteProtection |
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| 337 | * @param RTCx RTC Instance |
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| 338 | * @retval None |
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| 339 | */ |
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| 340 | __STATIC_INLINE void LL_RTC_EnableWriteProtection(RTC_TypeDef *RTCx) |
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| 341 | { |
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| 342 | CLEAR_BIT(RTCx->CRL, RTC_CRL_CNF); |
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| 343 | } |
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| 344 | |||
| 345 | /** |
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| 346 | * @brief Disable the write protection for RTC registers. |
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| 347 | * @rmtoll CRL RTC_CRL_CNF LL_RTC_DisableWriteProtection |
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| 348 | * @param RTCx RTC Instance |
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| 349 | * @retval None |
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| 350 | */ |
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| 351 | __STATIC_INLINE void LL_RTC_DisableWriteProtection(RTC_TypeDef *RTCx) |
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| 352 | { |
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| 353 | SET_BIT(RTCx->CRL, RTC_CRL_CNF); |
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| 354 | } |
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| 355 | |||
| 356 | /** |
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| 357 | * @} |
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| 358 | */ |
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| 359 | |||
| 360 | /** @defgroup RTC_LL_EF_Time Time |
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| 361 | * @{ |
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| 362 | */ |
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| 363 | |||
| 364 | /** |
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| 365 | * @brief Set time counter in BCD format |
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| 366 | * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. |
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| 367 | * @note It can be written in initialization mode only (@ref LL_RTC_EnterInitMode function) |
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| 368 | * @rmtoll CNTH CNT LL_RTC_TIME_Set\n |
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| 369 | * CNTL CNT LL_RTC_TIME_Set\n |
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| 370 | * @param RTCx RTC Instance |
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| 371 | * @param TimeCounter Value between Min_Data=0x00 and Max_Data=0xFFFFF |
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| 372 | * @retval None |
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| 373 | */ |
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| 374 | __STATIC_INLINE void LL_RTC_TIME_Set(RTC_TypeDef *RTCx, uint32_t TimeCounter) |
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| 375 | { |
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| 376 | /* Set RTC COUNTER MSB word */ |
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| 377 | WRITE_REG(RTCx->CNTH, (TimeCounter >> 16U)); |
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| 378 | /* Set RTC COUNTER LSB word */ |
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| 379 | WRITE_REG(RTCx->CNTL, (TimeCounter & RTC_CNTL_RTC_CNT)); |
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| 380 | } |
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| 381 | |||
| 382 | /** |
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| 383 | * @brief Get time counter in BCD format |
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| 384 | * @rmtoll CNTH CNT LL_RTC_TIME_Get\n |
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| 385 | * CNTL CNT LL_RTC_TIME_Get\n |
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| 386 | * @param RTCx RTC Instance |
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| 387 | * @retval Value between Min_Data = 0 and Max_Data = 0xFFFFF |
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| 388 | */ |
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| 389 | __STATIC_INLINE uint32_t LL_RTC_TIME_Get(RTC_TypeDef *RTCx) |
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| 390 | { |
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| 391 | register uint16_t high = 0, low = 0; |
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| 392 | |||
| 393 | high = READ_REG(RTCx->CNTH & RTC_CNTH_RTC_CNT); |
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| 394 | low = READ_REG(RTCx->CNTL & RTC_CNTL_RTC_CNT); |
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| 395 | return ((uint32_t)(((uint32_t) high << 16U) | low)); |
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| 396 | } |
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| 397 | |||
| 398 | /** |
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| 399 | * @} |
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| 400 | */ |
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| 401 | |||
| 402 | /** @defgroup RTC_LL_EF_ALARM ALARM |
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| 403 | * @{ |
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| 404 | */ |
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| 405 | |||
| 406 | /** |
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| 407 | * @brief Set Alarm Counter |
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| 408 | * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. |
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| 409 | * @rmtoll ALRH ALR LL_RTC_ALARM_Set\n |
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| 410 | * @rmtoll ALRL ALR LL_RTC_ALARM_Set\n |
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| 411 | * @param RTCx RTC Instance |
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| 412 | * @param AlarmCounter Value between Min_Data=0x00 and Max_Data=0xFFFFF |
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| 413 | * @retval None |
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| 414 | */ |
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| 415 | __STATIC_INLINE void LL_RTC_ALARM_Set(RTC_TypeDef *RTCx, uint32_t AlarmCounter) |
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| 416 | { |
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| 417 | /* Set RTC COUNTER MSB word */ |
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| 418 | WRITE_REG(RTCx->ALRH, (AlarmCounter >> 16)); |
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| 419 | /* Set RTC COUNTER LSB word */ |
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| 420 | WRITE_REG(RTCx->ALRL, (AlarmCounter & RTC_ALRL_RTC_ALR)); |
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| 421 | } |
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| 422 | |||
| 423 | /** |
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| 424 | * @brief Get Alarm Counter |
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| 425 | * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. |
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| 426 | * @rmtoll ALRH ALR LL_RTC_ALARM_Get\n |
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| 427 | * @rmtoll ALRL ALR LL_RTC_ALARM_Get\n |
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| 428 | * @param RTCx RTC Instance |
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| 429 | * @retval None |
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| 430 | */ |
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| 431 | __STATIC_INLINE uint32_t LL_RTC_ALARM_Get(RTC_TypeDef *RTCx) |
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| 432 | { |
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| 433 | register uint16_t high = 0, low = 0; |
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| 434 | |||
| 435 | high = READ_REG(RTCx->ALRH & RTC_ALRH_RTC_ALR); |
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| 436 | low = READ_REG(RTCx->ALRL & RTC_ALRL_RTC_ALR); |
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| 437 | |||
| 438 | return (((uint32_t) high << 16U) | low); |
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| 439 | } |
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| 440 | |||
| 441 | /** |
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| 442 | * @} |
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| 443 | */ |
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| 444 | |||
| 445 | /** @defgroup RTC_LL_EF_Tamper Tamper |
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| 446 | * @{ |
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| 447 | */ |
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| 448 | |||
| 449 | /** |
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| 450 | * @brief Enable RTC_TAMPx input detection |
||
| 451 | * @rmtoll CR TPE LL_RTC_TAMPER_Enable\n |
||
| 452 | * @retval None |
||
| 453 | */ |
||
| 454 | __STATIC_INLINE void LL_RTC_TAMPER_Enable(BKP_TypeDef *BKPx) |
||
| 455 | { |
||
| 456 | SET_BIT(BKPx->CR, BKP_CR_TPE); |
||
| 457 | } |
||
| 458 | |||
| 459 | /** |
||
| 460 | * @brief Disable RTC_TAMPx Tamper |
||
| 461 | * @rmtoll CR TPE LL_RTC_TAMPER_Disable\n |
||
| 462 | * @retval None |
||
| 463 | */ |
||
| 464 | __STATIC_INLINE void LL_RTC_TAMPER_Disable(BKP_TypeDef *BKPx) |
||
| 465 | { |
||
| 466 | CLEAR_BIT(BKP->CR, BKP_CR_TPE); |
||
| 467 | } |
||
| 468 | |||
| 469 | /** |
||
| 470 | * @brief Enable Active level for Tamper input |
||
| 471 | * @rmtoll CR TPAL LL_RTC_TAMPER_SetActiveLevel\n |
||
| 472 | * @param BKPx BKP Instance |
||
| 473 | * @param Tamper This parameter can be a combination of the following values: |
||
| 474 | * @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_LOW |
||
| 475 | * @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_HIGH |
||
| 476 | * @retval None |
||
| 477 | */ |
||
| 478 | __STATIC_INLINE void LL_RTC_TAMPER_SetActiveLevel(BKP_TypeDef *BKPx, uint32_t Tamper) |
||
| 479 | { |
||
| 480 | MODIFY_REG(BKPx->CR, BKP_CR_TPAL, Tamper); |
||
| 481 | } |
||
| 482 | |||
| 483 | /** |
||
| 484 | * @brief Disable Active level for Tamper input |
||
| 485 | * @rmtoll CR TPAL LL_RTC_TAMPER_SetActiveLevel\n |
||
| 486 | * @retval None |
||
| 487 | */ |
||
| 488 | __STATIC_INLINE uint32_t LL_RTC_TAMPER_GetActiveLevel(BKP_TypeDef *BKPx) |
||
| 489 | { |
||
| 490 | return (uint32_t)(READ_BIT(BKPx->CR, BKP_CR_TPAL)); |
||
| 491 | } |
||
| 492 | |||
| 493 | /** |
||
| 494 | * @} |
||
| 495 | */ |
||
| 496 | |||
| 497 | /** @defgroup RTC_LL_EF_Backup_Registers Backup_Registers |
||
| 498 | * @{ |
||
| 499 | */ |
||
| 500 | |||
| 501 | /** |
||
| 502 | * @brief Writes a data in a specified RTC Backup data register. |
||
| 503 | * @rmtoll BKPDR DR LL_RTC_BKP_SetRegister |
||
| 504 | * @param BKPx BKP Instance |
||
| 505 | * @param BackupRegister This parameter can be one of the following values: |
||
| 506 | * @arg @ref LL_RTC_BKP_DR1 |
||
| 507 | * @arg @ref LL_RTC_BKP_DR2 |
||
| 508 | * @arg @ref LL_RTC_BKP_DR3 |
||
| 509 | * @arg @ref LL_RTC_BKP_DR4 |
||
| 510 | * @arg @ref LL_RTC_BKP_DR5 |
||
| 511 | * @arg @ref LL_RTC_BKP_DR6 |
||
| 512 | * @arg @ref LL_RTC_BKP_DR7 |
||
| 513 | * @arg @ref LL_RTC_BKP_DR8 |
||
| 514 | * @arg @ref LL_RTC_BKP_DR9 |
||
| 515 | * @arg @ref LL_RTC_BKP_DR10 |
||
| 516 | * @arg @ref LL_RTC_BKP_DR11 (*) |
||
| 517 | * @arg @ref LL_RTC_BKP_DR12 (*) |
||
| 518 | * @arg @ref LL_RTC_BKP_DR13 (*) |
||
| 519 | * @arg @ref LL_RTC_BKP_DR14 (*) |
||
| 520 | * @arg @ref LL_RTC_BKP_DR15 (*) |
||
| 521 | * @arg @ref LL_RTC_BKP_DR16 (*) |
||
| 522 | * @arg @ref LL_RTC_BKP_DR17 (*) |
||
| 523 | * @arg @ref LL_RTC_BKP_DR18 (*) |
||
| 524 | * @arg @ref LL_RTC_BKP_DR19 (*) |
||
| 525 | * @arg @ref LL_RTC_BKP_DR20 (*) |
||
| 526 | * @arg @ref LL_RTC_BKP_DR21 (*) |
||
| 527 | * @arg @ref LL_RTC_BKP_DR22 (*) |
||
| 528 | * @arg @ref LL_RTC_BKP_DR23 (*) |
||
| 529 | * @arg @ref LL_RTC_BKP_DR24 (*) |
||
| 530 | * @arg @ref LL_RTC_BKP_DR25 (*) |
||
| 531 | * @arg @ref LL_RTC_BKP_DR26 (*) |
||
| 532 | * @arg @ref LL_RTC_BKP_DR27 (*) |
||
| 533 | * @arg @ref LL_RTC_BKP_DR28 (*) |
||
| 534 | * @arg @ref LL_RTC_BKP_DR29 (*) |
||
| 535 | * @arg @ref LL_RTC_BKP_DR30 (*) |
||
| 536 | * @arg @ref LL_RTC_BKP_DR31 (*) |
||
| 537 | * @arg @ref LL_RTC_BKP_DR32 (*) |
||
| 538 | * @arg @ref LL_RTC_BKP_DR33 (*) |
||
| 539 | * @arg @ref LL_RTC_BKP_DR34 (*) |
||
| 540 | * @arg @ref LL_RTC_BKP_DR35 (*) |
||
| 541 | * @arg @ref LL_RTC_BKP_DR36 (*) |
||
| 542 | * @arg @ref LL_RTC_BKP_DR37 (*) |
||
| 543 | * @arg @ref LL_RTC_BKP_DR38 (*) |
||
| 544 | * @arg @ref LL_RTC_BKP_DR39 (*) |
||
| 545 | * @arg @ref LL_RTC_BKP_DR40 (*) |
||
| 546 | * @arg @ref LL_RTC_BKP_DR41 (*) |
||
| 547 | * @arg @ref LL_RTC_BKP_DR42 (*) |
||
| 548 | * (*) value not defined in all devices. |
||
| 549 | * @param Data Value between Min_Data=0x00 and Max_Data=0xFFFFFFFF |
||
| 550 | * @retval None |
||
| 551 | */ |
||
| 552 | __STATIC_INLINE void LL_RTC_BKP_SetRegister(BKP_TypeDef *BKPx, uint32_t BackupRegister, uint32_t Data) |
||
| 553 | { |
||
| 554 | register uint32_t tmp = 0U; |
||
| 555 | |||
| 556 | tmp = (uint32_t)BKP_BASE; |
||
| 557 | tmp += (BackupRegister * 4U); |
||
| 558 | |||
| 559 | /* Write the specified register */ |
||
| 560 | *(__IO uint32_t *)tmp = (uint32_t)Data; |
||
| 561 | } |
||
| 562 | |||
| 563 | /** |
||
| 564 | * @brief Reads data from the specified RTC Backup data Register. |
||
| 565 | * @rmtoll BKPDR DR LL_RTC_BKP_GetRegister |
||
| 566 | * @param BKPx BKP Instance |
||
| 567 | * @param BackupRegister This parameter can be one of the following values: |
||
| 568 | * @arg @ref LL_RTC_BKP_DR1 |
||
| 569 | * @arg @ref LL_RTC_BKP_DR2 |
||
| 570 | * @arg @ref LL_RTC_BKP_DR3 |
||
| 571 | * @arg @ref LL_RTC_BKP_DR4 |
||
| 572 | * @arg @ref LL_RTC_BKP_DR5 |
||
| 573 | * @arg @ref LL_RTC_BKP_DR6 |
||
| 574 | * @arg @ref LL_RTC_BKP_DR7 |
||
| 575 | * @arg @ref LL_RTC_BKP_DR8 |
||
| 576 | * @arg @ref LL_RTC_BKP_DR9 |
||
| 577 | * @arg @ref LL_RTC_BKP_DR10 |
||
| 578 | * @arg @ref LL_RTC_BKP_DR11 (*) |
||
| 579 | * @arg @ref LL_RTC_BKP_DR12 (*) |
||
| 580 | * @arg @ref LL_RTC_BKP_DR13 (*) |
||
| 581 | * @arg @ref LL_RTC_BKP_DR14 (*) |
||
| 582 | * @arg @ref LL_RTC_BKP_DR15 (*) |
||
| 583 | * @arg @ref LL_RTC_BKP_DR16 (*) |
||
| 584 | * @arg @ref LL_RTC_BKP_DR17 (*) |
||
| 585 | * @arg @ref LL_RTC_BKP_DR18 (*) |
||
| 586 | * @arg @ref LL_RTC_BKP_DR19 (*) |
||
| 587 | * @arg @ref LL_RTC_BKP_DR20 (*) |
||
| 588 | * @arg @ref LL_RTC_BKP_DR21 (*) |
||
| 589 | * @arg @ref LL_RTC_BKP_DR22 (*) |
||
| 590 | * @arg @ref LL_RTC_BKP_DR23 (*) |
||
| 591 | * @arg @ref LL_RTC_BKP_DR24 (*) |
||
| 592 | * @arg @ref LL_RTC_BKP_DR25 (*) |
||
| 593 | * @arg @ref LL_RTC_BKP_DR26 (*) |
||
| 594 | * @arg @ref LL_RTC_BKP_DR27 (*) |
||
| 595 | * @arg @ref LL_RTC_BKP_DR28 (*) |
||
| 596 | * @arg @ref LL_RTC_BKP_DR29 (*) |
||
| 597 | * @arg @ref LL_RTC_BKP_DR30 (*) |
||
| 598 | * @arg @ref LL_RTC_BKP_DR31 (*) |
||
| 599 | * @arg @ref LL_RTC_BKP_DR32 (*) |
||
| 600 | * @arg @ref LL_RTC_BKP_DR33 (*) |
||
| 601 | * @arg @ref LL_RTC_BKP_DR34 (*) |
||
| 602 | * @arg @ref LL_RTC_BKP_DR35 (*) |
||
| 603 | * @arg @ref LL_RTC_BKP_DR36 (*) |
||
| 604 | * @arg @ref LL_RTC_BKP_DR37 (*) |
||
| 605 | * @arg @ref LL_RTC_BKP_DR38 (*) |
||
| 606 | * @arg @ref LL_RTC_BKP_DR39 (*) |
||
| 607 | * @arg @ref LL_RTC_BKP_DR40 (*) |
||
| 608 | * @arg @ref LL_RTC_BKP_DR41 (*) |
||
| 609 | * @arg @ref LL_RTC_BKP_DR42 (*) |
||
| 610 | * @retval Value between Min_Data=0x00 and Max_Data=0xFFFFFFFF |
||
| 611 | */ |
||
| 612 | __STATIC_INLINE uint32_t LL_RTC_BKP_GetRegister(BKP_TypeDef *BKPx, uint32_t BackupRegister) |
||
| 613 | { |
||
| 614 | register uint32_t tmp = 0U; |
||
| 615 | |||
| 616 | tmp = (uint32_t)BKP_BASE; |
||
| 617 | tmp += (BackupRegister * 4U); |
||
| 618 | |||
| 619 | /* Read the specified register */ |
||
| 620 | return ((*(__IO uint32_t *)tmp) & BKP_DR1_D); |
||
| 621 | } |
||
| 622 | |||
| 623 | /** |
||
| 624 | * @} |
||
| 625 | */ |
||
| 626 | |||
| 627 | /** @defgroup RTC_LL_EF_Calibration Calibration |
||
| 628 | * @{ |
||
| 629 | */ |
||
| 630 | |||
| 631 | /** |
||
| 632 | * @brief Set the coarse digital calibration |
||
| 633 | * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. |
||
| 634 | * @note It can be written in initialization mode only (@ref LL_RTC_EnterInitMode function) |
||
| 635 | * @rmtoll RTCCR CAL LL_RTC_CAL_SetCoarseDigital\n |
||
| 636 | * @param BKPx RTC Instance |
||
| 637 | * @param Value value of coarse calibration expressed in ppm (coded on 5 bits) |
||
| 638 | * @note This Calibration value should be between 0 and 121 when using positive sign with a 4-ppm step. |
||
| 639 | * @retval None |
||
| 640 | */ |
||
| 641 | __STATIC_INLINE void LL_RTC_CAL_SetCoarseDigital(BKP_TypeDef *BKPx, uint32_t Value) |
||
| 642 | { |
||
| 643 | MODIFY_REG(BKPx->RTCCR, BKP_RTCCR_CAL, Value); |
||
| 644 | } |
||
| 645 | |||
| 646 | /** |
||
| 647 | * @brief Get the coarse digital calibration value |
||
| 648 | * @rmtoll RTCCR CAL LL_RTC_CAL_SetCoarseDigital\n |
||
| 649 | * @param BKPx BKP Instance |
||
| 650 | * @retval value of coarse calibration expressed in ppm (coded on 5 bits) |
||
| 651 | */ |
||
| 652 | __STATIC_INLINE uint32_t LL_RTC_CAL_GetCoarseDigital(BKP_TypeDef *BKPx) |
||
| 653 | { |
||
| 654 | return (uint32_t)(READ_BIT(BKPx->RTCCR, BKP_RTCCR_CAL)); |
||
| 655 | } |
||
| 656 | /** |
||
| 657 | * @} |
||
| 658 | */ |
||
| 659 | |||
| 660 | /** @defgroup RTC_LL_EF_FLAG_Management FLAG_Management |
||
| 661 | * @{ |
||
| 662 | */ |
||
| 663 | |||
| 664 | /** |
||
| 665 | * @brief Get RTC_TAMPI Interruption detection flag |
||
| 666 | * @rmtoll CSR TIF LL_RTC_IsActiveFlag_TAMPI |
||
| 667 | * @param BKPx BKP Instance |
||
| 668 | * @retval State of bit (1 or 0). |
||
| 669 | */ |
||
| 670 | __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMPI(BKP_TypeDef *BKPx) |
||
| 671 | { |
||
| 672 | return (READ_BIT(BKPx->CSR, BKP_CSR_TIF) == (BKP_CSR_TIF)); |
||
| 673 | } |
||
| 674 | |||
| 675 | /** |
||
| 676 | * @brief Clear RTC_TAMP Interruption detection flag |
||
| 677 | * @rmtoll CSR CTI LL_RTC_ClearFlag_TAMPI |
||
| 678 | * @param BKPx BKP Instance |
||
| 679 | * @retval None |
||
| 680 | */ |
||
| 681 | __STATIC_INLINE void LL_RTC_ClearFlag_TAMPI(BKP_TypeDef *BKPx) |
||
| 682 | { |
||
| 683 | SET_BIT(BKPx->CSR, BKP_CSR_CTI); |
||
| 684 | } |
||
| 685 | |||
| 686 | /** |
||
| 687 | * @brief Get RTC_TAMPE Event detection flag |
||
| 688 | * @rmtoll CSR TEF LL_RTC_IsActiveFlag_TAMPE |
||
| 689 | * @param BKPx BKP Instance |
||
| 690 | * @retval State of bit (1 or 0). |
||
| 691 | */ |
||
| 692 | __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMPE(BKP_TypeDef *BKPx) |
||
| 693 | { |
||
| 694 | return (READ_BIT(BKPx->CSR, BKP_CSR_TEF) == (BKP_CSR_TEF)); |
||
| 695 | } |
||
| 696 | |||
| 697 | /** |
||
| 698 | * @brief Clear RTC_TAMPE Even detection flag |
||
| 699 | * @rmtoll CSR CTE LL_RTC_ClearFlag_TAMPE |
||
| 700 | * @param BKPx BKP Instance |
||
| 701 | * @retval None |
||
| 702 | */ |
||
| 703 | __STATIC_INLINE void LL_RTC_ClearFlag_TAMPE(BKP_TypeDef *BKPx) |
||
| 704 | { |
||
| 705 | SET_BIT(BKPx->CSR, BKP_CSR_CTE); |
||
| 706 | } |
||
| 707 | |||
| 708 | /** |
||
| 709 | * @brief Get Alarm flag |
||
| 710 | * @rmtoll CRL ALRF LL_RTC_IsActiveFlag_ALR |
||
| 711 | * @param RTCx RTC Instance |
||
| 712 | * @retval State of bit (1 or 0). |
||
| 713 | */ |
||
| 714 | __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALR(RTC_TypeDef *RTCx) |
||
| 715 | { |
||
| 716 | return (READ_BIT(RTCx->CRL, RTC_CRL_ALRF) == (RTC_CRL_ALRF)); |
||
| 717 | } |
||
| 718 | |||
| 719 | /** |
||
| 720 | * @brief Clear Alarm flag |
||
| 721 | * @rmtoll CRL ALRF LL_RTC_ClearFlag_ALR |
||
| 722 | * @param RTCx RTC Instance |
||
| 723 | * @retval None |
||
| 724 | */ |
||
| 725 | __STATIC_INLINE void LL_RTC_ClearFlag_ALR(RTC_TypeDef *RTCx) |
||
| 726 | { |
||
| 727 | CLEAR_BIT(RTCx->CRL, RTC_CRL_ALRF); |
||
| 728 | } |
||
| 729 | |||
| 730 | /** |
||
| 731 | * @brief Get Registers synchronization flag |
||
| 732 | * @rmtoll CRL RSF LL_RTC_IsActiveFlag_RS |
||
| 733 | * @param RTCx RTC Instance |
||
| 734 | * @retval State of bit (1 or 0). |
||
| 735 | */ |
||
| 736 | __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RS(RTC_TypeDef *RTCx) |
||
| 737 | { |
||
| 738 | return (READ_BIT(RTCx->CRL, RTC_CRL_RSF) == (RTC_CRL_RSF)); |
||
| 739 | } |
||
| 740 | |||
| 741 | /** |
||
| 742 | * @brief Clear Registers synchronization flag |
||
| 743 | * @rmtoll CRL RSF LL_RTC_ClearFlag_RS |
||
| 744 | * @param RTCx RTC Instance |
||
| 745 | * @retval None |
||
| 746 | */ |
||
| 747 | __STATIC_INLINE void LL_RTC_ClearFlag_RS(RTC_TypeDef *RTCx) |
||
| 748 | { |
||
| 749 | CLEAR_BIT(RTCx->CRL, RTC_CRL_RSF); |
||
| 750 | } |
||
| 751 | |||
| 752 | /** |
||
| 753 | * @brief Get Registers OverFlow flag |
||
| 754 | * @rmtoll CRL OWF LL_RTC_IsActiveFlag_OW |
||
| 755 | * @param RTCx RTC Instance |
||
| 756 | * @retval State of bit (1 or 0). |
||
| 757 | */ |
||
| 758 | __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_OW(RTC_TypeDef *RTCx) |
||
| 759 | { |
||
| 760 | return (READ_BIT(RTCx->CRL, RTC_CRL_OWF) == (RTC_CRL_OWF)); |
||
| 761 | } |
||
| 762 | |||
| 763 | /** |
||
| 764 | * @brief Clear Registers OverFlow flag |
||
| 765 | * @rmtoll CRL OWF LL_RTC_ClearFlag_OW |
||
| 766 | * @param RTCx RTC Instance |
||
| 767 | * @retval None |
||
| 768 | */ |
||
| 769 | __STATIC_INLINE void LL_RTC_ClearFlag_OW(RTC_TypeDef *RTCx) |
||
| 770 | { |
||
| 771 | CLEAR_BIT(RTCx->CRL, RTC_CRL_OWF); |
||
| 772 | } |
||
| 773 | |||
| 774 | /** |
||
| 775 | * @brief Get Registers synchronization flag |
||
| 776 | * @rmtoll CRL SECF LL_RTC_IsActiveFlag_SEC |
||
| 777 | * @param RTCx RTC Instance |
||
| 778 | * @retval State of bit (1 or 0). |
||
| 779 | */ |
||
| 780 | __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_SEC(RTC_TypeDef *RTCx) |
||
| 781 | { |
||
| 782 | return (READ_BIT(RTCx->CRL, RTC_CRL_SECF) == (RTC_CRL_SECF)); |
||
| 783 | } |
||
| 784 | |||
| 785 | /** |
||
| 786 | * @brief Clear Registers synchronization flag |
||
| 787 | * @rmtoll CRL SECF LL_RTC_ClearFlag_SEC |
||
| 788 | * @param RTCx RTC Instance |
||
| 789 | * @retval None |
||
| 790 | */ |
||
| 791 | __STATIC_INLINE void LL_RTC_ClearFlag_SEC(RTC_TypeDef *RTCx) |
||
| 792 | { |
||
| 793 | CLEAR_BIT(RTCx->CRL, RTC_CRL_SECF); |
||
| 794 | } |
||
| 795 | |||
| 796 | /** |
||
| 797 | * @brief Get RTC Operation OFF status flag |
||
| 798 | * @rmtoll CRL RTOFF LL_RTC_IsActiveFlag_RTOF |
||
| 799 | * @param RTCx RTC Instance |
||
| 800 | * @retval State of bit (1 or 0). |
||
| 801 | */ |
||
| 802 | __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RTOF(RTC_TypeDef *RTCx) |
||
| 803 | { |
||
| 804 | return (READ_BIT(RTCx->CRL, RTC_CRL_RTOFF) == (RTC_CRL_RTOFF)); |
||
| 805 | } |
||
| 806 | |||
| 807 | /** |
||
| 808 | * @} |
||
| 809 | */ |
||
| 810 | |||
| 811 | /** @defgroup RTC_LL_EF_IT_Management IT_Management |
||
| 812 | * @{ |
||
| 813 | */ |
||
| 814 | |||
| 815 | /** |
||
| 816 | * @brief Enable Alarm interrupt |
||
| 817 | * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. |
||
| 818 | * @rmtoll CRH ALRIE LL_RTC_EnableIT_ALR |
||
| 819 | * @param RTCx RTC Instance |
||
| 820 | * @retval None |
||
| 821 | */ |
||
| 822 | __STATIC_INLINE void LL_RTC_EnableIT_ALR(RTC_TypeDef *RTCx) |
||
| 823 | { |
||
| 824 | SET_BIT(RTCx->CRH, RTC_CRH_ALRIE); |
||
| 825 | } |
||
| 826 | |||
| 827 | /** |
||
| 828 | * @brief Disable Alarm interrupt |
||
| 829 | * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. |
||
| 830 | * @rmtoll CRH ALRIE LL_RTC_DisableIT_ALR |
||
| 831 | * @param RTCx RTC Instance |
||
| 832 | * @retval None |
||
| 833 | */ |
||
| 834 | __STATIC_INLINE void LL_RTC_DisableIT_ALR(RTC_TypeDef *RTCx) |
||
| 835 | { |
||
| 836 | CLEAR_BIT(RTCx->CRH, RTC_CRH_ALRIE); |
||
| 837 | } |
||
| 838 | |||
| 839 | /** |
||
| 840 | * @brief Check if Alarm interrupt is enabled or not |
||
| 841 | * @rmtoll CRH ALRIE LL_RTC_IsEnabledIT_ALR |
||
| 842 | * @param RTCx RTC Instance |
||
| 843 | * @retval State of bit (1 or 0). |
||
| 844 | */ |
||
| 845 | __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALR(RTC_TypeDef *RTCx) |
||
| 846 | { |
||
| 847 | return (READ_BIT(RTCx->CRH, RTC_CRH_ALRIE) == (RTC_CRH_ALRIE)); |
||
| 848 | } |
||
| 849 | |||
| 850 | /** |
||
| 851 | * @brief Enable Second Interrupt interrupt |
||
| 852 | * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. |
||
| 853 | * @rmtoll CRH SECIE LL_RTC_EnableIT_SEC |
||
| 854 | * @param RTCx RTC Instance |
||
| 855 | * @retval None |
||
| 856 | */ |
||
| 857 | __STATIC_INLINE void LL_RTC_EnableIT_SEC(RTC_TypeDef *RTCx) |
||
| 858 | { |
||
| 859 | SET_BIT(RTCx->CRH, RTC_CRH_SECIE); |
||
| 860 | } |
||
| 861 | |||
| 862 | /** |
||
| 863 | * @brief Disable Second interrupt |
||
| 864 | * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. |
||
| 865 | * @rmtoll CRH SECIE LL_RTC_DisableIT_SEC |
||
| 866 | * @param RTCx RTC Instance |
||
| 867 | * @retval None |
||
| 868 | */ |
||
| 869 | __STATIC_INLINE void LL_RTC_DisableIT_SEC(RTC_TypeDef *RTCx) |
||
| 870 | { |
||
| 871 | CLEAR_BIT(RTCx->CRH, RTC_CRH_SECIE); |
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| 872 | } |
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| 873 | |||
| 874 | /** |
||
| 875 | * @brief Check if Second interrupt is enabled or not |
||
| 876 | * @rmtoll CRH SECIE LL_RTC_IsEnabledIT_SEC |
||
| 877 | * @param RTCx RTC Instance |
||
| 878 | * @retval State of bit (1 or 0). |
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| 879 | */ |
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| 880 | __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_SEC(RTC_TypeDef *RTCx) |
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| 881 | { |
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| 882 | return (READ_BIT(RTCx->CRH, RTC_CRH_SECIE) == (RTC_CRH_SECIE)); |
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| 883 | } |
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| 884 | |||
| 885 | /** |
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| 886 | * @brief Enable OverFlow interrupt |
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| 887 | * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. |
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| 888 | * @rmtoll CRH OWIE LL_RTC_EnableIT_OW |
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| 889 | * @param RTCx RTC Instance |
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| 890 | * @retval None |
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| 891 | */ |
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| 892 | __STATIC_INLINE void LL_RTC_EnableIT_OW(RTC_TypeDef *RTCx) |
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| 893 | { |
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| 894 | SET_BIT(RTCx->CRH, RTC_CRH_OWIE); |
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| 895 | } |
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| 896 | |||
| 897 | /** |
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| 898 | * @brief Disable OverFlow interrupt |
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| 899 | * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before. |
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| 900 | * @rmtoll CRH OWIE LL_RTC_DisableIT_OW |
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| 901 | * @param RTCx RTC Instance |
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| 902 | * @retval None |
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| 903 | */ |
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| 904 | __STATIC_INLINE void LL_RTC_DisableIT_OW(RTC_TypeDef *RTCx) |
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| 905 | { |
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| 906 | CLEAR_BIT(RTCx->CRH, RTC_CRH_OWIE); |
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| 907 | } |
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| 908 | |||
| 909 | /** |
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| 910 | * @brief Check if OverFlow interrupt is enabled or not |
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| 911 | * @rmtoll CRH OWIE LL_RTC_IsEnabledIT_OW |
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| 912 | * @param RTCx RTC Instance |
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| 913 | * @retval State of bit (1 or 0). |
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| 914 | */ |
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| 915 | __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_OW(RTC_TypeDef *RTCx) |
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| 916 | { |
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| 917 | return (READ_BIT(RTCx->CRH, RTC_CRH_OWIE) == (RTC_CRH_OWIE)); |
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| 918 | } |
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| 919 | |||
| 920 | /** |
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| 921 | * @brief Enable Tamper interrupt |
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| 922 | * @rmtoll CSR TPIE LL_RTC_EnableIT_TAMP |
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| 923 | * @param BKPx BKP Instance |
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| 924 | * @retval None |
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| 925 | */ |
||
| 926 | __STATIC_INLINE void LL_RTC_EnableIT_TAMP(BKP_TypeDef *BKPx) |
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| 927 | { |
||
| 928 | SET_BIT(BKPx->CSR, BKP_CSR_TPIE); |
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| 929 | } |
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| 930 | |||
| 931 | /** |
||
| 932 | * @brief Disable Tamper interrupt |
||
| 933 | * @rmtoll CSR TPIE LL_RTC_EnableIT_TAMP |
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| 934 | * @param BKPx BKP Instance |
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| 935 | * @retval None |
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| 936 | */ |
||
| 937 | __STATIC_INLINE void LL_RTC_DisableIT_TAMP(BKP_TypeDef *BKPx) |
||
| 938 | { |
||
| 939 | CLEAR_BIT(BKPx->CSR, BKP_CSR_TPIE); |
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| 940 | } |
||
| 941 | |||
| 942 | /** |
||
| 943 | * @brief Check if all the TAMPER interrupts are enabled or not |
||
| 944 | * @rmtoll CSR TPIE LL_RTC_IsEnabledIT_TAMP |
||
| 945 | * @param BKPx BKP Instance |
||
| 946 | * @retval State of bit (1 or 0). |
||
| 947 | */ |
||
| 948 | __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP(BKP_TypeDef *BKPx) |
||
| 949 | { |
||
| 950 | return (READ_BIT(BKPx->CSR, BKP_CSR_TPIE) == BKP_CSR_TPIE); |
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| 951 | } |
||
| 952 | /** |
||
| 953 | * @} |
||
| 954 | */ |
||
| 955 | |||
| 956 | #if defined(USE_FULL_LL_DRIVER) |
||
| 957 | /** @defgroup RTC_LL_EF_Init Initialization and de-initialization functions |
||
| 958 | * @{ |
||
| 959 | */ |
||
| 960 | |||
| 961 | ErrorStatus LL_RTC_DeInit(RTC_TypeDef *RTCx); |
||
| 962 | ErrorStatus LL_RTC_Init(RTC_TypeDef *RTCx, LL_RTC_InitTypeDef *RTC_InitStruct); |
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| 963 | void LL_RTC_StructInit(LL_RTC_InitTypeDef *RTC_InitStruct); |
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| 964 | ErrorStatus LL_RTC_TIME_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_TimeTypeDef *RTC_TimeStruct); |
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| 965 | void LL_RTC_TIME_StructInit(LL_RTC_TimeTypeDef *RTC_TimeStruct); |
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| 966 | ErrorStatus LL_RTC_ALARM_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_AlarmTypeDef *RTC_AlarmStruct); |
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| 967 | void LL_RTC_ALARM_StructInit(LL_RTC_AlarmTypeDef *RTC_AlarmStruct); |
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| 968 | ErrorStatus LL_RTC_EnterInitMode(RTC_TypeDef *RTCx); |
||
| 969 | ErrorStatus LL_RTC_ExitInitMode(RTC_TypeDef *RTCx); |
||
| 970 | ErrorStatus LL_RTC_WaitForSynchro(RTC_TypeDef *RTCx); |
||
| 971 | ErrorStatus LL_RTC_TIME_SetCounter(RTC_TypeDef *RTCx, uint32_t TimeCounter); |
||
| 972 | ErrorStatus LL_RTC_ALARM_SetCounter(RTC_TypeDef *RTCx, uint32_t AlarmCounter); |
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| 973 | |||
| 974 | /** |
||
| 975 | * @} |
||
| 976 | */ |
||
| 977 | #endif /* USE_FULL_LL_DRIVER */ |
||
| 978 | |||
| 979 | /** |
||
| 980 | * @} |
||
| 981 | */ |
||
| 982 | |||
| 983 | /** |
||
| 984 | * @} |
||
| 985 | */ |
||
| 986 | |||
| 987 | /** |
||
| 988 | * @} |
||
| 989 | */ |
||
| 990 | |||
| 991 | #endif /* defined(RTC) */ |
||
| 992 | |||
| 993 | /** |
||
| 994 | * @} |
||
| 995 | */ |
||
| 996 | |||
| 997 | #ifdef __cplusplus |
||
| 998 | } |
||
| 999 | #endif |
||
| 1000 | |||
| 1001 | #endif /* __STM32F1xx_LL_RTC_H */ |
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| 1002 | |||
| 1003 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |