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2 mjames 1
/**
2
  *************** (C) COPYRIGHT 2017 STMicroelectronics ************************
3
  * @file      startup_stm32f103xe.s
4
  * @author    MCD Application Team
5
  * @brief     STM32F103xE Devices vector table for Atollic toolchain.
6
  *            This module performs:
7
  *                - Set the initial SP
8
  *                - Set the initial PC == Reset_Handler,
9
  *                - Set the vector table entries with the exceptions ISR address
10
  *                - Configure the clock system   
11
  *                - Configure external SRAM mounted on STM3210E-EVAL board
12
  *                  to be used as data memory (optional, to be enabled by user)
13
  *                - Branches to main in the C library (which eventually
14
  *                  calls main()).
15
  *            After Reset the Cortex-M3 processor is in Thread mode,
16
  *            priority is Privileged, and the Stack is set to Main.
17
  ******************************************************************************
18
  * @attention
19
  *
20
  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
21
  * All rights reserved.</center></h2>
22
  *
23
  * This software component is licensed by ST under BSD 3-Clause license,
24
  * the "License"; You may not use this file except in compliance with the
25
  * License. You may obtain a copy of the License at:
26
  *                        opensource.org/licenses/BSD-3-Clause
27
  *
28
  ******************************************************************************
29
  */
30
 
31
  .syntax unified
32
  .cpu cortex-m3
33
  .fpu softvfp
34
  .thumb
35
 
36
.global g_pfnVectors
37
.global Default_Handler
38
 
39
/* start address for the initialization values of the .data section.
40
defined in linker script */
41
.word _sidata
42
/* start address for the .data section. defined in linker script */
43
.word _sdata
44
/* end address for the .data section. defined in linker script */
45
.word _edata
46
/* start address for the .bss section. defined in linker script */
47
.word _sbss
48
/* end address for the .bss section. defined in linker script */
49
.word _ebss
50
 
51
.equ  BootRAM,        0xF1E0F85F
52
/**
53
 * @brief  This is the code that gets called when the processor first
54
 *          starts execution following a reset event. Only the absolutely
55
 *          necessary set is performed, after which the application
56
 *          supplied main() routine is called.
57
 * @param  None
58
 * @retval : None
59
*/
60
 
61
  .section .text.Reset_Handler
62
  .weak Reset_Handler
63
  .type Reset_Handler, %function
64
Reset_Handler:
65
 
66
/* Copy the data segment initializers from flash to SRAM */
67
  movs r1, #0
68
  b LoopCopyDataInit
69
 
70
CopyDataInit:
71
  ldr r3, =_sidata
72
  ldr r3, [r3, r1]
73
  str r3, [r0, r1]
74
  adds r1, r1, #4
75
 
76
LoopCopyDataInit:
77
  ldr r0, =_sdata
78
  ldr r3, =_edata
79
  adds r2, r0, r1
80
  cmp r2, r3
81
  bcc CopyDataInit
82
  ldr r2, =_sbss
83
  b LoopFillZerobss
84
/* Zero fill the bss segment. */
85
FillZerobss:
86
  movs r3, #0
87
  str r3, [r2], #4
88
 
89
LoopFillZerobss:
90
  ldr r3, = _ebss
91
  cmp r2, r3
92
  bcc FillZerobss
93
 
94
/* Call the clock system intitialization function.*/
95
    bl  SystemInit
96
/* Call static constructors */
97
    bl __libc_init_array
98
/* Call the application's entry point.*/
99
  bl main
100
  bx lr
101
.size Reset_Handler, .-Reset_Handler
102
 
103
/**
104
 * @brief  This is the code that gets called when the processor receives an
105
 *         unexpected interrupt.  This simply enters an infinite loop, preserving
106
 *         the system state for examination by a debugger.
107
 *
108
 * @param  None
109
 * @retval : None
110
*/
111
    .section .text.Default_Handler,"ax",%progbits
112
Default_Handler:
113
Infinite_Loop:
114
  b Infinite_Loop
115
  .size Default_Handler, .-Default_Handler
116
/******************************************************************************
117
*
118
* The minimal vector table for a Cortex M3.  Note that the proper constructs
119
* must be placed on this to ensure that it ends up at physical address
120
* 0x0000.0000.
121
*
122
******************************************************************************/
123
  .section .isr_vector,"a",%progbits
124
  .type g_pfnVectors, %object
125
  .size g_pfnVectors, .-g_pfnVectors
126
 
127
 
128
g_pfnVectors:
129
 
130
  .word _estack
131
  .word Reset_Handler
132
  .word NMI_Handler
133
  .word HardFault_Handler
134
  .word MemManage_Handler
135
  .word BusFault_Handler
136
  .word UsageFault_Handler
137
  .word 0
138
  .word 0
139
  .word 0
140
  .word 0
141
  .word SVC_Handler
142
  .word DebugMon_Handler
143
  .word 0
144
  .word PendSV_Handler
145
  .word SysTick_Handler
146
  .word WWDG_IRQHandler
147
  .word PVD_IRQHandler
148
  .word TAMPER_IRQHandler
149
  .word RTC_IRQHandler
150
  .word FLASH_IRQHandler
151
  .word RCC_IRQHandler
152
  .word EXTI0_IRQHandler
153
  .word EXTI1_IRQHandler
154
  .word EXTI2_IRQHandler
155
  .word EXTI3_IRQHandler
156
  .word EXTI4_IRQHandler
157
  .word DMA1_Channel1_IRQHandler
158
  .word DMA1_Channel2_IRQHandler
159
  .word DMA1_Channel3_IRQHandler
160
  .word DMA1_Channel4_IRQHandler
161
  .word DMA1_Channel5_IRQHandler
162
  .word DMA1_Channel6_IRQHandler
163
  .word DMA1_Channel7_IRQHandler
164
  .word ADC1_2_IRQHandler
165
  .word USB_HP_CAN1_TX_IRQHandler
166
  .word USB_LP_CAN1_RX0_IRQHandler
167
  .word CAN1_RX1_IRQHandler
168
  .word CAN1_SCE_IRQHandler
169
  .word EXTI9_5_IRQHandler
170
  .word TIM1_BRK_IRQHandler
171
  .word TIM1_UP_IRQHandler
172
  .word TIM1_TRG_COM_IRQHandler
173
  .word TIM1_CC_IRQHandler
174
  .word TIM2_IRQHandler
175
  .word TIM3_IRQHandler
176
  .word TIM4_IRQHandler
177
  .word I2C1_EV_IRQHandler
178
  .word I2C1_ER_IRQHandler
179
  .word I2C2_EV_IRQHandler
180
  .word I2C2_ER_IRQHandler
181
  .word SPI1_IRQHandler
182
  .word SPI2_IRQHandler
183
  .word USART1_IRQHandler
184
  .word USART2_IRQHandler
185
  .word USART3_IRQHandler
186
  .word EXTI15_10_IRQHandler
187
  .word RTC_Alarm_IRQHandler
188
  .word USBWakeUp_IRQHandler
189
  .word TIM8_BRK_IRQHandler
190
  .word TIM8_UP_IRQHandler
191
  .word TIM8_TRG_COM_IRQHandler
192
  .word TIM8_CC_IRQHandler
193
  .word ADC3_IRQHandler
194
  .word FSMC_IRQHandler
195
  .word SDIO_IRQHandler
196
  .word TIM5_IRQHandler
197
  .word SPI3_IRQHandler
198
  .word UART4_IRQHandler
199
  .word UART5_IRQHandler
200
  .word TIM6_IRQHandler
201
  .word TIM7_IRQHandler
202
  .word DMA2_Channel1_IRQHandler
203
  .word DMA2_Channel2_IRQHandler
204
  .word DMA2_Channel3_IRQHandler
205
  .word DMA2_Channel4_5_IRQHandler
206
  .word 0
207
  .word 0
208
  .word 0
209
  .word 0
210
  .word 0
211
  .word 0
212
  .word 0
213
  .word 0
214
  .word 0
215
  .word 0
216
  .word 0
217
  .word 0
218
  .word 0
219
  .word 0
220
  .word 0
221
  .word 0
222
  .word 0
223
  .word 0
224
  .word 0
225
  .word 0
226
  .word 0
227
  .word 0
228
  .word 0
229
  .word 0
230
  .word 0
231
  .word 0
232
  .word 0
233
  .word 0
234
  .word 0
235
  .word 0
236
  .word 0
237
  .word 0
238
  .word 0
239
  .word 0
240
  .word 0
241
  .word 0
242
  .word 0
243
  .word 0
244
  .word 0
245
  .word 0
246
  .word 0
247
  .word 0
248
  .word 0
249
  .word 0
250
  .word BootRAM       /* @0x1E0. This is for boot in RAM mode for
251
                         STM32F10x High Density devices. */
252
 
253
/*******************************************************************************
254
*
255
* Provide weak aliases for each Exception handler to the Default_Handler.
256
* As they are weak aliases, any function with the same name will override
257
* this definition.
258
*
259
*******************************************************************************/
260
 
261
  .weak NMI_Handler
262
  .thumb_set NMI_Handler,Default_Handler
263
 
264
  .weak HardFault_Handler
265
  .thumb_set HardFault_Handler,Default_Handler
266
 
267
  .weak MemManage_Handler
268
  .thumb_set MemManage_Handler,Default_Handler
269
 
270
  .weak BusFault_Handler
271
  .thumb_set BusFault_Handler,Default_Handler
272
 
273
  .weak UsageFault_Handler
274
  .thumb_set UsageFault_Handler,Default_Handler
275
 
276
  .weak SVC_Handler
277
  .thumb_set SVC_Handler,Default_Handler
278
 
279
  .weak DebugMon_Handler
280
  .thumb_set DebugMon_Handler,Default_Handler
281
 
282
  .weak PendSV_Handler
283
  .thumb_set PendSV_Handler,Default_Handler
284
 
285
  .weak SysTick_Handler
286
  .thumb_set SysTick_Handler,Default_Handler
287
 
288
  .weak WWDG_IRQHandler
289
  .thumb_set WWDG_IRQHandler,Default_Handler
290
 
291
  .weak PVD_IRQHandler
292
  .thumb_set PVD_IRQHandler,Default_Handler
293
 
294
  .weak TAMPER_IRQHandler
295
  .thumb_set TAMPER_IRQHandler,Default_Handler
296
 
297
  .weak RTC_IRQHandler
298
  .thumb_set RTC_IRQHandler,Default_Handler
299
 
300
  .weak FLASH_IRQHandler
301
  .thumb_set FLASH_IRQHandler,Default_Handler
302
 
303
  .weak RCC_IRQHandler
304
  .thumb_set RCC_IRQHandler,Default_Handler
305
 
306
  .weak EXTI0_IRQHandler
307
  .thumb_set EXTI0_IRQHandler,Default_Handler
308
 
309
  .weak EXTI1_IRQHandler
310
  .thumb_set EXTI1_IRQHandler,Default_Handler
311
 
312
  .weak EXTI2_IRQHandler
313
  .thumb_set EXTI2_IRQHandler,Default_Handler
314
 
315
  .weak EXTI3_IRQHandler
316
  .thumb_set EXTI3_IRQHandler,Default_Handler
317
 
318
  .weak EXTI4_IRQHandler
319
  .thumb_set EXTI4_IRQHandler,Default_Handler
320
 
321
  .weak DMA1_Channel1_IRQHandler
322
  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
323
 
324
  .weak DMA1_Channel2_IRQHandler
325
  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
326
 
327
  .weak DMA1_Channel3_IRQHandler
328
  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
329
 
330
  .weak DMA1_Channel4_IRQHandler
331
  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
332
 
333
  .weak DMA1_Channel5_IRQHandler
334
  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
335
 
336
  .weak DMA1_Channel6_IRQHandler
337
  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
338
 
339
  .weak DMA1_Channel7_IRQHandler
340
  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
341
 
342
  .weak ADC1_2_IRQHandler
343
  .thumb_set ADC1_2_IRQHandler,Default_Handler
344
 
345
  .weak USB_HP_CAN1_TX_IRQHandler
346
  .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
347
 
348
  .weak USB_LP_CAN1_RX0_IRQHandler
349
  .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
350
 
351
  .weak CAN1_RX1_IRQHandler
352
  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
353
 
354
  .weak CAN1_SCE_IRQHandler
355
  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
356
 
357
  .weak EXTI9_5_IRQHandler
358
  .thumb_set EXTI9_5_IRQHandler,Default_Handler
359
 
360
  .weak TIM1_BRK_IRQHandler
361
  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
362
 
363
  .weak TIM1_UP_IRQHandler
364
  .thumb_set TIM1_UP_IRQHandler,Default_Handler
365
 
366
  .weak TIM1_TRG_COM_IRQHandler
367
  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
368
 
369
  .weak TIM1_CC_IRQHandler
370
  .thumb_set TIM1_CC_IRQHandler,Default_Handler
371
 
372
  .weak TIM2_IRQHandler
373
  .thumb_set TIM2_IRQHandler,Default_Handler
374
 
375
  .weak TIM3_IRQHandler
376
  .thumb_set TIM3_IRQHandler,Default_Handler
377
 
378
  .weak TIM4_IRQHandler
379
  .thumb_set TIM4_IRQHandler,Default_Handler
380
 
381
  .weak I2C1_EV_IRQHandler
382
  .thumb_set I2C1_EV_IRQHandler,Default_Handler
383
 
384
  .weak I2C1_ER_IRQHandler
385
  .thumb_set I2C1_ER_IRQHandler,Default_Handler
386
 
387
  .weak I2C2_EV_IRQHandler
388
  .thumb_set I2C2_EV_IRQHandler,Default_Handler
389
 
390
  .weak I2C2_ER_IRQHandler
391
  .thumb_set I2C2_ER_IRQHandler,Default_Handler
392
 
393
  .weak SPI1_IRQHandler
394
  .thumb_set SPI1_IRQHandler,Default_Handler
395
 
396
  .weak SPI2_IRQHandler
397
  .thumb_set SPI2_IRQHandler,Default_Handler
398
 
399
  .weak USART1_IRQHandler
400
  .thumb_set USART1_IRQHandler,Default_Handler
401
 
402
  .weak USART2_IRQHandler
403
  .thumb_set USART2_IRQHandler,Default_Handler
404
 
405
  .weak USART3_IRQHandler
406
  .thumb_set USART3_IRQHandler,Default_Handler
407
 
408
  .weak EXTI15_10_IRQHandler
409
  .thumb_set EXTI15_10_IRQHandler,Default_Handler
410
 
411
  .weak RTC_Alarm_IRQHandler
412
  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
413
 
414
  .weak USBWakeUp_IRQHandler
415
  .thumb_set USBWakeUp_IRQHandler,Default_Handler
416
 
417
  .weak TIM8_BRK_IRQHandler
418
  .thumb_set TIM8_BRK_IRQHandler,Default_Handler
419
 
420
  .weak TIM8_UP_IRQHandler
421
  .thumb_set TIM8_UP_IRQHandler,Default_Handler
422
 
423
  .weak TIM8_TRG_COM_IRQHandler
424
  .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
425
 
426
  .weak TIM8_CC_IRQHandler
427
  .thumb_set TIM8_CC_IRQHandler,Default_Handler
428
 
429
  .weak ADC3_IRQHandler
430
  .thumb_set ADC3_IRQHandler,Default_Handler
431
 
432
  .weak FSMC_IRQHandler
433
  .thumb_set FSMC_IRQHandler,Default_Handler
434
 
435
  .weak SDIO_IRQHandler
436
  .thumb_set SDIO_IRQHandler,Default_Handler
437
 
438
  .weak TIM5_IRQHandler
439
  .thumb_set TIM5_IRQHandler,Default_Handler
440
 
441
  .weak SPI3_IRQHandler
442
  .thumb_set SPI3_IRQHandler,Default_Handler
443
 
444
  .weak UART4_IRQHandler
445
  .thumb_set UART4_IRQHandler,Default_Handler
446
 
447
  .weak UART5_IRQHandler
448
  .thumb_set UART5_IRQHandler,Default_Handler
449
 
450
  .weak TIM6_IRQHandler
451
  .thumb_set TIM6_IRQHandler,Default_Handler
452
 
453
  .weak TIM7_IRQHandler
454
  .thumb_set TIM7_IRQHandler,Default_Handler
455
 
456
  .weak DMA2_Channel1_IRQHandler
457
  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
458
 
459
  .weak DMA2_Channel2_IRQHandler
460
  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
461
 
462
  .weak DMA2_Channel3_IRQHandler
463
  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
464
 
465
  .weak DMA2_Channel4_5_IRQHandler
466
  .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
467
 
468
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/