Subversion Repositories chibiosIgnition

Rev

Go to most recent revision | Details | Last modification | View Log | RSS feed

Rev Author Line No. Line
2 mjames 1 
/*
2 
    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
3 
                 2011,2012 Giovanni Di Sirio.
4 
 
5 
    This file is part of ChibiOS/RT.
6 
 
7 
    ChibiOS/RT is free software; you can redistribute it and/or modify
8 
    it under the terms of the GNU General Public License as published by
9 
    the Free Software Foundation; either version 3 of the License, or
10 
    (at your option) any later version.
11 
 
12 
    ChibiOS/RT is distributed in the hope that it will be useful,
13 
    but WITHOUT ANY WARRANTY; without even the implied warranty of
14 
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 
    GNU General Public License for more details.
16 
 
17 
    You should have received a copy of the GNU General Public License
18 
    along with this program.  If not, see <http://www.gnu.org/licenses/>.
19 
 
20 
                                      ---
21 
 
22 
    A special exception to the GPL can be applied should you wish to distribute
23 
    a combined work that includes ChibiOS/RT, without being obliged to provide
24 
    the source code for any proprietary components. See the file exception.txt
25 
    for full details of how and when the exception can be applied.
26 
*/
27 
 
28 
/*
29 
 * STM32F1xx drivers configuration.
30 
 * The following settings override the default settings present in
31 
 * the various device driver implementation headers.
32 
 * Note that the settings for each driver only have effect if the whole
33 
 * driver is enabled in halconf.h.
34 
 *
35 
 * IRQ priorities:
36 
 * 15...0       Lowest...Highest.
37 
 *
38 
 * DMA priorities:
39 
 * 0...3        Lowest...Highest.
40 
 */
41 
 
42 
/*
43 
 * HAL driver system settings.
44 
 */
45 
#define STM32_NO_INIT                       FALSE
46 
#define STM32_HSI_ENABLED                   TRUE
47 
#define STM32_LSI_ENABLED                   FALSE
48 
#define STM32_HSE_ENABLED                   TRUE
49 
#define STM32_LSE_ENABLED                   FALSE
50 
#define STM32_SW                            STM32_SW_PLL
51 
#define STM32_PLLSRC                        STM32_PLLSRC_HSE
52 
#define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
53 
#define STM32_PLLMUL_VALUE                  9
54 
#define STM32_HPRE                          STM32_HPRE_DIV1
55 
#define STM32_PPRE1                         STM32_PPRE1_DIV2
56 
#define STM32_PPRE2                         STM32_PPRE2_DIV2
57 
#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
58 
#define STM32_USB_CLOCK_REQUIRED            TRUE
59 
#define STM32_USBPRE                        STM32_USBPRE_DIV1P5
60 
#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
61 
#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
62 
#define STM32_PVD_ENABLE                    FALSE
63 
#define STM32_PLS                           STM32_PLS_LEV0
64 
 
65 
/*
66 
 * ADC driver system settings.
67 
 */
68 
#define STM32_ADC_USE_ADC1                  TRUE
69 
#define STM32_ADC_ADC1_DMA_PRIORITY         2
70 
#define STM32_ADC_ADC1_IRQ_PRIORITY         5
71 
 
72 
/*
73 
 * CAN driver system settings.
74 
 */
75 
#define STM32_CAN_USE_CAN1                  TRUE
76 
#define STM32_CAN_CAN1_IRQ_PRIORITY         11
77 
 
78 
/*
79 
 * EXT driver system settings.
80 
 */
81 
#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
82 
#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
83 
#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
84 
#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
85 
#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
86 
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
87 
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
88 
#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
89 
#define STM32_EXT_EXTI17_IRQ_PRIORITY       6
90 
#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
91 
#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
92 
 
93 
/*
94 
 * GPT driver system settings.
95 
 */
96 
#define STM32_GPT_USE_TIM1                  FALSE
97 
#define STM32_GPT_USE_TIM2                  FALSE
98 
#define STM32_GPT_USE_TIM3                  FALSE
99 
#define STM32_GPT_USE_TIM4                  FALSE
100 
#define STM32_GPT_USE_TIM5                  FALSE
101 
#define STM32_GPT_USE_TIM8                  FALSE
102 
#define STM32_GPT_TIM1_IRQ_PRIORITY         7
103 
#define STM32_GPT_TIM2_IRQ_PRIORITY         7
104 
#define STM32_GPT_TIM3_IRQ_PRIORITY         7
105 
#define STM32_GPT_TIM4_IRQ_PRIORITY         7
106 
#define STM32_GPT_TIM5_IRQ_PRIORITY         7
107 
#define STM32_GPT_TIM8_IRQ_PRIORITY         7
108 
 
109 
/*
110 
 * I2C driver system settings.
111 
 */
112 
#define STM32_I2C_USE_I2C1                  FALSE
113 
#define STM32_I2C_USE_I2C2                  FALSE
114 
#define STM32_I2C_USE_I2C3                  FALSE
115 
#define STM32_I2C_I2C1_IRQ_PRIORITY         10
116 
#define STM32_I2C_I2C2_IRQ_PRIORITY         10
117 
#define STM32_I2C_I2C3_IRQ_PRIORITY         10
118 
#define STM32_I2C_I2C1_DMA_PRIORITY         1
119 
#define STM32_I2C_I2C2_DMA_PRIORITY         1
120 
#define STM32_I2C_I2C3_DMA_PRIORITY         1
121 
#define STM32_I2C_I2C1_DMA_ERROR_HOOK()     chSysHalt()
122 
#define STM32_I2C_I2C2_DMA_ERROR_HOOK()     chSysHalt()
123 
#define STM32_I2C_I2C3_DMA_ERROR_HOOK()     chSysHalt()
124 
 
125 
/*
126 
 * ICU driver system settings.
127 
 */
128 
#define STM32_ICU_USE_TIM1                  FALSE
129 
#define STM32_ICU_USE_TIM2                  FALSE
130 
#define STM32_ICU_USE_TIM3                  FALSE
131 
#define STM32_ICU_USE_TIM4                  FALSE
132 
#define STM32_ICU_USE_TIM5                  FALSE
133 
#define STM32_ICU_USE_TIM8                  FALSE
134 
#define STM32_ICU_TIM1_IRQ_PRIORITY         7
135 
#define STM32_ICU_TIM2_IRQ_PRIORITY         7
136 
#define STM32_ICU_TIM3_IRQ_PRIORITY         7
137 
#define STM32_ICU_TIM4_IRQ_PRIORITY         7
138 
#define STM32_ICU_TIM5_IRQ_PRIORITY         7
139 
#define STM32_ICU_TIM8_IRQ_PRIORITY         7
140 
 
141 
/*
142 
 * PWM driver system settings.
143 
 */
144 
#define STM32_PWM_USE_ADVANCED              FALSE
145 
#define STM32_PWM_USE_TIM1                  FALSE
146 
#define STM32_PWM_USE_TIM2                  FALSE
147 
#define STM32_PWM_USE_TIM3                  FALSE
148 
#define STM32_PWM_USE_TIM4                  FALSE
149 
#define STM32_PWM_USE_TIM5                  FALSE
150 
#define STM32_PWM_USE_TIM8                  FALSE
151 
#define STM32_PWM_TIM1_IRQ_PRIORITY         7
152 
#define STM32_PWM_TIM2_IRQ_PRIORITY         7
153 
#define STM32_PWM_TIM3_IRQ_PRIORITY         7
154 
#define STM32_PWM_TIM4_IRQ_PRIORITY         7
155 
#define STM32_PWM_TIM5_IRQ_PRIORITY         7
156 
#define STM32_PWM_TIM8_IRQ_PRIORITY         7
157 
 
158 
/*
159 
 * RTC driver system settings.
160 
 */
161 
#define STM32_RTC_IRQ_PRIORITY              15
162 
 
163 
/*
164 
 * SERIAL driver system settings.
165 
 */
166 
#define STM32_SERIAL_USE_USART1             FALSE
167 
#define STM32_SERIAL_USE_USART2             TRUE
168 
#define STM32_SERIAL_USE_USART3             FALSE
169 
#define STM32_SERIAL_USE_UART4              FALSE
170 
#define STM32_SERIAL_USE_UART5              FALSE
171 
#define STM32_SERIAL_USE_USART6             FALSE
172 
#define STM32_SERIAL_USART1_PRIORITY        12
173 
#define STM32_SERIAL_USART2_PRIORITY        12
174 
#define STM32_SERIAL_USART3_PRIORITY        12
175 
#define STM32_SERIAL_UART4_PRIORITY         12
176 
#define STM32_SERIAL_UART5_PRIORITY         12
177 
#define STM32_SERIAL_USART6_PRIORITY        12
178 
 
179 
/*
180 
 * SPI driver system settings.
181 
 */
3 mjames 182 
#define STM32_SPI_USE_SPI1                  TRUE
183 
#define STM32_SPI_USE_SPI2                  FALSE
2 mjames 184 
#define STM32_SPI_USE_SPI3                  FALSE
185 
#define STM32_SPI_SPI1_DMA_PRIORITY         1
186 
#define STM32_SPI_SPI2_DMA_PRIORITY         1
187 
#define STM32_SPI_SPI3_DMA_PRIORITY         1
188 
#define STM32_SPI_SPI1_IRQ_PRIORITY         10
189 
#define STM32_SPI_SPI2_IRQ_PRIORITY         10
190 
#define STM32_SPI_SPI3_IRQ_PRIORITY         10
191 
#define STM32_SPI_DMA_ERROR_HOOK(spip)      chSysHalt()
192 
 
193 
/*
194 
 * UART driver system settings.
195 
 */
196 
#define STM32_UART_USE_USART1               FALSE
197 
#define STM32_UART_USE_USART2               FALSE
198 
#define STM32_UART_USE_USART3               FALSE
199 
#define STM32_UART_USART1_IRQ_PRIORITY      12
200 
#define STM32_UART_USART2_IRQ_PRIORITY      12
201 
#define STM32_UART_USART3_IRQ_PRIORITY      12
202 
#define STM32_UART_USART1_DMA_PRIORITY      0
203 
#define STM32_UART_USART2_DMA_PRIORITY      0
204 
#define STM32_UART_USART3_DMA_PRIORITY      0
205 
#define STM32_UART_DMA_ERROR_HOOK(uartp)    chSysHalt()
206 
 
207 
/*
208 
 * USB driver system settings.
209 
 */
210 
#define STM32_USB_USE_USB1                  TRUE
211 
#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE
212 
#define STM32_USB_USB1_HP_IRQ_PRIORITY      6
213 
#define STM32_USB_USB1_LP_IRQ_PRIORITY      14