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| 2 | mjames | 1 | /* ---------------------------------------------------------------------- |
| 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. |
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| 3 | * |
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| 4 | * $Date: 19. March 2015 |
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| 5 | * $Revision: V.1.4.5 |
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| 6 | * |
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| 7 | * Project: CMSIS DSP Library |
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| 8 | * Title: arm_min_q15.c |
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| 9 | * |
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| 10 | * Description: Minimum value of a Q15 vector. |
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| 11 | * |
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| 12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
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| 13 | * |
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| 14 | * Redistribution and use in source and binary forms, with or without |
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| 15 | * modification, are permitted provided that the following conditions |
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| 16 | * are met: |
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| 17 | * - Redistributions of source code must retain the above copyright |
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| 18 | * notice, this list of conditions and the following disclaimer. |
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| 19 | * - Redistributions in binary form must reproduce the above copyright |
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| 20 | * notice, this list of conditions and the following disclaimer in |
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| 21 | * the documentation and/or other materials provided with the |
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| 22 | * distribution. |
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| 23 | * - Neither the name of ARM LIMITED nor the names of its contributors |
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| 24 | * may be used to endorse or promote products derived from this |
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| 25 | * software without specific prior written permission. |
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| 26 | * |
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| 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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| 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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| 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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| 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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| 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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| 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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| 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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| 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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| 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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| 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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| 38 | * POSSIBILITY OF SUCH DAMAGE. |
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| 39 | * ---------------------------------------------------------------------------- */ |
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| 40 | |||
| 41 | #include "arm_math.h" |
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| 42 | |||
| 43 | /** |
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| 44 | * @ingroup groupStats |
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| 45 | */ |
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| 46 | |||
| 47 | |||
| 48 | /** |
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| 49 | * @addtogroup Min |
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| 50 | * @{ |
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| 51 | */ |
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| 52 | |||
| 53 | |||
| 54 | /** |
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| 55 | * @brief Minimum value of a Q15 vector. |
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| 56 | * @param[in] *pSrc points to the input vector |
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| 57 | * @param[in] blockSize length of the input vector |
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| 58 | * @param[out] *pResult minimum value returned here |
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| 59 | * @param[out] *pIndex index of minimum value returned here |
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| 60 | * @return none. |
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| 61 | * |
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| 62 | */ |
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| 63 | |||
| 64 | void arm_min_q15( |
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| 65 | q15_t * pSrc, |
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| 66 | uint32_t blockSize, |
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| 67 | q15_t * pResult, |
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| 68 | uint32_t * pIndex) |
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| 69 | { |
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| 70 | #ifndef ARM_MATH_CM0_FAMILY |
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| 71 | |||
| 72 | /* Run the below code for Cortex-M4 and Cortex-M3 */ |
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| 73 | q15_t minVal1, minVal2, out; /* Temporary variables to store the output value. */ |
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| 74 | uint32_t blkCnt, outIndex, count; /* loop counter */ |
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| 75 | |||
| 76 | /* Initialise the count value. */ |
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| 77 | count = 0u; |
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| 78 | /* Initialise the index value to zero. */ |
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| 79 | outIndex = 0u; |
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| 80 | /* Load first input value that act as reference value for comparision */ |
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| 81 | out = *pSrc++; |
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| 82 | |||
| 83 | /* Loop unrolling */ |
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| 84 | blkCnt = (blockSize - 1u) >> 2u; |
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| 85 | |||
| 86 | while(blkCnt > 0) |
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| 87 | { |
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| 88 | /* Initialize minVal to the next consecutive values one by one */ |
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| 89 | minVal1 = *pSrc++; |
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| 90 | minVal2 = *pSrc++; |
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| 91 | |||
| 92 | /* compare for the minimum value */ |
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| 93 | if(out > minVal1) |
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| 94 | { |
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| 95 | /* Update the minimum value and its index */ |
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| 96 | out = minVal1; |
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| 97 | outIndex = count + 1u; |
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| 98 | } |
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| 99 | |||
| 100 | minVal1 = *pSrc++; |
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| 101 | |||
| 102 | /* compare for the minimum value */ |
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| 103 | if(out > minVal2) |
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| 104 | { |
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| 105 | /* Update the minimum value and its index */ |
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| 106 | out = minVal2; |
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| 107 | outIndex = count + 2u; |
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| 108 | } |
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| 109 | |||
| 110 | minVal2 = *pSrc++; |
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| 111 | |||
| 112 | /* compare for the minimum value */ |
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| 113 | if(out > minVal1) |
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| 114 | { |
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| 115 | /* Update the minimum value and its index */ |
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| 116 | out = minVal1; |
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| 117 | outIndex = count + 3u; |
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| 118 | } |
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| 119 | |||
| 120 | /* compare for the minimum value */ |
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| 121 | if(out > minVal2) |
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| 122 | { |
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| 123 | /* Update the minimum value and its index */ |
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| 124 | out = minVal2; |
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| 125 | outIndex = count + 4u; |
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| 126 | } |
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| 127 | |||
| 128 | count += 4u; |
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| 129 | |||
| 130 | blkCnt--; |
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| 131 | } |
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| 132 | |||
| 133 | /* if (blockSize - 1u ) is not multiple of 4 */ |
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| 134 | blkCnt = (blockSize - 1u) % 4u; |
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| 135 | |||
| 136 | #else |
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| 137 | |||
| 138 | /* Run the below code for Cortex-M0 */ |
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| 139 | q15_t minVal1, out; /* Temporary variables to store the output value. */ |
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| 140 | uint32_t blkCnt, outIndex; /* loop counter */ |
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| 141 | |||
| 142 | blkCnt = (blockSize - 1u); |
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| 143 | |||
| 144 | /* Initialise the index value to zero. */ |
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| 145 | outIndex = 0u; |
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| 146 | /* Load first input value that act as reference value for comparision */ |
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| 147 | out = *pSrc++; |
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| 148 | |||
| 149 | #endif // #ifndef ARM_MATH_CM0_FAMILY |
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| 150 | |||
| 151 | while(blkCnt > 0) |
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| 152 | { |
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| 153 | /* Initialize minVal to the next consecutive values one by one */ |
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| 154 | minVal1 = *pSrc++; |
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| 155 | |||
| 156 | /* compare for the minimum value */ |
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| 157 | if(out > minVal1) |
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| 158 | { |
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| 159 | /* Update the minimum value and it's index */ |
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| 160 | out = minVal1; |
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| 161 | outIndex = blockSize - blkCnt; |
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| 162 | } |
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| 163 | |||
| 164 | blkCnt--; |
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| 165 | |||
| 166 | } |
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| 167 | |||
| 168 | |||
| 169 | |||
| 170 | /* Store the minimum value and its index into destination pointers */ |
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| 171 | *pResult = out; |
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| 172 | *pIndex = outIndex; |
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| 173 | } |
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| 174 | |||
| 175 | /** |
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| 176 | * @} end of Min group |
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| 177 | */ |