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| 56 | mjames | 1 | /* ---------------------------------------------------------------------- |
| 2 | * Project: CMSIS DSP Library |
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| 3 | * Title: arm_add_q15.c |
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| 4 | * Description: Q15 vector addition |
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| 5 | * |
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| 6 | * $Date: 27. January 2017 |
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| 7 | * $Revision: V.1.5.1 |
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| 8 | * |
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| 9 | * Target Processor: Cortex-M cores |
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| 10 | * -------------------------------------------------------------------- */ |
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| 11 | /* |
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| 12 | * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved. |
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| 13 | * |
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| 14 | * SPDX-License-Identifier: Apache-2.0 |
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| 15 | * |
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| 16 | * Licensed under the Apache License, Version 2.0 (the License); you may |
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| 17 | * not use this file except in compliance with the License. |
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| 18 | * You may obtain a copy of the License at |
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| 19 | * |
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| 20 | * www.apache.org/licenses/LICENSE-2.0 |
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| 21 | * |
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| 22 | * Unless required by applicable law or agreed to in writing, software |
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| 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT |
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| 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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| 25 | * See the License for the specific language governing permissions and |
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| 26 | * limitations under the License. |
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| 27 | */ |
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| 28 | |||
| 29 | #include "arm_math.h" |
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| 30 | |||
| 31 | /** |
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| 32 | * @ingroup groupMath |
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| 33 | */ |
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| 34 | |||
| 35 | /** |
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| 36 | * @addtogroup BasicAdd |
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| 37 | * @{ |
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| 38 | */ |
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| 39 | |||
| 40 | /** |
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| 41 | * @brief Q15 vector addition. |
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| 42 | * @param[in] *pSrcA points to the first input vector |
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| 43 | * @param[in] *pSrcB points to the second input vector |
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| 44 | * @param[out] *pDst points to the output vector |
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| 45 | * @param[in] blockSize number of samples in each vector |
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| 46 | * @return none. |
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| 47 | * |
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| 48 | * <b>Scaling and Overflow Behavior:</b> |
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| 49 | * \par |
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| 50 | * The function uses saturating arithmetic. |
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| 51 | * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. |
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| 52 | */ |
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| 53 | |||
| 54 | void arm_add_q15( |
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| 55 | q15_t * pSrcA, |
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| 56 | q15_t * pSrcB, |
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| 57 | q15_t * pDst, |
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| 58 | uint32_t blockSize) |
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| 59 | { |
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| 60 | uint32_t blkCnt; /* loop counter */ |
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| 61 | |||
| 62 | #if defined (ARM_MATH_DSP) |
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| 63 | |||
| 64 | /* Run the below code for Cortex-M4 and Cortex-M3 */ |
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| 65 | q31_t inA1, inA2, inB1, inB2; |
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| 66 | |||
| 67 | /*loop Unrolling */ |
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| 68 | blkCnt = blockSize >> 2U; |
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| 69 | |||
| 70 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. |
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| 71 | ** a second loop below computes the remaining 1 to 3 samples. */ |
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| 72 | while (blkCnt > 0U) |
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| 73 | { |
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| 74 | /* C = A + B */ |
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| 75 | /* Add and then store the results in the destination buffer. */ |
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| 76 | inA1 = *__SIMD32(pSrcA)++; |
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| 77 | inA2 = *__SIMD32(pSrcA)++; |
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| 78 | inB1 = *__SIMD32(pSrcB)++; |
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| 79 | inB2 = *__SIMD32(pSrcB)++; |
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| 80 | |||
| 81 | *__SIMD32(pDst)++ = __QADD16(inA1, inB1); |
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| 82 | *__SIMD32(pDst)++ = __QADD16(inA2, inB2); |
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| 83 | |||
| 84 | /* Decrement the loop counter */ |
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| 85 | blkCnt--; |
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| 86 | } |
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| 87 | |||
| 88 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here. |
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| 89 | ** No loop unrolling is used. */ |
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| 90 | blkCnt = blockSize % 0x4U; |
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| 91 | |||
| 92 | while (blkCnt > 0U) |
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| 93 | { |
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| 94 | /* C = A + B */ |
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| 95 | /* Add and then store the results in the destination buffer. */ |
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| 96 | *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++); |
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| 97 | |||
| 98 | /* Decrement the loop counter */ |
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| 99 | blkCnt--; |
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| 100 | } |
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| 101 | |||
| 102 | #else |
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| 103 | |||
| 104 | /* Run the below code for Cortex-M0 */ |
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| 105 | |||
| 106 | |||
| 107 | |||
| 108 | /* Initialize blkCnt with number of samples */ |
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| 109 | blkCnt = blockSize; |
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| 110 | |||
| 111 | while (blkCnt > 0U) |
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| 112 | { |
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| 113 | /* C = A + B */ |
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| 114 | /* Add and then store the results in the destination buffer. */ |
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| 115 | *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16); |
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| 116 | |||
| 117 | /* Decrement the loop counter */ |
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| 118 | blkCnt--; |
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| 119 | } |
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| 120 | |||
| 121 | #endif /* #if defined (ARM_MATH_DSP) */ |
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| 122 | |||
| 123 | |||
| 124 | } |
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| 125 | |||
| 126 | /** |
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| 127 | * @} end of BasicAdd group |
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| 128 | */ |