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51 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file startup_stm32l152xe.s |
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4 | * @author MCD Application Team |
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5 | * @brief STM32L152XE Devices vector table for GCC toolchain. |
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6 | * This module performs: |
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7 | * - Set the initial SP |
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8 | * - Set the initial PC == Reset_Handler, |
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9 | * - Set the vector table entries with the exceptions ISR address |
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10 | * - Configure the clock system |
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11 | * - Branches to main in the C library (which eventually |
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12 | * calls main()). |
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13 | * After Reset the Cortex-M3 processor is in Thread mode, |
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14 | * priority is Privileged, and the Stack is set to Main. |
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15 | ****************************************************************************** |
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16 | * |
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17 | * @attention |
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18 | * |
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19 | * Copyright (c) 2017 STMicroelectronics. All rights reserved. |
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20 | * |
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21 | * This software component is licensed by ST under BSD 3-Clause license, |
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22 | * the "License"; You may not use this file except in compliance with the |
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23 | * License. You may obtain a copy of the License at: |
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24 | * opensource.org/licenses/BSD-3-Clause |
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25 | * |
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26 | ****************************************************************************** |
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27 | */ |
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28 | |||
29 | .syntax unified |
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30 | .cpu cortex-m3 |
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31 | .fpu softvfp |
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32 | .thumb |
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33 | |||
34 | .global g_pfnVectors |
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35 | .global Default_Handler |
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36 | |||
37 | /* start address for the initialization values of the .data section. |
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38 | defined in linker script */ |
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39 | .word _sidata |
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40 | /* start address for the .data section. defined in linker script */ |
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41 | .word _sdata |
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42 | /* end address for the .data section. defined in linker script */ |
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43 | .word _edata |
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44 | /* start address for the .bss section. defined in linker script */ |
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45 | .word _sbss |
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46 | /* end address for the .bss section. defined in linker script */ |
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47 | .word _ebss |
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48 | |||
49 | .equ BootRAM, 0xF108F85F |
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50 | /** |
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51 | * @brief This is the code that gets called when the processor first |
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52 | * starts execution following a reset event. Only the absolutely |
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53 | * necessary set is performed, after which the application |
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54 | * supplied main() routine is called. |
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55 | * @param None |
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56 | * @retval : None |
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57 | */ |
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58 | |||
59 | .section .text.Reset_Handler |
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60 | .weak Reset_Handler |
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61 | .type Reset_Handler, %function |
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62 | Reset_Handler: |
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63 | |||
64 | /* Copy the data segment initializers from flash to SRAM */ |
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61 | mjames | 65 | ldr r0, =_sdata |
66 | ldr r1, =_edata |
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67 | ldr r2, =_sidata |
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68 | movs r3, #0 |
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51 | mjames | 69 | b LoopCopyDataInit |
70 | |||
71 | CopyDataInit: |
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61 | mjames | 72 | ldr r4, [r2, r3] |
73 | str r4, [r0, r3] |
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74 | adds r3, r3, #4 |
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51 | mjames | 75 | |
76 | LoopCopyDataInit: |
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61 | mjames | 77 | adds r4, r0, r3 |
78 | cmp r4, r1 |
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51 | mjames | 79 | bcc CopyDataInit |
61 | mjames | 80 | |
81 | /* Zero fill the bss segment. */ |
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51 | mjames | 82 | ldr r2, =_sbss |
61 | mjames | 83 | ldr r4, =_ebss |
84 | movs r3, #0 |
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51 | mjames | 85 | b LoopFillZerobss |
61 | mjames | 86 | |
51 | mjames | 87 | FillZerobss: |
61 | mjames | 88 | str r3, [r2] |
89 | adds r2, r2, #4 |
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51 | mjames | 90 | |
91 | LoopFillZerobss: |
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61 | mjames | 92 | cmp r2, r4 |
51 | mjames | 93 | bcc FillZerobss |
94 | |||
95 | /* Call the clock system intitialization function.*/ |
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96 | bl SystemInit |
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97 | /* Call static constructors */ |
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98 | bl __libc_init_array |
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99 | /* Call the application's entry point.*/ |
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100 | bl main |
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101 | bx lr |
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102 | .size Reset_Handler, .-Reset_Handler |
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103 | |||
104 | /** |
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105 | * @brief This is the code that gets called when the processor receives an |
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106 | * unexpected interrupt. This simply enters an infinite loop, preserving |
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107 | * the system state for examination by a debugger. |
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108 | * |
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109 | * @param None |
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110 | * @retval : None |
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111 | */ |
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112 | .section .text.Default_Handler,"ax",%progbits |
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113 | Default_Handler: |
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114 | Infinite_Loop: |
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115 | b Infinite_Loop |
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116 | .size Default_Handler, .-Default_Handler |
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117 | /****************************************************************************** |
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118 | * |
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119 | * The minimal vector table for a Cortex M3. Note that the proper constructs |
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120 | * must be placed on this to ensure that it ends up at physical address |
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121 | * 0x0000.0000. |
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122 | * |
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123 | ******************************************************************************/ |
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124 | .section .isr_vector,"a",%progbits |
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125 | .type g_pfnVectors, %object |
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126 | .size g_pfnVectors, .-g_pfnVectors |
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127 | |||
128 | |||
129 | g_pfnVectors: |
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130 | .word _estack |
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131 | .word Reset_Handler |
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132 | .word NMI_Handler |
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133 | .word HardFault_Handler |
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134 | .word MemManage_Handler |
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135 | .word BusFault_Handler |
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136 | .word UsageFault_Handler |
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137 | .word 0 |
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138 | .word 0 |
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139 | .word 0 |
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140 | .word 0 |
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141 | .word SVC_Handler |
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142 | .word DebugMon_Handler |
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143 | .word 0 |
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144 | .word PendSV_Handler |
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145 | .word SysTick_Handler |
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146 | .word WWDG_IRQHandler |
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147 | .word PVD_IRQHandler |
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148 | .word TAMPER_STAMP_IRQHandler |
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149 | .word RTC_WKUP_IRQHandler |
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150 | .word FLASH_IRQHandler |
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151 | .word RCC_IRQHandler |
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152 | .word EXTI0_IRQHandler |
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153 | .word EXTI1_IRQHandler |
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154 | .word EXTI2_IRQHandler |
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155 | .word EXTI3_IRQHandler |
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156 | .word EXTI4_IRQHandler |
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157 | .word DMA1_Channel1_IRQHandler |
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158 | .word DMA1_Channel2_IRQHandler |
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159 | .word DMA1_Channel3_IRQHandler |
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160 | .word DMA1_Channel4_IRQHandler |
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161 | .word DMA1_Channel5_IRQHandler |
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162 | .word DMA1_Channel6_IRQHandler |
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163 | .word DMA1_Channel7_IRQHandler |
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164 | .word ADC1_IRQHandler |
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165 | .word USB_HP_IRQHandler |
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166 | .word USB_LP_IRQHandler |
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167 | .word DAC_IRQHandler |
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168 | .word COMP_IRQHandler |
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169 | .word EXTI9_5_IRQHandler |
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170 | .word LCD_IRQHandler |
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171 | .word TIM9_IRQHandler |
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172 | .word TIM10_IRQHandler |
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173 | .word TIM11_IRQHandler |
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174 | .word TIM2_IRQHandler |
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175 | .word TIM3_IRQHandler |
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176 | .word TIM4_IRQHandler |
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177 | .word I2C1_EV_IRQHandler |
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178 | .word I2C1_ER_IRQHandler |
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179 | .word I2C2_EV_IRQHandler |
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180 | .word I2C2_ER_IRQHandler |
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181 | .word SPI1_IRQHandler |
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182 | .word SPI2_IRQHandler |
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183 | .word USART1_IRQHandler |
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184 | .word USART2_IRQHandler |
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185 | .word USART3_IRQHandler |
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186 | .word EXTI15_10_IRQHandler |
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187 | .word RTC_Alarm_IRQHandler |
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188 | .word USB_FS_WKUP_IRQHandler |
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189 | .word TIM6_IRQHandler |
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190 | .word TIM7_IRQHandler |
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191 | .word 0 |
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192 | .word TIM5_IRQHandler |
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193 | .word SPI3_IRQHandler |
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194 | .word UART4_IRQHandler |
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195 | .word UART5_IRQHandler |
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196 | .word DMA2_Channel1_IRQHandler |
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197 | .word DMA2_Channel2_IRQHandler |
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198 | .word DMA2_Channel3_IRQHandler |
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199 | .word DMA2_Channel4_IRQHandler |
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200 | .word DMA2_Channel5_IRQHandler |
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201 | .word 0 |
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202 | .word COMP_ACQ_IRQHandler |
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203 | .word 0 |
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204 | .word 0 |
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205 | .word 0 |
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206 | .word 0 |
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207 | .word 0 |
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208 | .word BootRAM /* @0x108. This is for boot in RAM mode for |
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209 | STM32L152XE devices. */ |
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210 | |||
211 | /******************************************************************************* |
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212 | * |
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213 | * Provide weak aliases for each Exception handler to the Default_Handler. |
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214 | * As they are weak aliases, any function with the same name will override |
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215 | * this definition. |
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216 | * |
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217 | *******************************************************************************/ |
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218 | |||
219 | .weak NMI_Handler |
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220 | .thumb_set NMI_Handler,Default_Handler |
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221 | |||
222 | .weak HardFault_Handler |
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223 | .thumb_set HardFault_Handler,Default_Handler |
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224 | |||
225 | .weak MemManage_Handler |
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226 | .thumb_set MemManage_Handler,Default_Handler |
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227 | |||
228 | .weak BusFault_Handler |
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229 | .thumb_set BusFault_Handler,Default_Handler |
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230 | |||
231 | .weak UsageFault_Handler |
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232 | .thumb_set UsageFault_Handler,Default_Handler |
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233 | |||
234 | .weak SVC_Handler |
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235 | .thumb_set SVC_Handler,Default_Handler |
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236 | |||
237 | .weak DebugMon_Handler |
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238 | .thumb_set DebugMon_Handler,Default_Handler |
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239 | |||
240 | .weak PendSV_Handler |
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241 | .thumb_set PendSV_Handler,Default_Handler |
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242 | |||
243 | .weak SysTick_Handler |
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244 | .thumb_set SysTick_Handler,Default_Handler |
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245 | |||
246 | .weak WWDG_IRQHandler |
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247 | .thumb_set WWDG_IRQHandler,Default_Handler |
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248 | |||
249 | .weak PVD_IRQHandler |
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250 | .thumb_set PVD_IRQHandler,Default_Handler |
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251 | |||
252 | .weak TAMPER_STAMP_IRQHandler |
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253 | .thumb_set TAMPER_STAMP_IRQHandler,Default_Handler |
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254 | |||
255 | .weak RTC_WKUP_IRQHandler |
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256 | .thumb_set RTC_WKUP_IRQHandler,Default_Handler |
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257 | |||
258 | .weak FLASH_IRQHandler |
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259 | .thumb_set FLASH_IRQHandler,Default_Handler |
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260 | |||
261 | .weak RCC_IRQHandler |
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262 | .thumb_set RCC_IRQHandler,Default_Handler |
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263 | |||
264 | .weak EXTI0_IRQHandler |
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265 | .thumb_set EXTI0_IRQHandler,Default_Handler |
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266 | |||
267 | .weak EXTI1_IRQHandler |
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268 | .thumb_set EXTI1_IRQHandler,Default_Handler |
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269 | |||
270 | .weak EXTI2_IRQHandler |
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271 | .thumb_set EXTI2_IRQHandler,Default_Handler |
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272 | |||
273 | .weak EXTI3_IRQHandler |
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274 | .thumb_set EXTI3_IRQHandler,Default_Handler |
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275 | |||
276 | .weak EXTI4_IRQHandler |
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277 | .thumb_set EXTI4_IRQHandler,Default_Handler |
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278 | |||
279 | .weak DMA1_Channel1_IRQHandler |
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280 | .thumb_set DMA1_Channel1_IRQHandler,Default_Handler |
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281 | |||
282 | .weak DMA1_Channel2_IRQHandler |
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283 | .thumb_set DMA1_Channel2_IRQHandler,Default_Handler |
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284 | |||
285 | .weak DMA1_Channel3_IRQHandler |
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286 | .thumb_set DMA1_Channel3_IRQHandler,Default_Handler |
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287 | |||
288 | .weak DMA1_Channel4_IRQHandler |
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289 | .thumb_set DMA1_Channel4_IRQHandler,Default_Handler |
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290 | |||
291 | .weak DMA1_Channel5_IRQHandler |
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292 | .thumb_set DMA1_Channel5_IRQHandler,Default_Handler |
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293 | |||
294 | .weak DMA1_Channel6_IRQHandler |
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295 | .thumb_set DMA1_Channel6_IRQHandler,Default_Handler |
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296 | |||
297 | .weak DMA1_Channel7_IRQHandler |
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298 | .thumb_set DMA1_Channel7_IRQHandler,Default_Handler |
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299 | |||
300 | .weak ADC1_IRQHandler |
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301 | .thumb_set ADC1_IRQHandler,Default_Handler |
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302 | |||
303 | .weak USB_HP_IRQHandler |
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304 | .thumb_set USB_HP_IRQHandler,Default_Handler |
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305 | |||
306 | .weak USB_LP_IRQHandler |
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307 | .thumb_set USB_LP_IRQHandler,Default_Handler |
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308 | |||
309 | .weak DAC_IRQHandler |
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310 | .thumb_set DAC_IRQHandler,Default_Handler |
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311 | |||
312 | .weak COMP_IRQHandler |
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313 | .thumb_set COMP_IRQHandler,Default_Handler |
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314 | |||
315 | .weak EXTI9_5_IRQHandler |
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316 | .thumb_set EXTI9_5_IRQHandler,Default_Handler |
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317 | |||
318 | .weak LCD_IRQHandler |
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319 | .thumb_set LCD_IRQHandler,Default_Handler |
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320 | |||
321 | .weak TIM9_IRQHandler |
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322 | .thumb_set TIM9_IRQHandler,Default_Handler |
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323 | |||
324 | .weak TIM10_IRQHandler |
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325 | .thumb_set TIM10_IRQHandler,Default_Handler |
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326 | |||
327 | .weak TIM11_IRQHandler |
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328 | .thumb_set TIM11_IRQHandler,Default_Handler |
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329 | |||
330 | .weak TIM2_IRQHandler |
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331 | .thumb_set TIM2_IRQHandler,Default_Handler |
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332 | |||
333 | .weak TIM3_IRQHandler |
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334 | .thumb_set TIM3_IRQHandler,Default_Handler |
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335 | |||
336 | .weak TIM4_IRQHandler |
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337 | .thumb_set TIM4_IRQHandler,Default_Handler |
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338 | |||
339 | .weak I2C1_EV_IRQHandler |
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340 | .thumb_set I2C1_EV_IRQHandler,Default_Handler |
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341 | |||
342 | .weak I2C1_ER_IRQHandler |
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343 | .thumb_set I2C1_ER_IRQHandler,Default_Handler |
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344 | |||
345 | .weak I2C2_EV_IRQHandler |
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346 | .thumb_set I2C2_EV_IRQHandler,Default_Handler |
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347 | |||
348 | .weak I2C2_ER_IRQHandler |
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349 | .thumb_set I2C2_ER_IRQHandler,Default_Handler |
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350 | |||
351 | .weak SPI1_IRQHandler |
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352 | .thumb_set SPI1_IRQHandler,Default_Handler |
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353 | |||
354 | .weak SPI2_IRQHandler |
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355 | .thumb_set SPI2_IRQHandler,Default_Handler |
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356 | |||
357 | .weak USART1_IRQHandler |
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358 | .thumb_set USART1_IRQHandler,Default_Handler |
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359 | |||
360 | .weak USART2_IRQHandler |
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361 | .thumb_set USART2_IRQHandler,Default_Handler |
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362 | |||
363 | .weak USART3_IRQHandler |
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364 | .thumb_set USART3_IRQHandler,Default_Handler |
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365 | |||
366 | .weak EXTI15_10_IRQHandler |
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367 | .thumb_set EXTI15_10_IRQHandler,Default_Handler |
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368 | |||
369 | .weak RTC_Alarm_IRQHandler |
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370 | .thumb_set RTC_Alarm_IRQHandler,Default_Handler |
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371 | |||
372 | .weak USB_FS_WKUP_IRQHandler |
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373 | .thumb_set USB_FS_WKUP_IRQHandler,Default_Handler |
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374 | |||
375 | .weak TIM6_IRQHandler |
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376 | .thumb_set TIM6_IRQHandler,Default_Handler |
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377 | |||
378 | .weak TIM7_IRQHandler |
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379 | .thumb_set TIM7_IRQHandler,Default_Handler |
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380 | |||
381 | .weak TIM5_IRQHandler |
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382 | .thumb_set TIM5_IRQHandler,Default_Handler |
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383 | |||
384 | .weak SPI3_IRQHandler |
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385 | .thumb_set SPI3_IRQHandler,Default_Handler |
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386 | |||
387 | .weak UART4_IRQHandler |
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388 | .thumb_set UART4_IRQHandler,Default_Handler |
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389 | |||
390 | .weak UART5_IRQHandler |
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391 | .thumb_set UART5_IRQHandler,Default_Handler |
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392 | |||
393 | .weak DMA2_Channel1_IRQHandler |
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394 | .thumb_set DMA2_Channel1_IRQHandler,Default_Handler |
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395 | |||
396 | .weak DMA2_Channel2_IRQHandler |
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397 | .thumb_set DMA2_Channel2_IRQHandler,Default_Handler |
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398 | |||
399 | .weak DMA2_Channel3_IRQHandler |
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400 | .thumb_set DMA2_Channel3_IRQHandler,Default_Handler |
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401 | |||
402 | .weak DMA2_Channel4_IRQHandler |
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403 | .thumb_set DMA2_Channel4_IRQHandler,Default_Handler |
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404 | |||
405 | .weak DMA2_Channel5_IRQHandler |
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406 | .thumb_set DMA2_Channel5_IRQHandler,Default_Handler |
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407 | |||
408 | .weak COMP_ACQ_IRQHandler |
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409 | .thumb_set COMP_ACQ_IRQHandler,Default_Handler |
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410 | |||
411 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
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412 |