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/**
2
  ******************************************************************************
3
  * @file    stm32l1xx_hal_pwr.c
4
  * @author  MCD Application Team
5
  * @brief   PWR HAL module driver.
6
  *
7
  *          This file provides firmware functions to manage the following
8
  *          functionalities of the Power Controller (PWR) peripheral:
9
  *           + Initialization/de-initialization functions
10
  *           + Peripheral Control functions
11
  *
12
  ******************************************************************************
13
  * @attention
14
  *
15
  * Copyright (c) 2017 STMicroelectronics.
16
  * All rights reserved.
17
  *
18
  * This software is licensed under terms that can be found in the LICENSE file
19
  * in the root directory of this software component.
20
  * If no LICENSE file comes with this software, it is provided AS-IS.
21
  *
22
  ******************************************************************************
23
  */
24
 
25
/* Includes ------------------------------------------------------------------*/
26
#include "stm32l1xx_hal.h"
27
 
28
/** @addtogroup STM32L1xx_HAL_Driver
29
  * @{
30
  */
31
 
32
/** @defgroup PWR PWR
33
  * @brief    PWR HAL module driver
34
  * @{
35
  */
36
 
37
#ifdef HAL_PWR_MODULE_ENABLED
38
 
39
/* Private typedef -----------------------------------------------------------*/
40
/* Private define ------------------------------------------------------------*/
41
#define PVD_MODE_IT               (0x00010000U)
42
#define PVD_MODE_EVT              (0x00020000U)
43
#define PVD_RISING_EDGE           (0x00000001U)
44
#define PVD_FALLING_EDGE          (0x00000002U)
45
 
46
/* Private macro -------------------------------------------------------------*/
47
/* Private variables ---------------------------------------------------------*/
48
/* Private function prototypes -----------------------------------------------*/
49
/* Private functions ---------------------------------------------------------*/
50
 
51
/** @defgroup PWR_Exported_Functions PWR Exported Functions
52
  * @{
53
  */
54
 
55
/** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
56
  *  @brief   Initialization and de-initialization functions
57
  *
58
@verbatim
59
 ===============================================================================
60
              ##### Initialization and de-initialization functions #####
61
 ===============================================================================
62
    [..]
63
      After reset, the backup domain (RTC registers, RTC backup data
64
      registers) is protected against possible unwanted
65
      write accesses.
66
      To enable access to the RTC Domain and RTC registers, proceed as follows:
67
        (+) Enable the Power Controller (PWR) APB1 interface clock using the
68
            __HAL_RCC_PWR_CLK_ENABLE() macro.
69
        (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
70
 
71
@endverbatim
72
  * @{
73
  */
74
 
75
/**
76
  * @brief  Deinitializes the PWR peripheral registers to their default reset values.
77
  * @note   Before calling this function, the VOS[1:0] bits should be configured
78
  *         to "10" and the system frequency has to be configured accordingly.
79
  *         To configure the VOS[1:0] bits, use the PWR_VoltageScalingConfig()
80
  *         function.
81
  * @note   ULP and FWU bits are not reset by this function.
82
  * @retval None
83
  */
84
void HAL_PWR_DeInit(void)
85
{
86
  __HAL_RCC_PWR_FORCE_RESET();
87
  __HAL_RCC_PWR_RELEASE_RESET();
88
}
89
 
90
/**
91
  * @brief  Enables access to the backup domain (RTC registers, RTC
92
  *         backup data registers ).
93
  * @note   If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
94
  *         Backup Domain Access should be kept enabled.
95
  * @retval None
96
  */
97
void HAL_PWR_EnableBkUpAccess(void)
98
{
99
  /* Enable access to RTC and backup registers */
100
  *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE;
101
}
102
 
103
/**
104
  * @brief  Disables access to the backup domain (RTC registers, RTC
105
  *         backup data registers).
106
  * @note   If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the
107
  *         Backup Domain Access should be kept enabled.
108
  * @retval None
109
  */
110
void HAL_PWR_DisableBkUpAccess(void)
111
{
112
  /* Disable access to RTC and backup registers */
113
  *(__IO uint32_t *) CR_DBP_BB = (uint32_t)DISABLE;
114
}
115
 
116
/**
117
  * @}
118
  */
119
 
120
/** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
121
  * @brief    Low Power modes configuration functions
122
  *
123
@verbatim
124
 
125
 ===============================================================================
126
                 ##### Peripheral Control functions #####
127
 ===============================================================================
128
 
129
    *** PVD configuration ***
130
    =========================
131
    [..]
132
      (+) The PVD is used to monitor the VDD power supply by comparing it to a
133
          threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
134
      (+) The PVD can use an external input analog voltage (PVD_IN) which is compared
135
      internally to VREFINT. The PVD_IN (PB7) has to be configured in Analog mode
136
      when PWR_PVDLevel_7 is selected (PLS[2:0] = 111).
137
 
138
      (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
139
          than the PVD threshold. This event is internally connected to the EXTI
140
          line16 and can generate an interrupt if enabled. This is done through
141
          __HAL_PWR_PVD_EXTI_ENABLE_IT() macro.
142
      (+) The PVD is stopped in Standby mode.
143
 
144
    *** WakeUp pin configuration ***
145
    ================================
146
    [..]
147
      (+) WakeUp pin is used to wake up the system from Standby mode. This pin is
148
          forced in input pull-down configuration and is active on rising edges.
149
      (+) There are two or three WakeUp pins:
150
          WakeUp Pin 1 on PA.00.
151
          WakeUp Pin 2 on PC.13.
152
          WakeUp Pin 3 on PE.06. : Only on product with GPIOE available
153
 
154
    [..]
155
    *** Main and Backup Regulators configuration ***
156
    ================================================
157
 
158
      (+) The main internal regulator can be configured to have a tradeoff between
159
          performance and power consumption when the device does not operate at
160
          the maximum frequency. This is done through __HAL_PWR_VOLTAGESCALING_CONFIG()
161
          macro which configure VOS bit in PWR_CR register:
162
        (++) When this bit is set (Regulator voltage output Scale 1 mode selected)
163
             the System frequency can go up to 32 MHz.
164
        (++) When this bit is reset (Regulator voltage output Scale 2 mode selected)
165
             the System frequency can go up to 16 MHz.
166
        (++) When this bit is reset (Regulator voltage output Scale 3 mode selected)
167
             the System frequency can go up to 4.2 MHz.
168
 
169
        Refer to the datasheets for more details.
170
 
171
    *** Low Power modes configuration ***
172
    =====================================
173
     [..]
174
      The device features 5 low-power modes:
175
      (+) Low power run mode: regulator in low power mode, limited clock frequency,
176
        limited number of peripherals running.
177
      (+) Sleep mode: Cortex-M3 core stopped, peripherals kept running.
178
      (+) Low power sleep mode: Cortex-M3 core stopped, limited clock frequency,
179
         limited number of peripherals running, regulator in low power mode.
180
      (+) Stop mode: All clocks are stopped, regulator running, regulator in low power mode.
181
      (+) Standby mode: VCORE domain powered off
182
 
183
   *** Low power run mode ***
184
   =========================
185
    [..]
186
       To further reduce the consumption when the system is in Run mode, the regulator can be
187
        configured in low power mode. In this mode, the system frequency should not exceed
188
        MSI frequency range1.
189
        In Low power run mode, all I/O pins keep the same state as in Run mode.
190
 
191
      (+) Entry:
192
        (++) VCORE in range2
193
        (++) Decrease the system frequency tonot exceed the frequency of MSI frequency range1.
194
        (++) The regulator is forced in low power mode using the HAL_PWREx_EnableLowPowerRunMode()
195
             function.
196
      (+) Exit:
197
        (++) The regulator is forced in Main regulator mode using the HAL_PWREx_DisableLowPowerRunMode()
198
              function.
199
        (++) Increase the system frequency if needed.
200
 
201
   *** Sleep mode ***
202
   ==================
203
    [..]
204
      (+) Entry:
205
          The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx)
206
              functions with
207
          (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
208
          (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
209
 
210
      (+) Exit:
211
        (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
212
              controller (NVIC) can wake up the device from Sleep mode.
213
 
214
   *** Low power sleep mode ***
215
   ============================
216
    [..]
217
      (+) Entry:
218
          The Low power sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFx)
219
              functions with
220
          (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
221
          (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
222
       (+) The Flash memory can be switched off by using the control bits (SLEEP_PD in the FLASH_ACR register.
223
             This reduces power consumption but increases the wake-up time.
224
 
225
      (+) Exit:
226
        (++) If the WFI instruction was used to enter Low power sleep mode, any peripheral interrupt
227
              acknowledged by the nested vectored interrupt controller (NVIC) can wake up the device
228
              from Low power sleep mode. If the WFE instruction was used to enter Low power sleep mode,
229
              the MCU exits Sleep mode as soon as an event occurs.
230
 
231
   *** Stop mode ***
232
   =================
233
    [..]
234
      The Stop mode is based on the Cortex-M3 deepsleep mode combined with peripheral
235
      clock gating. The voltage regulator can be configured either in normal or low-power mode.
236
      In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the MSI, the HSI and
237
      the HSE RC oscillators are disabled. Internal SRAM and register contents are preserved.
238
      To get the lowest consumption in Stop mode, the internal Flash memory also enters low
239
      power mode. When the Flash memory is in power-down mode, an additional startup delay is
240
      incurred when waking up from Stop mode.
241
      To minimize the consumption In Stop mode, VREFINT, the BOR, PVD, and temperature
242
      sensor can be switched off before entering Stop mode. They can be switched on again by
243
      software after exiting Stop mode using the ULP bit in the PWR_CR register.
244
      In Stop mode, all I/O pins keep the same state as in Run mode.
245
 
246
      (+) Entry:
247
           The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI )
248
             function with:
249
          (++) Main regulator ON.
250
          (++) Low Power regulator ON.
251
          (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
252
          (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
253
      (+) Exit:
254
        (++) By issuing an interrupt or a wakeup event, the MSI RC oscillator is selected as system clock.
255
 
256
   *** Standby mode ***
257
   ====================
258
     [..]
259
      The Standby mode allows to achieve the lowest power consumption. It is based on the
260
      Cortex-M3 deepsleep mode, with the voltage regulator disabled. The VCORE domain is
261
      consequently powered off. The PLL, the MSI, the HSI oscillator and the HSE oscillator are
262
      also switched off. SRAM and register contents are lost except for the RTC registers, RTC
263
      backup registers and Standby circuitry.
264
 
265
      To minimize the consumption In Standby mode, VREFINT, the BOR, PVD, and temperature
266
       sensor can be switched off before entering the Standby mode. They can be switched
267
       on again by software after exiting the Standby mode.
268
       function.
269
 
270
      (+) Entry:
271
        (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function.
272
      (+) Exit:
273
        (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
274
             tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
275
 
276
   *** Auto-wakeup (AWU) from low-power mode ***
277
   =============================================
278
    [..]
279
      The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
280
      Wakeup event, a tamper event, a time-stamp event, or a comparator event,
281
      without depending on an external interrupt (Auto-wakeup mode).
282
 
283
    (+) RTC auto-wakeup (AWU) from the Stop mode
284
        (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to:
285
             (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt
286
                   or Event modes) and Enable the RTC Alarm Interrupt using the HAL_RTC_SetAlarm_IT()
287
                   function
288
             (+++) Configure the RTC to generate the RTC alarm using the HAL_RTC_Init()
289
                   and HAL_RTC_SetTime() functions.
290
        (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
291
             is necessary to:
292
             (+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt or Event modes) and
293
                   Enable the RTC Tamper or time stamp Interrupt using the HAL_RTCEx_SetTamper_IT()
294
                   or HAL_RTCEx_SetTimeStamp_IT() functions.
295
        (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to:
296
             (+++) Configure the EXTI Line 20 to be sensitive to rising edges (Interrupt or Event modes) and
297
                   Enable the RTC WakeUp Interrupt using the HAL_RTCEx_SetWakeUpTimer_IT() function.
298
             (+++) Configure the RTC to generate the RTC WakeUp event using the HAL_RTCEx_SetWakeUpTimer()
299
                   function.
300
 
301
    (+) RTC auto-wakeup (AWU) from the Standby mode
302
        (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to:
303
             (+++) Enable the RTC Alarm Interrupt using the HAL_RTC_SetAlarm_IT() function.
304
             (+++) Configure the RTC to generate the RTC alarm using the HAL_RTC_Init()
305
                   and HAL_RTC_SetTime() functions.
306
        (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it
307
             is necessary to:
308
             (+++) Enable the RTC Tamper or time stamp Interrupt and Configure the RTC to
309
                   detect the tamper or time stamp event using the HAL_RTCEx_SetTimeStamp_IT()
310
                   or HAL_RTCEx_SetTamper_IT()functions.
311
        (++) To wake up from the Standby mode with an RTC WakeUp event, it is necessary to:
312
             (+++) Enable the RTC WakeUp Interrupt and Configure the RTC to generate the RTC WakeUp event
313
                   using the HAL_RTCEx_SetWakeUpTimer_IT() and HAL_RTCEx_SetWakeUpTimer() functions.
314
 
315
    (+) Comparator auto-wakeup (AWU) from the Stop mode
316
        (++) To wake up from the Stop mode with an comparator 1 or comparator 2 wakeup
317
             event, it is necessary to:
318
             (+++) Configure the EXTI Line 21 or EXTI Line 22 for comparator to be sensitive to to the
319
                   selected edges (falling, rising or falling and rising) (Interrupt or Event modes) using
320
                   the COMP functions.
321
             (+++) Configure the comparator to generate the event.
322
 
323
 
324
 
325
@endverbatim
326
  * @{
327
  */
328
 
329
/**
330
  * @brief  Configures the voltage threshold detected by the Power Voltage Detector(PVD).
331
  * @param  sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration
332
  *         information for the PVD.
333
  * @note   Refer to the electrical characteristics of your device datasheet for
334
  *         more details about the voltage threshold corresponding to each
335
  *         detection level.
336
  * @retval None
337
  */
338
void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
339
{
340
  /* Check the parameters */
341
  assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
342
  assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
343
 
344
  /* Set PLS[7:5] bits according to PVDLevel value */
345
  MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
346
 
347
  /* Clear any previous config. Keep it clear if no event or IT mode is selected */
348
  __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
349
  __HAL_PWR_PVD_EXTI_DISABLE_IT();
350
  __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE();
351
 
352
  /* Configure interrupt mode */
353
  if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
354
  {
355
    __HAL_PWR_PVD_EXTI_ENABLE_IT();
356
  }
357
 
358
  /* Configure event mode */
359
  if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
360
  {
361
    __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
362
  }
363
 
364
  /* Configure the edge */
365
  if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
366
  {
367
    __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
368
  }
369
 
370
  if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
371
  {
372
    __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
373
  }
374
}
375
 
376
/**
377
  * @brief  Enables the Power Voltage Detector(PVD).
378
  * @retval None
379
  */
380
void HAL_PWR_EnablePVD(void)
381
{
382
  /* Enable the power voltage detector */
383
  *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)ENABLE;
384
}
385
 
386
/**
387
  * @brief  Disables the Power Voltage Detector(PVD).
388
  * @retval None
389
  */
390
void HAL_PWR_DisablePVD(void)
391
{
392
  /* Disable the power voltage detector */
393
  *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)DISABLE;
394
}
395
 
396
/**
397
  * @brief Enables the WakeUp PINx functionality.
398
  * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable.
399
  *        This parameter can be one of the following values:
400
  *           @arg PWR_WAKEUP_PIN1
401
  *           @arg PWR_WAKEUP_PIN2
402
  *           @arg PWR_WAKEUP_PIN3: Only on product with GPIOE available
403
  * @retval None
404
  */
405
void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx)
406
{
407
  /* Check the parameter */
408
  assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
409
  /* Enable the EWUPx pin */
410
  *(__IO uint32_t *) CSR_EWUP_BB(WakeUpPinx) = (uint32_t)ENABLE;
411
}
412
 
413
/**
414
  * @brief Disables the WakeUp PINx functionality.
415
  * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
416
  *        This parameter can be one of the following values:
417
  *           @arg PWR_WAKEUP_PIN1
418
  *           @arg PWR_WAKEUP_PIN2
419
  *           @arg PWR_WAKEUP_PIN3: Only on product with GPIOE available
420
  * @retval None
421
  */
422
void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
423
{
424
  /* Check the parameter */
425
  assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
426
  /* Disable the EWUPx pin */
427
  *(__IO uint32_t *) CSR_EWUP_BB(WakeUpPinx) = (uint32_t)DISABLE;
428
}
429
 
430
/**
431
  * @brief Enters Sleep mode.
432
  * @note  In Sleep mode, all I/O pins keep the same state as in Run mode.
433
  * @param Regulator: Specifies the regulator state in SLEEP mode.
434
  *         This parameter can be one of the following values:
435
  *            @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON
436
  *            @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON
437
  * @param SLEEPEntry: Specifies if SLEEP mode is entered with WFI or WFE instruction.
438
  *           When WFI entry is used, tick interrupt have to be disabled if not desired as
439
  *           the interrupt wake up source.
440
  *           This parameter can be one of the following values:
441
  *            @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
442
  *            @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
443
  * @retval None
444
  */
445
void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
446
{
447
  /* Check the parameters */
448
  assert_param(IS_PWR_REGULATOR(Regulator));
449
  assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
450
 
451
  /* Select the regulator state in Sleep mode: Set PDDS and LPSDSR bit according to PWR_Regulator value */
452
  MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPSDSR), Regulator);
453
 
454
  /* Clear SLEEPDEEP bit of Cortex System Control Register */
455
  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
456
 
457
  /* Select SLEEP mode entry -------------------------------------------------*/
458
  if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
459
  {
460
    /* Request Wait For Interrupt */
461
    __WFI();
462
  }
463
  else
464
  {
465
    /* Request Wait For Event */
466
    __SEV();
467
    __WFE();
468
    __WFE();
469
  }
470
}
471
 
472
/**
473
  * @brief Enters Stop mode.
474
  * @note  In Stop mode, all I/O pins keep the same state as in Run mode.
475
  * @note  When exiting Stop mode by using an interrupt or a wakeup event,
476
  *        MSI RC oscillator is selected as system clock.
477
  * @note  When the voltage regulator operates in low power mode, an additional
478
  *         startup delay is incurred when waking up from Stop mode.
479
  *         By keeping the internal regulator ON during Stop mode, the consumption
480
  *         is higher although the startup time is reduced.
481
  * @param Regulator: Specifies the regulator state in Stop mode.
482
  *          This parameter can be one of the following values:
483
  *            @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON
484
  *            @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON
485
  * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction.
486
  *          This parameter can be one of the following values:
487
  *            @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction
488
  *            @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction
489
  * @retval None
490
  */
491
void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
492
{
493
  /* Check the parameters */
494
  assert_param(IS_PWR_REGULATOR(Regulator));
495
  assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
496
 
497
  /* Select the regulator state in Stop mode: Set PDDS and LPSDSR bit according to PWR_Regulator value */
498
  MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPSDSR), Regulator);
499
 
500
  /* Set SLEEPDEEP bit of Cortex System Control Register */
501
  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
502
 
503
  /* Select Stop mode entry --------------------------------------------------*/
504
  if(STOPEntry == PWR_STOPENTRY_WFI)
505
  {
506
    /* Request Wait For Interrupt */
507
    __WFI();
508
  }
509
  else
510
  {
511
    /* Request Wait For Event */
512
    __SEV();
513
    __WFE();
514
    __WFE();
515
  }
516
  /* Reset SLEEPDEEP bit of Cortex System Control Register */
517
  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
518
}
519
 
520
/**
521
  * @brief Enters Standby mode.
522
  * @note  In Standby mode, all I/O pins are high impedance except for:
523
  *          - Reset pad (still available)
524
  *          - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC
525
  *            Alarm out, or RTC clock calibration out.
526
  *          - WKUP pin 1 (PA0) if enabled.
527
  *          - WKUP pin 2 (PC13) if enabled.
528
  *          - WKUP pin 3 (PE6) if enabled.
529
  * @retval None
530
  */
531
void HAL_PWR_EnterSTANDBYMode(void)
532
{
533
  /* Select Standby mode */
534
  SET_BIT(PWR->CR, PWR_CR_PDDS);
535
 
536
  /* Set SLEEPDEEP bit of Cortex System Control Register */
537
  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
538
 
539
  /* This option is used to ensure that store operations are completed */
540
#if defined ( __CC_ARM)
541
  __force_stores();
542
#endif
543
  /* Request Wait For Interrupt */
544
  __WFI();
545
}
546
 
547
 
548
/**
549
  * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode.
550
  * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
551
  *       re-enters SLEEP mode when an interruption handling is over.
552
  *       Setting this bit is useful when the processor is expected to run only on
553
  *       interruptions handling.
554
  * @retval None
555
  */
556
void HAL_PWR_EnableSleepOnExit(void)
557
{
558
  /* Set SLEEPONEXIT bit of Cortex System Control Register */
559
  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
560
}
561
 
562
 
563
/**
564
  * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode.
565
  * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor
566
  *       re-enters SLEEP mode when an interruption handling is over.
567
  * @retval None
568
  */
569
void HAL_PWR_DisableSleepOnExit(void)
570
{
571
  /* Clear SLEEPONEXIT bit of Cortex System Control Register */
572
  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
573
}
574
 
575
 
576
/**
577
  * @brief Enables CORTEX M3 SEVONPEND bit.
578
  * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes
579
  *       WFE to wake up when an interrupt moves from inactive to pended.
580
  * @retval None
581
  */
582
void HAL_PWR_EnableSEVOnPend(void)
583
{
584
  /* Set SEVONPEND bit of Cortex System Control Register */
585
  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
586
}
587
 
588
 
589
/**
590
  * @brief Disables CORTEX M3 SEVONPEND bit.
591
  * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes
592
  *       WFE to wake up when an interrupt moves from inactive to pended.
593
  * @retval None
594
  */
595
void HAL_PWR_DisableSEVOnPend(void)
596
{
597
  /* Clear SEVONPEND bit of Cortex System Control Register */
598
  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
599
}
600
 
601
 
602
 
603
/**
604
  * @brief  This function handles the PWR PVD interrupt request.
605
  * @note   This API should be called under the PVD_IRQHandler().
606
  * @retval None
607
  */
608
void HAL_PWR_PVD_IRQHandler(void)
609
{
610
  /* Check PWR exti flag */
611
  if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
612
  {
613
    /* PWR PVD interrupt user callback */
614
    HAL_PWR_PVDCallback();
615
 
616
    /* Clear PWR Exti pending bit */
617
    __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
618
  }
619
}
620
 
621
/**
622
  * @brief  PWR PVD interrupt callback
623
  * @retval None
624
  */
625
__weak void HAL_PWR_PVDCallback(void)
626
{
627
  /* NOTE : This function Should not be modified, when the callback is needed,
628
            the HAL_PWR_PVDCallback could be implemented in the user file
629
   */
630
}
631
 
632
/**
633
  * @}
634
  */
635
 
636
/**
637
  * @}
638
  */
639
 
640
#endif /* HAL_PWR_MODULE_ENABLED */
641
/**
642
  * @}
643
  */
644
 
645
/**
646
  * @}
647
  */