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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 30 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32l1xx_hal_gpio.c |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief GPIO HAL module driver. |
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| 50 | mjames | 6 | * This file provides firmware functions to manage the following |
| 30 | mjames | 7 | * functionalities of the General Purpose Input/Output (GPIO) peripheral: |
| 8 | * + Initialization and de-initialization functions |
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| 9 | * + IO operation functions |
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| 50 | mjames | 10 | * |
| 30 | mjames | 11 | @verbatim |
| 12 | ============================================================================== |
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| 13 | ##### GPIO Peripheral features ##### |
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| 50 | mjames | 14 | ============================================================================== |
| 15 | [..] |
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| 16 | Each port bit of the general-purpose I/O (GPIO) ports can be individually |
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| 30 | mjames | 17 | configured by software in several modes: |
| 50 | mjames | 18 | (+) Input mode |
| 30 | mjames | 19 | (+) Analog mode |
| 20 | (+) Output mode |
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| 21 | (+) Alternate function mode |
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| 22 | (+) External interrupt/event lines |
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| 50 | mjames | 23 | |
| 24 | [..] |
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| 25 | During and just after reset, the alternate functions and external interrupt |
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| 30 | mjames | 26 | lines are not active and the I/O ports are configured in input floating mode. |
| 50 | mjames | 27 | |
| 28 | [..] |
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| 29 | All GPIO pins have weak internal pull-up and pull-down resistors, which can be |
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| 30 | mjames | 30 | activated or not. |
| 31 | |||
| 32 | [..] |
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| 33 | In Output or Alternate mode, each IO can be configured on open-drain or push-pull |
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| 34 | type and the IO speed can be selected depending on the VDD value. |
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| 50 | mjames | 35 | |
| 30 | mjames | 36 | [..] |
| 50 | mjames | 37 | The microcontroller IO pins are connected to onboard peripherals/modules through a |
| 38 | multiplexer that allows only one peripheral s alternate function (AF) connected |
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| 39 | to an IO pin at a time. In this way, there can be no conflict between peripherals |
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| 40 | sharing the same IO pin. |
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| 41 | |||
| 42 | [..] |
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| 43 | All ports have external interrupt/event capability. To use external interrupt |
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| 44 | lines, the port must be configured in input mode. All available GPIO pins are |
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| 30 | mjames | 45 | connected to the 16 external interrupt/event lines from EXTI0 to EXTI15. |
| 50 | mjames | 46 | |
| 47 | [..] |
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| 48 | The external interrupt/event controller consists of up to 28 edge detectors |
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| 30 | mjames | 49 | (depending on products 16 lines are connected to GPIO) for generating event/interrupt |
| 50 | mjames | 50 | requests (each input line can be independently configured to select the type |
| 51 | (interrupt or event) and the corresponding trigger event (rising or falling or both). |
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| 52 | Each line can also be masked independently. |
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| 53 | |||
| 30 | mjames | 54 | ##### How to use this driver ##### |
| 50 | mjames | 55 | ============================================================================== |
| 30 | mjames | 56 | [..] |
| 50 | mjames | 57 | (#) Enable the GPIO AHB clock using the following function : __GPIOx_CLK_ENABLE(). |
| 58 | |||
| 30 | mjames | 59 | (#) Configure the GPIO pin(s) using HAL_GPIO_Init(). |
| 60 | (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure |
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| 50 | mjames | 61 | (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef |
| 30 | mjames | 62 | structure. |
| 50 | mjames | 63 | (++) In case of Output or alternate function mode selection: the speed is |
| 64 | configured through "Speed" member from GPIO_InitTypeDef structure, |
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| 30 | mjames | 65 | the speed is configurable: Low, Medium and High. |
| 66 | (++) If alternate mode is selected, the alternate function connected to the IO |
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| 67 | is configured through "Alternate" member from GPIO_InitTypeDef structure |
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| 50 | mjames | 68 | (++) Analog mode is required when a pin is to be used as ADC channel |
| 30 | mjames | 69 | or DAC output. |
| 50 | mjames | 70 | (++) In case of external interrupt/event selection the "Mode" member from |
| 71 | GPIO_InitTypeDef structure select the type (interrupt or event) and |
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| 30 | mjames | 72 | the corresponding trigger event (rising or falling or both). |
| 50 | mjames | 73 | |
| 74 | (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority |
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| 30 | mjames | 75 | mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using |
| 76 | HAL_NVIC_EnableIRQ(). |
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| 50 | mjames | 77 | |
| 78 | (#) HAL_GPIO_DeInit allows to set register values to their reset value. It's also |
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| 79 | recommended to use it to unconfigure pin which was used as an external interrupt |
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| 80 | or in event mode. That's the only way to reset corresponding bit in EXTI & SYSCFG |
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| 30 | mjames | 81 | registers. |
| 50 | mjames | 82 | |
| 30 | mjames | 83 | (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin(). |
| 50 | mjames | 84 | |
| 85 | (#) To set/reset the level of a pin configured in output mode use |
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| 30 | mjames | 86 | HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). |
| 50 | mjames | 87 | |
| 30 | mjames | 88 | (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). |
| 50 | mjames | 89 | |
| 90 | (#) During and just after reset, the alternate functions are not |
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| 30 | mjames | 91 | active and the GPIO pins are configured in input floating mode (except JTAG |
| 92 | pins). |
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| 50 | mjames | 93 | |
| 94 | (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose |
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| 95 | (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has |
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| 30 | mjames | 96 | priority over the GPIO function. |
| 50 | mjames | 97 | |
| 98 | (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as |
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| 99 | general purpose PH0 and PH1, respectively, when the HSE oscillator is off. |
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| 30 | mjames | 100 | The HSE has priority over the GPIO function. |
| 50 | mjames | 101 | |
| 30 | mjames | 102 | @endverbatim |
| 103 | ****************************************************************************** |
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| 104 | * @attention |
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| 105 | * |
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| 50 | mjames | 106 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
| 107 | * All rights reserved.</center></h2> |
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| 30 | mjames | 108 | * |
| 50 | mjames | 109 | * This software component is licensed by ST under BSD 3-Clause license, |
| 110 | * the "License"; You may not use this file except in compliance with the |
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| 111 | * License. You may obtain a copy of the License at: |
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| 112 | * opensource.org/licenses/BSD-3-Clause |
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| 30 | mjames | 113 | * |
| 50 | mjames | 114 | ****************************************************************************** |
| 30 | mjames | 115 | */ |
| 116 | |||
| 117 | /* Includes ------------------------------------------------------------------*/ |
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| 118 | #include "stm32l1xx_hal.h" |
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| 119 | |||
| 120 | /** @addtogroup STM32L1xx_HAL_Driver |
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| 121 | * @{ |
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| 122 | */ |
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| 123 | |||
| 124 | /** @addtogroup GPIO |
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| 125 | * @brief GPIO HAL module driver |
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| 126 | * @{ |
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| 127 | */ |
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| 128 | |||
| 129 | #ifdef HAL_GPIO_MODULE_ENABLED |
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| 130 | |||
| 131 | /* Private typedef -----------------------------------------------------------*/ |
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| 132 | /* Private define ------------------------------------------------------------*/ |
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| 133 | /** @addtogroup GPIO_Private_Constants |
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| 134 | * @{ |
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| 135 | */ |
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| 50 | mjames | 136 | #define GPIO_NUMBER (16U) |
| 137 | |||
| 30 | mjames | 138 | /** |
| 139 | * @} |
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| 140 | */ |
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| 50 | mjames | 141 | |
| 30 | mjames | 142 | /* Private macro -------------------------------------------------------------*/ |
| 143 | /* Private variables ---------------------------------------------------------*/ |
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| 144 | /* Private function prototypes -----------------------------------------------*/ |
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| 145 | /* Exported functions ---------------------------------------------------------*/ |
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| 146 | |||
| 147 | /** @addtogroup GPIO_Exported_Functions |
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| 148 | * @{ |
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| 149 | */ |
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| 150 | |||
| 151 | /** @addtogroup GPIO_Exported_Functions_Group1 |
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| 50 | mjames | 152 | * @brief Initialization and Configuration functions |
| 30 | mjames | 153 | * |
| 50 | mjames | 154 | @verbatim |
| 30 | mjames | 155 | =============================================================================== |
| 156 | ##### Initialization and Configuration functions ##### |
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| 157 | =============================================================================== |
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| 50 | mjames | 158 | |
| 30 | mjames | 159 | @endverbatim |
| 160 | * @{ |
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| 161 | */ |
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| 162 | |||
| 163 | /** |
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| 164 | * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init. |
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| 50 | mjames | 165 | * @param GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
| 166 | * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains |
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| 30 | mjames | 167 | * the configuration information for the specified GPIO peripheral. |
| 168 | * @retval None |
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| 169 | */ |
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| 170 | void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) |
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| 50 | mjames | 171 | { |
| 30 | mjames | 172 | uint32_t position = 0x00; |
| 173 | uint32_t iocurrent = 0x00; |
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| 174 | uint32_t temp = 0x00; |
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| 175 | |||
| 176 | /* Check the parameters */ |
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| 177 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); |
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| 178 | assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); |
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| 179 | assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); |
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| 180 | |||
| 181 | /* Configure the port pins */ |
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| 182 | while (((GPIO_Init->Pin) >> position) != 0) |
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| 183 | { |
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| 184 | /* Get current io position */ |
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| 50 | mjames | 185 | iocurrent = (GPIO_Init->Pin) & (1U << position); |
| 186 | |||
| 187 | if (iocurrent) |
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| 30 | mjames | 188 | { |
| 189 | /*--------------------- GPIO Mode Configuration ------------------------*/ |
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| 190 | /* In case of Output or Alternate function mode selection */ |
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| 61 | mjames | 191 | if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || |
| 192 | ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) |
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| 30 | mjames | 193 | { |
| 194 | /* Check the Speed parameter */ |
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| 195 | assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); |
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| 196 | /* Configure the IO Speed */ |
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| 50 | mjames | 197 | temp = GPIOx->OSPEEDR; |
| 30 | mjames | 198 | CLEAR_BIT(temp, GPIO_OSPEEDER_OSPEEDR0 << (position * 2)); |
| 199 | SET_BIT(temp, GPIO_Init->Speed << (position * 2)); |
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| 200 | GPIOx->OSPEEDR = temp; |
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| 201 | |||
| 202 | /* Configure the IO Output Type */ |
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| 203 | temp = GPIOx->OTYPER; |
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| 204 | CLEAR_BIT(temp, GPIO_OTYPER_OT_0 << position) ; |
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| 61 | mjames | 205 | SET_BIT(temp, ((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); |
| 30 | mjames | 206 | GPIOx->OTYPER = temp; |
| 207 | } |
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| 208 | |||
| 61 | mjames | 209 | if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) |
| 210 | { |
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| 211 | /* Check the Pull parameter */ |
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| 212 | assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); |
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| 30 | mjames | 213 | |
| 61 | mjames | 214 | /* Activate the Pull-up or Pull down resistor for the current IO */ |
| 215 | temp = GPIOx->PUPDR; |
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| 216 | CLEAR_BIT(temp, GPIO_PUPDR_PUPDR0 << (position * 2)); |
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| 217 | SET_BIT(temp, (GPIO_Init->Pull) << (position * 2)); |
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| 218 | GPIOx->PUPDR = temp; |
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| 219 | } |
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| 220 | |||
| 50 | mjames | 221 | /* In case of Alternate function mode selection */ |
| 61 | mjames | 222 | if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) |
| 50 | mjames | 223 | { |
| 224 | /* Check the Alternate function parameters */ |
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| 225 | assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); |
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| 226 | assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); |
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| 227 | |||
| 228 | /* Configure Alternate function mapped with the current IO */ |
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| 229 | /* Identify AFRL or AFRH register based on IO position*/ |
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| 230 | temp = GPIOx->AFR[position >> 3]; |
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| 231 | CLEAR_BIT(temp, 0xFU << ((uint32_t)(position & 0x07U) * 4)); |
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| 232 | SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4)); |
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| 233 | GPIOx->AFR[position >> 3] = temp; |
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| 234 | } |
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| 235 | |||
| 236 | /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ |
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| 237 | temp = GPIOx->MODER; |
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| 238 | CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2)); |
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| 239 | SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2)); |
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| 240 | GPIOx->MODER = temp; |
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| 241 | |||
| 30 | mjames | 242 | /*--------------------- EXTI Mode Configuration ------------------------*/ |
| 243 | /* Configure the External Interrupt or event for the current IO */ |
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| 61 | mjames | 244 | if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U) |
| 30 | mjames | 245 | { |
| 246 | /* Enable SYSCFG Clock */ |
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| 247 | __HAL_RCC_SYSCFG_CLK_ENABLE(); |
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| 50 | mjames | 248 | |
| 30 | mjames | 249 | temp = SYSCFG->EXTICR[position >> 2]; |
| 50 | mjames | 250 | CLEAR_BIT(temp, (0x0FU) << (4 * (position & 0x03))); |
| 30 | mjames | 251 | SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))); |
| 252 | SYSCFG->EXTICR[position >> 2] = temp; |
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| 50 | mjames | 253 | |
| 30 | mjames | 254 | /* Clear EXTI line configuration */ |
| 255 | temp = EXTI->IMR; |
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| 256 | CLEAR_BIT(temp, (uint32_t)iocurrent); |
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| 61 | mjames | 257 | if ((GPIO_Init->Mode & EXTI_IT) != 0x00U) |
| 30 | mjames | 258 | { |
| 50 | mjames | 259 | SET_BIT(temp, iocurrent); |
| 30 | mjames | 260 | } |
| 261 | EXTI->IMR = temp; |
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| 262 | |||
| 263 | temp = EXTI->EMR; |
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| 50 | mjames | 264 | CLEAR_BIT(temp, (uint32_t)iocurrent); |
| 61 | mjames | 265 | if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U) |
| 30 | mjames | 266 | { |
| 50 | mjames | 267 | SET_BIT(temp, iocurrent); |
| 30 | mjames | 268 | } |
| 269 | EXTI->EMR = temp; |
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| 50 | mjames | 270 | |
| 30 | mjames | 271 | /* Clear Rising Falling edge configuration */ |
| 272 | temp = EXTI->RTSR; |
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| 50 | mjames | 273 | CLEAR_BIT(temp, (uint32_t)iocurrent); |
| 61 | mjames | 274 | if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U) |
| 30 | mjames | 275 | { |
| 50 | mjames | 276 | SET_BIT(temp, iocurrent); |
| 30 | mjames | 277 | } |
| 278 | EXTI->RTSR = temp; |
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| 279 | |||
| 280 | temp = EXTI->FTSR; |
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| 50 | mjames | 281 | CLEAR_BIT(temp, (uint32_t)iocurrent); |
| 61 | mjames | 282 | if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U) |
| 30 | mjames | 283 | { |
| 50 | mjames | 284 | SET_BIT(temp, iocurrent); |
| 30 | mjames | 285 | } |
| 286 | EXTI->FTSR = temp; |
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| 287 | } |
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| 288 | } |
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| 50 | mjames | 289 | |
| 30 | mjames | 290 | position++; |
| 50 | mjames | 291 | } |
| 30 | mjames | 292 | } |
| 293 | |||
| 294 | /** |
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| 295 | * @brief De-initializes the GPIOx peripheral registers to their default reset values. |
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| 50 | mjames | 296 | * @param GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
| 297 | * @param GPIO_Pin specifies the port bit to be written. |
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| 30 | mjames | 298 | * This parameter can be one of GPIO_PIN_x where x can be (0..15). |
| 299 | * @retval None |
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| 300 | */ |
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| 301 | void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) |
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| 302 | { |
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| 303 | uint32_t position = 0x00; |
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| 304 | uint32_t iocurrent = 0x00; |
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| 305 | uint32_t tmp = 0x00; |
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| 306 | |||
| 307 | /* Check the parameters */ |
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| 308 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); |
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| 309 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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| 310 | |||
| 311 | /* Configure the port pins */ |
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| 312 | while ((GPIO_Pin >> position) != 0) |
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| 313 | { |
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| 314 | /* Get current io position */ |
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| 50 | mjames | 315 | iocurrent = (GPIO_Pin) & (1U << position); |
| 30 | mjames | 316 | |
| 317 | if (iocurrent) |
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| 318 | { |
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| 319 | /*------------------------- EXTI Mode Configuration --------------------*/ |
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| 320 | /* Clear the External Interrupt or Event for the current IO */ |
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| 50 | mjames | 321 | |
| 30 | mjames | 322 | tmp = SYSCFG->EXTICR[position >> 2]; |
| 50 | mjames | 323 | tmp &= ((0x0FU) << (4 * (position & 0x03))); |
| 324 | if (tmp == (GPIO_GET_INDEX(GPIOx) << (4 * (position & 0x03)))) |
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| 30 | mjames | 325 | { |
| 326 | /* Clear EXTI line configuration */ |
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| 327 | CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent); |
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| 328 | CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent); |
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| 50 | mjames | 329 | |
| 30 | mjames | 330 | /* Clear Rising Falling edge configuration */ |
| 331 | CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent); |
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| 332 | CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent); |
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| 50 | mjames | 333 | |
| 334 | tmp = (0x0FU) << (4 * (position & 0x03)); |
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| 335 | CLEAR_BIT(SYSCFG->EXTICR[position >> 2], tmp); |
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| 30 | mjames | 336 | } |
| 50 | mjames | 337 | |
| 338 | /*------------------------- GPIO Mode Configuration --------------------*/ |
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| 339 | /* Configure IO Direction in Input Floting Mode */ |
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| 340 | CLEAR_BIT(GPIOx->MODER, GPIO_MODER_MODER0 << (position * 2)); |
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| 341 | |||
| 342 | /* Configure the default Alternate Function in current IO */ |
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| 343 | CLEAR_BIT(GPIOx->AFR[position >> 3], 0xFU << ((uint32_t)(position & 0x07U) * 4)) ; |
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| 344 | /* Deactivate the Pull-up oand Pull-down resistor for the current IO */ |
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| 345 | CLEAR_BIT(GPIOx->PUPDR, GPIO_PUPDR_PUPDR0 << (position * 2)); |
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| 346 | |||
| 347 | /* Configure the default value IO Output Type */ |
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| 348 | CLEAR_BIT(GPIOx->OTYPER, GPIO_OTYPER_OT_0 << position) ; |
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| 349 | |||
| 350 | /* Configure the default value for IO Speed */ |
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| 351 | CLEAR_BIT(GPIOx->OSPEEDR, GPIO_OSPEEDER_OSPEEDR0 << (position * 2)); |
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| 30 | mjames | 352 | } |
| 50 | mjames | 353 | |
| 30 | mjames | 354 | position++; |
| 355 | } |
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| 356 | } |
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| 357 | |||
| 358 | /** |
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| 359 | * @} |
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| 360 | */ |
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| 361 | |||
| 362 | /** @addtogroup GPIO_Exported_Functions_Group2 |
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| 363 | * @brief GPIO Read, Write, Toggle, Lock and EXTI management functions. |
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| 364 | * |
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| 50 | mjames | 365 | @verbatim |
| 30 | mjames | 366 | =============================================================================== |
| 367 | ##### IO operation functions ##### |
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| 50 | mjames | 368 | =============================================================================== |
| 30 | mjames | 369 | |
| 370 | @endverbatim |
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| 371 | * @{ |
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| 372 | */ |
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| 373 | |||
| 374 | /** |
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| 375 | * @brief Reads the specified input port pin. |
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| 50 | mjames | 376 | * @param GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
| 377 | * @param GPIO_Pin specifies the port bit to read. |
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| 30 | mjames | 378 | * This parameter can be GPIO_PIN_x where x can be (0..15). |
| 379 | * @retval The input port pin value. |
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| 380 | */ |
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| 50 | mjames | 381 | GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) |
| 30 | mjames | 382 | { |
| 383 | GPIO_PinState bitstatus; |
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| 384 | |||
| 385 | /* Check the parameters */ |
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| 386 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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| 387 | |||
| 388 | if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) |
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| 389 | { |
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| 390 | bitstatus = GPIO_PIN_SET; |
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| 391 | } |
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| 392 | else |
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| 393 | { |
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| 394 | bitstatus = GPIO_PIN_RESET; |
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| 395 | } |
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| 396 | return bitstatus; |
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| 397 | } |
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| 398 | |||
| 399 | /** |
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| 400 | * @brief Sets or clears the selected data port bit. |
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| 50 | mjames | 401 | * @note This function uses GPIOx_BSRR register to allow atomic read/modify |
| 30 | mjames | 402 | * accesses. In this way, there is no risk of an IRQ occurring between |
| 403 | * the read and the modify access. |
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| 50 | mjames | 404 | * @param GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
| 405 | * @param GPIO_Pin specifies the port bit to be written. |
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| 30 | mjames | 406 | * This parameter can be one of GPIO_PIN_x where x can be (0..15). |
| 50 | mjames | 407 | * @param PinState specifies the value to be written to the selected bit. |
| 30 | mjames | 408 | * This parameter can be one of the GPIO_PinState enum values: |
| 409 | * @arg GPIO_PIN_RESET: to clear the port pin |
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| 410 | * @arg GPIO_PIN_SET: to set the port pin |
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| 411 | * @retval None |
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| 412 | */ |
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| 50 | mjames | 413 | void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) |
| 30 | mjames | 414 | { |
| 415 | /* Check the parameters */ |
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| 416 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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| 417 | assert_param(IS_GPIO_PIN_ACTION(PinState)); |
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| 418 | |||
| 419 | if (PinState != GPIO_PIN_RESET) |
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| 420 | { |
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| 421 | GPIOx->BSRR = (uint32_t)GPIO_Pin; |
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| 422 | } |
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| 423 | else |
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| 424 | { |
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| 425 | GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ; |
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| 426 | } |
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| 427 | } |
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| 50 | mjames | 428 | |
| 30 | mjames | 429 | /** |
| 430 | * @brief Toggles the specified GPIO pin |
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| 50 | mjames | 431 | * @param GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
| 432 | * @param GPIO_Pin specifies the pins to be toggled. |
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| 30 | mjames | 433 | * @retval None |
| 434 | */ |
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| 50 | mjames | 435 | void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) |
| 30 | mjames | 436 | { |
| 50 | mjames | 437 | uint32_t odr; |
| 438 | |||
| 30 | mjames | 439 | /* Check the parameters */ |
| 440 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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| 441 | |||
| 50 | mjames | 442 | /* get current Ouput Data Register value */ |
| 443 | odr = GPIOx->ODR; |
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| 444 | |||
| 445 | /* Set selected pins that were at low level, and reset ones that were high */ |
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| 446 | GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); |
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| 30 | mjames | 447 | } |
| 448 | |||
| 449 | /** |
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| 450 | * @brief Locks GPIO Pins configuration registers. |
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| 451 | * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, |
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| 452 | * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. |
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| 453 | * @note The configuration of the locked GPIO pins can no longer be modified |
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| 454 | * until the next reset. |
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| 455 | * @note Limitation concerning GPIOx_OTYPER: Locking of GPIOx_OTYPER[i] with i = 15..8 |
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| 456 | * depends from setting of GPIOx_LCKR[i-8] and not from GPIOx_LCKR[i]. |
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| 457 | * GPIOx_LCKR[i-8] is locking GPIOx_OTYPER[i] together with GPIOx_OTYPER[i-8]. |
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| 458 | * It is not possible to lock GPIOx_OTYPER[i] with i = 15..8, without locking also |
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| 459 | * GPIOx_OTYPER[i-8]. |
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| 460 | * Workaround: When calling HAL_GPIO_LockPin with GPIO_Pin from GPIO_PIN_8 to GPIO_PIN_15, |
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| 50 | mjames | 461 | * you must call also HAL_GPIO_LockPin with GPIO_Pin - 8. |
| 462 | * (When locking a pin from GPIO_PIN_8 to GPIO_PIN_15, you must lock also the corresponding |
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| 30 | mjames | 463 | * GPIO_PIN_0 to GPIO_PIN_7). |
| 50 | mjames | 464 | * @param GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
| 465 | * @param GPIO_Pin Specifies the port bit to be locked. |
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| 30 | mjames | 466 | * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). |
| 467 | * @retval None |
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| 468 | */ |
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| 50 | mjames | 469 | HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) |
| 30 | mjames | 470 | { |
| 471 | __IO uint32_t tmp = GPIO_LCKR_LCKK; |
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| 472 | |||
| 473 | /* Check the parameters */ |
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| 474 | assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx)); |
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| 475 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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| 476 | |||
| 477 | /* Apply lock key write sequence */ |
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| 478 | SET_BIT(tmp, GPIO_Pin); |
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| 479 | /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ |
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| 480 | GPIOx->LCKR = tmp; |
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| 481 | /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */ |
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| 482 | GPIOx->LCKR = GPIO_Pin; |
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| 483 | /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ |
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| 484 | GPIOx->LCKR = tmp; |
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| 50 | mjames | 485 | /* Read LCKK register. This read is mandatory to complete key lock sequence */ |
| 30 | mjames | 486 | tmp = GPIOx->LCKR; |
| 487 | |||
| 50 | mjames | 488 | /* Read again in order to confirm lock is active */ |
| 489 | if ((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET) |
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| 30 | mjames | 490 | { |
| 491 | return HAL_OK; |
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| 492 | } |
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| 493 | else |
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| 494 | { |
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| 495 | return HAL_ERROR; |
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| 496 | } |
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| 497 | } |
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| 498 | |||
| 499 | /** |
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| 500 | * @brief This function handles EXTI interrupt request. |
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| 50 | mjames | 501 | * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. |
| 30 | mjames | 502 | * @retval None |
| 503 | */ |
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| 504 | void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) |
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| 505 | { |
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| 506 | /* EXTI line interrupt detected */ |
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| 50 | mjames | 507 | if (__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) |
| 508 | { |
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| 30 | mjames | 509 | __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); |
| 510 | HAL_GPIO_EXTI_Callback(GPIO_Pin); |
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| 511 | } |
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| 512 | } |
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| 513 | |||
| 514 | /** |
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| 515 | * @brief EXTI line detection callbacks. |
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| 50 | mjames | 516 | * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. |
| 30 | mjames | 517 | * @retval None |
| 518 | */ |
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| 519 | __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) |
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| 520 | { |
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| 521 | /* Prevent unused argument(s) compilation warning */ |
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| 522 | UNUSED(GPIO_Pin); |
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| 523 | |||
| 524 | /* NOTE : This function Should not be modified, when the callback is needed, |
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| 525 | the HAL_GPIO_EXTI_Callback could be implemented in the user file |
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| 50 | mjames | 526 | */ |
| 30 | mjames | 527 | } |
| 528 | |||
| 529 | /** |
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| 530 | * @} |
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| 531 | */ |
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| 532 | |||
| 533 | |||
| 534 | /** |
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| 535 | * @} |
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| 536 | */ |
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| 537 | |||
| 538 | #endif /* HAL_GPIO_MODULE_ENABLED */ |
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| 539 | /** |
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| 540 | * @} |
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| 541 | */ |
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| 542 | |||
| 543 | /** |
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| 544 | * @} |
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| 545 | */ |
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| 546 | |||
| 547 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |