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30 mjames 1
/**
2
  ******************************************************************************
3
  * @file    stm32l1xx_hal_gpio.c
4
  * @author  MCD Application Team
5
  * @brief   GPIO HAL module driver.
50 mjames 6
  *          This file provides firmware functions to manage the following
30 mjames 7
  *          functionalities of the General Purpose Input/Output (GPIO) peripheral:
8
  *           + Initialization and de-initialization functions
9
  *           + IO operation functions
50 mjames 10
  *
30 mjames 11
  @verbatim
12
  ==============================================================================
13
                    ##### GPIO Peripheral features #####
50 mjames 14
  ==============================================================================
15
  [..]
16
  Each port bit of the general-purpose I/O (GPIO) ports can be individually
30 mjames 17
  configured by software in several modes:
50 mjames 18
  (+) Input mode
30 mjames 19
  (+) Analog mode
20
  (+) Output mode
21
  (+) Alternate function mode
22
  (+) External interrupt/event lines
50 mjames 23
 
24
  [..]
25
  During and just after reset, the alternate functions and external interrupt
30 mjames 26
  lines are not active and the I/O ports are configured in input floating mode.
50 mjames 27
 
28
  [..]
29
  All GPIO pins have weak internal pull-up and pull-down resistors, which can be
30 mjames 30
  activated or not.
31
 
32
  [..]
33
  In Output or Alternate mode, each IO can be configured on open-drain or push-pull
34
  type and the IO speed can be selected depending on the VDD value.
50 mjames 35
 
30 mjames 36
  [..]
50 mjames 37
  The microcontroller IO pins are connected to onboard peripherals/modules through a
38
  multiplexer that allows only one peripheral s alternate function (AF) connected
39
  to an IO pin at a time. In this way, there can be no conflict between peripherals
40
  sharing the same IO pin.
41
 
42
  [..]
43
  All ports have external interrupt/event capability. To use external interrupt
44
  lines, the port must be configured in input mode. All available GPIO pins are
30 mjames 45
  connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
50 mjames 46
 
47
  [..]
48
  The external interrupt/event controller consists of up to 28 edge detectors
30 mjames 49
  (depending on products 16 lines are connected to GPIO) for generating event/interrupt
50 mjames 50
  requests (each input line can be independently configured to select the type
51
  (interrupt or event) and the corresponding trigger event (rising or falling or both).
52
  Each line can also be masked independently.
53
 
30 mjames 54
            ##### How to use this driver #####
50 mjames 55
  ==============================================================================
30 mjames 56
  [..]
50 mjames 57
   (#) Enable the GPIO AHB clock using the following function : __GPIOx_CLK_ENABLE().
58
 
30 mjames 59
   (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
60
       (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
50 mjames 61
       (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
30 mjames 62
            structure.
50 mjames 63
       (++) In case of Output or alternate function mode selection: the speed is
64
            configured through "Speed" member from GPIO_InitTypeDef structure,
30 mjames 65
            the speed is configurable: Low, Medium and High.
66
       (++) If alternate mode is selected, the alternate function connected to the IO
67
            is configured through "Alternate" member from GPIO_InitTypeDef structure
50 mjames 68
       (++) Analog mode is required when a pin is to be used as ADC channel
30 mjames 69
            or DAC output.
50 mjames 70
       (++) In case of external interrupt/event selection the "Mode" member from
71
            GPIO_InitTypeDef structure select the type (interrupt or event) and
30 mjames 72
            the corresponding trigger event (rising or falling or both).
50 mjames 73
 
74
   (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
30 mjames 75
       mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
76
       HAL_NVIC_EnableIRQ().
50 mjames 77
 
78
   (#) HAL_GPIO_DeInit allows to set register values to their reset value. It's also
79
       recommended to use it to unconfigure pin which was used as an external interrupt
80
       or in event mode. That's the only way to reset corresponding bit in EXTI & SYSCFG
30 mjames 81
       registers.
50 mjames 82
 
30 mjames 83
   (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
50 mjames 84
 
85
   (#) To set/reset the level of a pin configured in output mode use
30 mjames 86
       HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
50 mjames 87
 
30 mjames 88
   (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
50 mjames 89
 
90
   (#) During and just after reset, the alternate functions are not
30 mjames 91
       active and the GPIO pins are configured in input floating mode (except JTAG
92
       pins).
50 mjames 93
 
94
   (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
95
       (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
30 mjames 96
       priority over the GPIO function.
50 mjames 97
 
98
   (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
99
       general purpose PH0 and PH1, respectively, when the HSE oscillator is off.
30 mjames 100
       The HSE has priority over the GPIO function.
50 mjames 101
 
30 mjames 102
  @endverbatim
103
  ******************************************************************************
104
  * @attention
105
  *
50 mjames 106
  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
107
  * All rights reserved.</center></h2>
30 mjames 108
  *
50 mjames 109
  * This software component is licensed by ST under BSD 3-Clause license,
110
  * the "License"; You may not use this file except in compliance with the
111
  * License. You may obtain a copy of the License at:
112
  *                        opensource.org/licenses/BSD-3-Clause
30 mjames 113
  *
50 mjames 114
  ******************************************************************************
30 mjames 115
  */
116
 
117
/* Includes ------------------------------------------------------------------*/
118
#include "stm32l1xx_hal.h"
119
 
120
/** @addtogroup STM32L1xx_HAL_Driver
121
  * @{
122
  */
123
 
124
/** @addtogroup GPIO
125
  * @brief GPIO HAL module driver
126
  * @{
127
  */
128
 
129
#ifdef HAL_GPIO_MODULE_ENABLED
130
 
131
/* Private typedef -----------------------------------------------------------*/
132
/* Private define ------------------------------------------------------------*/
133
/** @addtogroup GPIO_Private_Constants
134
  * @{
135
  */
50 mjames 136
#define GPIO_NUMBER           (16U)
137
 
30 mjames 138
/**
139
  * @}
140
  */
50 mjames 141
 
30 mjames 142
/* Private macro -------------------------------------------------------------*/
143
/* Private variables ---------------------------------------------------------*/
144
/* Private function prototypes -----------------------------------------------*/
145
/* Exported functions ---------------------------------------------------------*/
146
 
147
/** @addtogroup GPIO_Exported_Functions
148
  * @{
149
  */
150
 
151
/** @addtogroup GPIO_Exported_Functions_Group1
50 mjames 152
 *  @brief    Initialization and Configuration functions
30 mjames 153
 *
50 mjames 154
@verbatim
30 mjames 155
 ===============================================================================
156
              ##### Initialization and Configuration functions #####
157
 ===============================================================================
50 mjames 158
 
30 mjames 159
@endverbatim
160
  * @{
161
  */
162
 
163
/**
164
  * @brief  Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init.
50 mjames 165
  * @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
166
  * @param  GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
30 mjames 167
  *         the configuration information for the specified GPIO peripheral.
168
  * @retval None
169
  */
170
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
50 mjames 171
{
30 mjames 172
  uint32_t position = 0x00;
173
  uint32_t iocurrent = 0x00;
174
  uint32_t temp = 0x00;
175
 
176
  /* Check the parameters */
177
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
178
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
179
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
180
 
181
  /* Configure the port pins */
182
  while (((GPIO_Init->Pin) >> position) != 0)
183
  {
184
    /* Get current io position */
50 mjames 185
    iocurrent = (GPIO_Init->Pin) & (1U << position);
186
 
187
    if (iocurrent)
30 mjames 188
    {
189
      /*--------------------- GPIO Mode Configuration ------------------------*/
190
      /* In case of Output or Alternate function mode selection */
61 mjames 191
      if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) ||
192
          ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
30 mjames 193
      {
194
        /* Check the Speed parameter */
195
        assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
196
        /* Configure the IO Speed */
50 mjames 197
        temp = GPIOx->OSPEEDR;
30 mjames 198
        CLEAR_BIT(temp, GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
199
        SET_BIT(temp, GPIO_Init->Speed << (position * 2));
200
        GPIOx->OSPEEDR = temp;
201
 
202
        /* Configure the IO Output Type */
203
        temp = GPIOx->OTYPER;
204
        CLEAR_BIT(temp, GPIO_OTYPER_OT_0 << position) ;
61 mjames 205
        SET_BIT(temp, ((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
30 mjames 206
        GPIOx->OTYPER = temp;
207
      }
208
 
61 mjames 209
      if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
210
      {
211
        /* Check the Pull parameter */
212
        assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
30 mjames 213
 
61 mjames 214
        /* Activate the Pull-up or Pull down resistor for the current IO */
215
        temp = GPIOx->PUPDR;
216
        CLEAR_BIT(temp, GPIO_PUPDR_PUPDR0 << (position * 2));
217
        SET_BIT(temp, (GPIO_Init->Pull) << (position * 2));
218
        GPIOx->PUPDR = temp;
219
      }
220
 
50 mjames 221
      /* In case of Alternate function mode selection */
61 mjames 222
      if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
50 mjames 223
      {
224
        /* Check the Alternate function parameters */
225
        assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
226
        assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
227
 
228
        /* Configure Alternate function mapped with the current IO */
229
        /* Identify AFRL or AFRH register based on IO position*/
230
        temp = GPIOx->AFR[position >> 3];
231
        CLEAR_BIT(temp, 0xFU << ((uint32_t)(position & 0x07U) * 4));
232
        SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4));
233
        GPIOx->AFR[position >> 3] = temp;
234
      }
235
 
236
      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
237
      temp = GPIOx->MODER;
238
      CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2));
239
      SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2));
240
      GPIOx->MODER = temp;
241
 
30 mjames 242
      /*--------------------- EXTI Mode Configuration ------------------------*/
243
      /* Configure the External Interrupt or event for the current IO */
61 mjames 244
      if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
30 mjames 245
      {
246
        /* Enable SYSCFG Clock */
247
        __HAL_RCC_SYSCFG_CLK_ENABLE();
50 mjames 248
 
30 mjames 249
        temp = SYSCFG->EXTICR[position >> 2];
50 mjames 250
        CLEAR_BIT(temp, (0x0FU) << (4 * (position & 0x03)));
30 mjames 251
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)));
252
        SYSCFG->EXTICR[position >> 2] = temp;
50 mjames 253
 
30 mjames 254
        /* Clear EXTI line configuration */
255
        temp = EXTI->IMR;
256
        CLEAR_BIT(temp, (uint32_t)iocurrent);
61 mjames 257
        if ((GPIO_Init->Mode & EXTI_IT) != 0x00U)
30 mjames 258
        {
50 mjames 259
          SET_BIT(temp, iocurrent);
30 mjames 260
        }
261
        EXTI->IMR = temp;
262
 
263
        temp = EXTI->EMR;
50 mjames 264
        CLEAR_BIT(temp, (uint32_t)iocurrent);
61 mjames 265
        if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
30 mjames 266
        {
50 mjames 267
          SET_BIT(temp, iocurrent);
30 mjames 268
        }
269
        EXTI->EMR = temp;
50 mjames 270
 
30 mjames 271
        /* Clear Rising Falling edge configuration */
272
        temp = EXTI->RTSR;
50 mjames 273
        CLEAR_BIT(temp, (uint32_t)iocurrent);
61 mjames 274
        if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
30 mjames 275
        {
50 mjames 276
          SET_BIT(temp, iocurrent);
30 mjames 277
        }
278
        EXTI->RTSR = temp;
279
 
280
        temp = EXTI->FTSR;
50 mjames 281
        CLEAR_BIT(temp, (uint32_t)iocurrent);
61 mjames 282
        if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
30 mjames 283
        {
50 mjames 284
          SET_BIT(temp, iocurrent);
30 mjames 285
        }
286
        EXTI->FTSR = temp;
287
      }
288
    }
50 mjames 289
 
30 mjames 290
    position++;
50 mjames 291
  }
30 mjames 292
}
293
 
294
/**
295
  * @brief  De-initializes the GPIOx peripheral registers to their default reset values.
50 mjames 296
  * @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
297
  * @param  GPIO_Pin specifies the port bit to be written.
30 mjames 298
  *         This parameter can be one of GPIO_PIN_x where x can be (0..15).
299
  * @retval None
300
  */
301
void HAL_GPIO_DeInit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin)
302
{
303
  uint32_t position = 0x00;
304
  uint32_t iocurrent = 0x00;
305
  uint32_t tmp = 0x00;
306
 
307
  /* Check the parameters */
308
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
309
  assert_param(IS_GPIO_PIN(GPIO_Pin));
310
 
311
  /* Configure the port pins */
312
  while ((GPIO_Pin >> position) != 0)
313
  {
314
    /* Get current io position */
50 mjames 315
    iocurrent = (GPIO_Pin) & (1U << position);
30 mjames 316
 
317
    if (iocurrent)
318
    {
319
      /*------------------------- EXTI Mode Configuration --------------------*/
320
      /* Clear the External Interrupt or Event for the current IO */
50 mjames 321
 
30 mjames 322
      tmp = SYSCFG->EXTICR[position >> 2];
50 mjames 323
      tmp &= ((0x0FU) << (4 * (position & 0x03)));
324
      if (tmp == (GPIO_GET_INDEX(GPIOx) << (4 * (position & 0x03))))
30 mjames 325
      {
326
        /* Clear EXTI line configuration */
327
        CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent);
328
        CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent);
50 mjames 329
 
30 mjames 330
        /* Clear Rising Falling edge configuration */
331
        CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent);
332
        CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent);
50 mjames 333
 
334
        tmp = (0x0FU) << (4 * (position & 0x03));
335
        CLEAR_BIT(SYSCFG->EXTICR[position >> 2], tmp);
30 mjames 336
      }
50 mjames 337
 
338
      /*------------------------- GPIO Mode Configuration --------------------*/
339
      /* Configure IO Direction in Input Floting Mode */
340
      CLEAR_BIT(GPIOx->MODER, GPIO_MODER_MODER0 << (position * 2));
341
 
342
      /* Configure the default Alternate Function in current IO */
343
      CLEAR_BIT(GPIOx->AFR[position >> 3], 0xFU << ((uint32_t)(position & 0x07U) * 4)) ;
344
      /* Deactivate the Pull-up oand Pull-down resistor for the current IO */
345
      CLEAR_BIT(GPIOx->PUPDR, GPIO_PUPDR_PUPDR0 << (position * 2));
346
 
347
      /* Configure the default value IO Output Type */
348
      CLEAR_BIT(GPIOx->OTYPER, GPIO_OTYPER_OT_0 << position) ;
349
 
350
      /* Configure the default value for IO Speed */
351
      CLEAR_BIT(GPIOx->OSPEEDR, GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
30 mjames 352
    }
50 mjames 353
 
30 mjames 354
    position++;
355
  }
356
}
357
 
358
/**
359
  * @}
360
  */
361
 
362
/** @addtogroup GPIO_Exported_Functions_Group2
363
 *  @brief GPIO Read, Write, Toggle, Lock and EXTI management functions.
364
 *
50 mjames 365
@verbatim
30 mjames 366
 ===============================================================================
367
                       ##### IO operation functions #####
50 mjames 368
 ===============================================================================
30 mjames 369
 
370
@endverbatim
371
  * @{
372
  */
373
 
374
/**
375
  * @brief  Reads the specified input port pin.
50 mjames 376
  * @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
377
  * @param  GPIO_Pin specifies the port bit to read.
30 mjames 378
  *         This parameter can be GPIO_PIN_x where x can be (0..15).
379
  * @retval The input port pin value.
380
  */
50 mjames 381
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
30 mjames 382
{
383
  GPIO_PinState bitstatus;
384
 
385
  /* Check the parameters */
386
  assert_param(IS_GPIO_PIN(GPIO_Pin));
387
 
388
  if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
389
  {
390
    bitstatus = GPIO_PIN_SET;
391
  }
392
  else
393
  {
394
    bitstatus = GPIO_PIN_RESET;
395
  }
396
  return bitstatus;
397
}
398
 
399
/**
400
  * @brief  Sets or clears the selected data port bit.
50 mjames 401
  * @note   This function uses GPIOx_BSRR register to allow atomic read/modify
30 mjames 402
  *         accesses. In this way, there is no risk of an IRQ occurring between
403
  *         the read and the modify access.
50 mjames 404
  * @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
405
  * @param  GPIO_Pin specifies the port bit to be written.
30 mjames 406
  *          This parameter can be one of GPIO_PIN_x where x can be (0..15).
50 mjames 407
  * @param  PinState specifies the value to be written to the selected bit.
30 mjames 408
  *          This parameter can be one of the GPIO_PinState enum values:
409
  *            @arg GPIO_PIN_RESET: to clear the port pin
410
  *            @arg GPIO_PIN_SET: to set the port pin
411
  * @retval None
412
  */
50 mjames 413
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
30 mjames 414
{
415
  /* Check the parameters */
416
  assert_param(IS_GPIO_PIN(GPIO_Pin));
417
  assert_param(IS_GPIO_PIN_ACTION(PinState));
418
 
419
  if (PinState != GPIO_PIN_RESET)
420
  {
421
    GPIOx->BSRR = (uint32_t)GPIO_Pin;
422
  }
423
  else
424
  {
425
    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ;
426
  }
427
}
50 mjames 428
 
30 mjames 429
/**
430
  * @brief  Toggles the specified GPIO pin
50 mjames 431
  * @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
432
  * @param  GPIO_Pin specifies the pins to be toggled.
30 mjames 433
  * @retval None
434
  */
50 mjames 435
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
30 mjames 436
{
50 mjames 437
  uint32_t odr;
438
 
30 mjames 439
  /* Check the parameters */
440
  assert_param(IS_GPIO_PIN(GPIO_Pin));
441
 
50 mjames 442
  /* get current Ouput Data Register value */
443
  odr = GPIOx->ODR;
444
 
445
  /* Set selected pins that were at low level, and reset ones that were high */
446
  GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
30 mjames 447
}
448
 
449
/**
450
* @brief  Locks GPIO Pins configuration registers.
451
* @note   The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
452
*         GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
453
* @note   The configuration of the locked GPIO pins can no longer be modified
454
*         until the next reset.
455
* @note   Limitation concerning GPIOx_OTYPER: Locking of GPIOx_OTYPER[i] with i = 15..8
456
*         depends from setting of GPIOx_LCKR[i-8] and not from GPIOx_LCKR[i].
457
*         GPIOx_LCKR[i-8] is locking GPIOx_OTYPER[i] together with GPIOx_OTYPER[i-8].
458
*         It is not possible to lock GPIOx_OTYPER[i] with i = 15..8, without locking also
459
*         GPIOx_OTYPER[i-8].
460
*         Workaround: When calling HAL_GPIO_LockPin with GPIO_Pin from GPIO_PIN_8 to GPIO_PIN_15,
50 mjames 461
*         you must call also HAL_GPIO_LockPin with GPIO_Pin - 8.
462
*         (When locking a pin from GPIO_PIN_8 to GPIO_PIN_15, you must lock also the corresponding
30 mjames 463
*         GPIO_PIN_0 to GPIO_PIN_7).
50 mjames 464
* @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
465
* @param  GPIO_Pin Specifies the port bit to be locked.
30 mjames 466
*         This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
467
* @retval None
468
*/
50 mjames 469
HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
30 mjames 470
{
471
  __IO uint32_t tmp = GPIO_LCKR_LCKK;
472
 
473
  /* Check the parameters */
474
  assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx));
475
  assert_param(IS_GPIO_PIN(GPIO_Pin));
476
 
477
  /* Apply lock key write sequence */
478
  SET_BIT(tmp, GPIO_Pin);
479
  /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
480
  GPIOx->LCKR = tmp;
481
  /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
482
  GPIOx->LCKR = GPIO_Pin;
483
  /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
484
  GPIOx->LCKR = tmp;
50 mjames 485
  /* Read LCKK register. This read is mandatory to complete key lock sequence */
30 mjames 486
  tmp = GPIOx->LCKR;
487
 
50 mjames 488
  /* Read again in order to confirm lock is active */
489
  if ((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET)
30 mjames 490
  {
491
    return HAL_OK;
492
  }
493
  else
494
  {
495
    return HAL_ERROR;
496
  }
497
}
498
 
499
/**
500
  * @brief  This function handles EXTI interrupt request.
50 mjames 501
  * @param  GPIO_Pin Specifies the port pin connected to corresponding EXTI line.
30 mjames 502
  * @retval None
503
  */
504
void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
505
{
506
  /* EXTI line interrupt detected */
50 mjames 507
  if (__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)
508
  {
30 mjames 509
    __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
510
    HAL_GPIO_EXTI_Callback(GPIO_Pin);
511
  }
512
}
513
 
514
/**
515
  * @brief  EXTI line detection callbacks.
50 mjames 516
  * @param  GPIO_Pin Specifies the port pin connected to corresponding EXTI line.
30 mjames 517
  * @retval None
518
  */
519
__weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
520
{
521
  /* Prevent unused argument(s) compilation warning */
522
  UNUSED(GPIO_Pin);
523
 
524
  /* NOTE : This function Should not be modified, when the callback is needed,
525
            the HAL_GPIO_EXTI_Callback could be implemented in the user file
50 mjames 526
   */
30 mjames 527
}
528
 
529
/**
530
  * @}
531
  */
532
 
533
 
534
/**
535
  * @}
536
  */
537
 
538
#endif /* HAL_GPIO_MODULE_ENABLED */
539
/**
540
  * @}
541
  */
542
 
543
/**
544
  * @}
545
  */
546
 
547
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/