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30 mjames 1
/**
2
  ******************************************************************************
3
  * @file    stm32l1xx_hal_gpio.c
4
  * @author  MCD Application Team
5
  * @brief   GPIO HAL module driver.
50 mjames 6
  *          This file provides firmware functions to manage the following
30 mjames 7
  *          functionalities of the General Purpose Input/Output (GPIO) peripheral:
8
  *           + Initialization and de-initialization functions
9
  *           + IO operation functions
50 mjames 10
  *
30 mjames 11
  @verbatim
12
  ==============================================================================
13
                    ##### GPIO Peripheral features #####
50 mjames 14
  ==============================================================================
15
  [..]
16
  Each port bit of the general-purpose I/O (GPIO) ports can be individually
30 mjames 17
  configured by software in several modes:
50 mjames 18
  (+) Input mode
30 mjames 19
  (+) Analog mode
20
  (+) Output mode
21
  (+) Alternate function mode
22
  (+) External interrupt/event lines
50 mjames 23
 
24
  [..]
25
  During and just after reset, the alternate functions and external interrupt
30 mjames 26
  lines are not active and the I/O ports are configured in input floating mode.
50 mjames 27
 
28
  [..]
29
  All GPIO pins have weak internal pull-up and pull-down resistors, which can be
30 mjames 30
  activated or not.
31
 
32
  [..]
33
  In Output or Alternate mode, each IO can be configured on open-drain or push-pull
34
  type and the IO speed can be selected depending on the VDD value.
50 mjames 35
 
30 mjames 36
  [..]
50 mjames 37
  The microcontroller IO pins are connected to onboard peripherals/modules through a
38
  multiplexer that allows only one peripheral s alternate function (AF) connected
39
  to an IO pin at a time. In this way, there can be no conflict between peripherals
40
  sharing the same IO pin.
41
 
42
  [..]
43
  All ports have external interrupt/event capability. To use external interrupt
44
  lines, the port must be configured in input mode. All available GPIO pins are
30 mjames 45
  connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
50 mjames 46
 
47
  [..]
48
  The external interrupt/event controller consists of up to 28 edge detectors
30 mjames 49
  (depending on products 16 lines are connected to GPIO) for generating event/interrupt
50 mjames 50
  requests (each input line can be independently configured to select the type
51
  (interrupt or event) and the corresponding trigger event (rising or falling or both).
52
  Each line can also be masked independently.
53
 
30 mjames 54
            ##### How to use this driver #####
50 mjames 55
  ==============================================================================
30 mjames 56
  [..]
50 mjames 57
   (#) Enable the GPIO AHB clock using the following function : __GPIOx_CLK_ENABLE().
58
 
30 mjames 59
   (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
60
       (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
50 mjames 61
       (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
30 mjames 62
            structure.
50 mjames 63
       (++) In case of Output or alternate function mode selection: the speed is
64
            configured through "Speed" member from GPIO_InitTypeDef structure,
30 mjames 65
            the speed is configurable: Low, Medium and High.
66
       (++) If alternate mode is selected, the alternate function connected to the IO
67
            is configured through "Alternate" member from GPIO_InitTypeDef structure
50 mjames 68
       (++) Analog mode is required when a pin is to be used as ADC channel
30 mjames 69
            or DAC output.
50 mjames 70
       (++) In case of external interrupt/event selection the "Mode" member from
71
            GPIO_InitTypeDef structure select the type (interrupt or event) and
30 mjames 72
            the corresponding trigger event (rising or falling or both).
50 mjames 73
 
74
   (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
30 mjames 75
       mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
76
       HAL_NVIC_EnableIRQ().
50 mjames 77
 
78
   (#) HAL_GPIO_DeInit allows to set register values to their reset value. It's also
79
       recommended to use it to unconfigure pin which was used as an external interrupt
80
       or in event mode. That's the only way to reset corresponding bit in EXTI & SYSCFG
30 mjames 81
       registers.
50 mjames 82
 
30 mjames 83
   (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
50 mjames 84
 
85
   (#) To set/reset the level of a pin configured in output mode use
30 mjames 86
       HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
50 mjames 87
 
30 mjames 88
   (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
50 mjames 89
 
90
   (#) During and just after reset, the alternate functions are not
30 mjames 91
       active and the GPIO pins are configured in input floating mode (except JTAG
92
       pins).
50 mjames 93
 
94
   (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
95
       (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
30 mjames 96
       priority over the GPIO function.
50 mjames 97
 
98
   (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
99
       general purpose PH0 and PH1, respectively, when the HSE oscillator is off.
30 mjames 100
       The HSE has priority over the GPIO function.
50 mjames 101
 
30 mjames 102
  @endverbatim
103
  ******************************************************************************
104
  * @attention
105
  *
50 mjames 106
  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
107
  * All rights reserved.</center></h2>
30 mjames 108
  *
50 mjames 109
  * This software component is licensed by ST under BSD 3-Clause license,
110
  * the "License"; You may not use this file except in compliance with the
111
  * License. You may obtain a copy of the License at:
112
  *                        opensource.org/licenses/BSD-3-Clause
30 mjames 113
  *
50 mjames 114
  ******************************************************************************
30 mjames 115
  */
116
 
117
/* Includes ------------------------------------------------------------------*/
118
#include "stm32l1xx_hal.h"
119
 
120
/** @addtogroup STM32L1xx_HAL_Driver
121
  * @{
122
  */
123
 
124
/** @addtogroup GPIO
125
  * @brief GPIO HAL module driver
126
  * @{
127
  */
128
 
129
#ifdef HAL_GPIO_MODULE_ENABLED
130
 
131
/* Private typedef -----------------------------------------------------------*/
132
/* Private define ------------------------------------------------------------*/
133
/** @addtogroup GPIO_Private_Constants
134
  * @{
135
  */
50 mjames 136
#define GPIO_MODE             (0x00000003U)
137
#define EXTI_MODE             (0x10000000U)
138
#define GPIO_MODE_IT          (0x00010000U)
139
#define GPIO_MODE_EVT         (0x00020000U)
140
#define RISING_EDGE           (0x00100000U)
141
#define FALLING_EDGE          (0x00200000U)
142
#define GPIO_OUTPUT_TYPE      (0x00000010U)
30 mjames 143
 
50 mjames 144
#define GPIO_NUMBER           (16U)
145
 
30 mjames 146
/**
147
  * @}
148
  */
50 mjames 149
 
30 mjames 150
/* Private macro -------------------------------------------------------------*/
151
/* Private variables ---------------------------------------------------------*/
152
/* Private function prototypes -----------------------------------------------*/
153
/* Exported functions ---------------------------------------------------------*/
154
 
155
/** @addtogroup GPIO_Exported_Functions
156
  * @{
157
  */
158
 
159
/** @addtogroup GPIO_Exported_Functions_Group1
50 mjames 160
 *  @brief    Initialization and Configuration functions
30 mjames 161
 *
50 mjames 162
@verbatim
30 mjames 163
 ===============================================================================
164
              ##### Initialization and Configuration functions #####
165
 ===============================================================================
50 mjames 166
 
30 mjames 167
@endverbatim
168
  * @{
169
  */
170
 
171
/**
172
  * @brief  Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init.
50 mjames 173
  * @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
174
  * @param  GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
30 mjames 175
  *         the configuration information for the specified GPIO peripheral.
176
  * @retval None
177
  */
178
void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
50 mjames 179
{
30 mjames 180
  uint32_t position = 0x00;
181
  uint32_t iocurrent = 0x00;
182
  uint32_t temp = 0x00;
183
 
184
  /* Check the parameters */
185
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
186
  assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
187
  assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
50 mjames 188
  assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
30 mjames 189
 
190
  /* Configure the port pins */
191
  while (((GPIO_Init->Pin) >> position) != 0)
192
  {
193
    /* Get current io position */
50 mjames 194
    iocurrent = (GPIO_Init->Pin) & (1U << position);
195
 
196
    if (iocurrent)
30 mjames 197
    {
198
      /*--------------------- GPIO Mode Configuration ------------------------*/
199
      /* In case of Output or Alternate function mode selection */
200
      if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
201
          (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
202
      {
203
        /* Check the Speed parameter */
204
        assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
205
        /* Configure the IO Speed */
50 mjames 206
        temp = GPIOx->OSPEEDR;
30 mjames 207
        CLEAR_BIT(temp, GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
208
        SET_BIT(temp, GPIO_Init->Speed << (position * 2));
209
        GPIOx->OSPEEDR = temp;
210
 
211
        /* Configure the IO Output Type */
212
        temp = GPIOx->OTYPER;
213
        CLEAR_BIT(temp, GPIO_OTYPER_OT_0 << position) ;
214
        SET_BIT(temp, ((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position);
215
        GPIOx->OTYPER = temp;
216
      }
217
 
218
      /* Activate the Pull-up or Pull down resistor for the current IO */
219
      temp = GPIOx->PUPDR;
220
      CLEAR_BIT(temp, GPIO_PUPDR_PUPDR0 << (position * 2));
221
      SET_BIT(temp, (GPIO_Init->Pull) << (position * 2));
222
      GPIOx->PUPDR = temp;
223
 
50 mjames 224
      /* In case of Alternate function mode selection */
225
      if ((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
226
      {
227
        /* Check the Alternate function parameters */
228
        assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
229
        assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
230
 
231
        /* Configure Alternate function mapped with the current IO */
232
        /* Identify AFRL or AFRH register based on IO position*/
233
        temp = GPIOx->AFR[position >> 3];
234
        CLEAR_BIT(temp, 0xFU << ((uint32_t)(position & 0x07U) * 4));
235
        SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4));
236
        GPIOx->AFR[position >> 3] = temp;
237
      }
238
 
239
      /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
240
      temp = GPIOx->MODER;
241
      CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2));
242
      SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2));
243
      GPIOx->MODER = temp;
244
 
30 mjames 245
      /*--------------------- EXTI Mode Configuration ------------------------*/
246
      /* Configure the External Interrupt or event for the current IO */
50 mjames 247
      if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
30 mjames 248
      {
249
        /* Enable SYSCFG Clock */
250
        __HAL_RCC_SYSCFG_CLK_ENABLE();
50 mjames 251
 
30 mjames 252
        temp = SYSCFG->EXTICR[position >> 2];
50 mjames 253
        CLEAR_BIT(temp, (0x0FU) << (4 * (position & 0x03)));
30 mjames 254
        SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)));
255
        SYSCFG->EXTICR[position >> 2] = temp;
50 mjames 256
 
30 mjames 257
        /* Clear EXTI line configuration */
258
        temp = EXTI->IMR;
259
        CLEAR_BIT(temp, (uint32_t)iocurrent);
50 mjames 260
        if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
30 mjames 261
        {
50 mjames 262
          SET_BIT(temp, iocurrent);
30 mjames 263
        }
264
        EXTI->IMR = temp;
265
 
266
        temp = EXTI->EMR;
50 mjames 267
        CLEAR_BIT(temp, (uint32_t)iocurrent);
268
        if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
30 mjames 269
        {
50 mjames 270
          SET_BIT(temp, iocurrent);
30 mjames 271
        }
272
        EXTI->EMR = temp;
50 mjames 273
 
30 mjames 274
        /* Clear Rising Falling edge configuration */
275
        temp = EXTI->RTSR;
50 mjames 276
        CLEAR_BIT(temp, (uint32_t)iocurrent);
277
        if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
30 mjames 278
        {
50 mjames 279
          SET_BIT(temp, iocurrent);
30 mjames 280
        }
281
        EXTI->RTSR = temp;
282
 
283
        temp = EXTI->FTSR;
50 mjames 284
        CLEAR_BIT(temp, (uint32_t)iocurrent);
285
        if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
30 mjames 286
        {
50 mjames 287
          SET_BIT(temp, iocurrent);
30 mjames 288
        }
289
        EXTI->FTSR = temp;
290
      }
291
    }
50 mjames 292
 
30 mjames 293
    position++;
50 mjames 294
  }
30 mjames 295
}
296
 
297
/**
298
  * @brief  De-initializes the GPIOx peripheral registers to their default reset values.
50 mjames 299
  * @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
300
  * @param  GPIO_Pin specifies the port bit to be written.
30 mjames 301
  *         This parameter can be one of GPIO_PIN_x where x can be (0..15).
302
  * @retval None
303
  */
304
void HAL_GPIO_DeInit(GPIO_TypeDef  *GPIOx, uint32_t GPIO_Pin)
305
{
306
  uint32_t position = 0x00;
307
  uint32_t iocurrent = 0x00;
308
  uint32_t tmp = 0x00;
309
 
310
  /* Check the parameters */
311
  assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
312
  assert_param(IS_GPIO_PIN(GPIO_Pin));
313
 
314
  /* Configure the port pins */
315
  while ((GPIO_Pin >> position) != 0)
316
  {
317
    /* Get current io position */
50 mjames 318
    iocurrent = (GPIO_Pin) & (1U << position);
30 mjames 319
 
320
    if (iocurrent)
321
    {
322
      /*------------------------- EXTI Mode Configuration --------------------*/
323
      /* Clear the External Interrupt or Event for the current IO */
50 mjames 324
 
30 mjames 325
      tmp = SYSCFG->EXTICR[position >> 2];
50 mjames 326
      tmp &= ((0x0FU) << (4 * (position & 0x03)));
327
      if (tmp == (GPIO_GET_INDEX(GPIOx) << (4 * (position & 0x03))))
30 mjames 328
      {
329
        /* Clear EXTI line configuration */
330
        CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent);
331
        CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent);
50 mjames 332
 
30 mjames 333
        /* Clear Rising Falling edge configuration */
334
        CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent);
335
        CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent);
50 mjames 336
 
337
        tmp = (0x0FU) << (4 * (position & 0x03));
338
        CLEAR_BIT(SYSCFG->EXTICR[position >> 2], tmp);
30 mjames 339
      }
50 mjames 340
 
341
      /*------------------------- GPIO Mode Configuration --------------------*/
342
      /* Configure IO Direction in Input Floting Mode */
343
      CLEAR_BIT(GPIOx->MODER, GPIO_MODER_MODER0 << (position * 2));
344
 
345
      /* Configure the default Alternate Function in current IO */
346
      CLEAR_BIT(GPIOx->AFR[position >> 3], 0xFU << ((uint32_t)(position & 0x07U) * 4)) ;
347
      /* Deactivate the Pull-up oand Pull-down resistor for the current IO */
348
      CLEAR_BIT(GPIOx->PUPDR, GPIO_PUPDR_PUPDR0 << (position * 2));
349
 
350
      /* Configure the default value IO Output Type */
351
      CLEAR_BIT(GPIOx->OTYPER, GPIO_OTYPER_OT_0 << position) ;
352
 
353
      /* Configure the default value for IO Speed */
354
      CLEAR_BIT(GPIOx->OSPEEDR, GPIO_OSPEEDER_OSPEEDR0 << (position * 2));
30 mjames 355
    }
50 mjames 356
 
30 mjames 357
    position++;
358
  }
359
}
360
 
361
/**
362
  * @}
363
  */
364
 
365
/** @addtogroup GPIO_Exported_Functions_Group2
366
 *  @brief GPIO Read, Write, Toggle, Lock and EXTI management functions.
367
 *
50 mjames 368
@verbatim
30 mjames 369
 ===============================================================================
370
                       ##### IO operation functions #####
50 mjames 371
 ===============================================================================
30 mjames 372
 
373
@endverbatim
374
  * @{
375
  */
376
 
377
/**
378
  * @brief  Reads the specified input port pin.
50 mjames 379
  * @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
380
  * @param  GPIO_Pin specifies the port bit to read.
30 mjames 381
  *         This parameter can be GPIO_PIN_x where x can be (0..15).
382
  * @retval The input port pin value.
383
  */
50 mjames 384
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
30 mjames 385
{
386
  GPIO_PinState bitstatus;
387
 
388
  /* Check the parameters */
389
  assert_param(IS_GPIO_PIN(GPIO_Pin));
390
 
391
  if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
392
  {
393
    bitstatus = GPIO_PIN_SET;
394
  }
395
  else
396
  {
397
    bitstatus = GPIO_PIN_RESET;
398
  }
399
  return bitstatus;
400
}
401
 
402
/**
403
  * @brief  Sets or clears the selected data port bit.
50 mjames 404
  * @note   This function uses GPIOx_BSRR register to allow atomic read/modify
30 mjames 405
  *         accesses. In this way, there is no risk of an IRQ occurring between
406
  *         the read and the modify access.
50 mjames 407
  * @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
408
  * @param  GPIO_Pin specifies the port bit to be written.
30 mjames 409
  *          This parameter can be one of GPIO_PIN_x where x can be (0..15).
50 mjames 410
  * @param  PinState specifies the value to be written to the selected bit.
30 mjames 411
  *          This parameter can be one of the GPIO_PinState enum values:
412
  *            @arg GPIO_PIN_RESET: to clear the port pin
413
  *            @arg GPIO_PIN_SET: to set the port pin
414
  * @retval None
415
  */
50 mjames 416
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
30 mjames 417
{
418
  /* Check the parameters */
419
  assert_param(IS_GPIO_PIN(GPIO_Pin));
420
  assert_param(IS_GPIO_PIN_ACTION(PinState));
421
 
422
  if (PinState != GPIO_PIN_RESET)
423
  {
424
    GPIOx->BSRR = (uint32_t)GPIO_Pin;
425
  }
426
  else
427
  {
428
    GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ;
429
  }
430
}
50 mjames 431
 
30 mjames 432
/**
433
  * @brief  Toggles the specified GPIO pin
50 mjames 434
  * @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
435
  * @param  GPIO_Pin specifies the pins to be toggled.
30 mjames 436
  * @retval None
437
  */
50 mjames 438
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
30 mjames 439
{
50 mjames 440
  uint32_t odr;
441
 
30 mjames 442
  /* Check the parameters */
443
  assert_param(IS_GPIO_PIN(GPIO_Pin));
444
 
50 mjames 445
  /* get current Ouput Data Register value */
446
  odr = GPIOx->ODR;
447
 
448
  /* Set selected pins that were at low level, and reset ones that were high */
449
  GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
30 mjames 450
}
451
 
452
/**
453
* @brief  Locks GPIO Pins configuration registers.
454
* @note   The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
455
*         GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
456
* @note   The configuration of the locked GPIO pins can no longer be modified
457
*         until the next reset.
458
* @note   Limitation concerning GPIOx_OTYPER: Locking of GPIOx_OTYPER[i] with i = 15..8
459
*         depends from setting of GPIOx_LCKR[i-8] and not from GPIOx_LCKR[i].
460
*         GPIOx_LCKR[i-8] is locking GPIOx_OTYPER[i] together with GPIOx_OTYPER[i-8].
461
*         It is not possible to lock GPIOx_OTYPER[i] with i = 15..8, without locking also
462
*         GPIOx_OTYPER[i-8].
463
*         Workaround: When calling HAL_GPIO_LockPin with GPIO_Pin from GPIO_PIN_8 to GPIO_PIN_15,
50 mjames 464
*         you must call also HAL_GPIO_LockPin with GPIO_Pin - 8.
465
*         (When locking a pin from GPIO_PIN_8 to GPIO_PIN_15, you must lock also the corresponding
30 mjames 466
*         GPIO_PIN_0 to GPIO_PIN_7).
50 mjames 467
* @param  GPIOx where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices
468
* @param  GPIO_Pin Specifies the port bit to be locked.
30 mjames 469
*         This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
470
* @retval None
471
*/
50 mjames 472
HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
30 mjames 473
{
474
  __IO uint32_t tmp = GPIO_LCKR_LCKK;
475
 
476
  /* Check the parameters */
477
  assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx));
478
  assert_param(IS_GPIO_PIN(GPIO_Pin));
479
 
480
  /* Apply lock key write sequence */
481
  SET_BIT(tmp, GPIO_Pin);
482
  /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
483
  GPIOx->LCKR = tmp;
484
  /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
485
  GPIOx->LCKR = GPIO_Pin;
486
  /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
487
  GPIOx->LCKR = tmp;
50 mjames 488
  /* Read LCKK register. This read is mandatory to complete key lock sequence */
30 mjames 489
  tmp = GPIOx->LCKR;
490
 
50 mjames 491
  /* Read again in order to confirm lock is active */
492
  if ((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET)
30 mjames 493
  {
494
    return HAL_OK;
495
  }
496
  else
497
  {
498
    return HAL_ERROR;
499
  }
500
}
501
 
502
/**
503
  * @brief  This function handles EXTI interrupt request.
50 mjames 504
  * @param  GPIO_Pin Specifies the port pin connected to corresponding EXTI line.
30 mjames 505
  * @retval None
506
  */
507
void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
508
{
509
  /* EXTI line interrupt detected */
50 mjames 510
  if (__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)
511
  {
30 mjames 512
    __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
513
    HAL_GPIO_EXTI_Callback(GPIO_Pin);
514
  }
515
}
516
 
517
/**
518
  * @brief  EXTI line detection callbacks.
50 mjames 519
  * @param  GPIO_Pin Specifies the port pin connected to corresponding EXTI line.
30 mjames 520
  * @retval None
521
  */
522
__weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
523
{
524
  /* Prevent unused argument(s) compilation warning */
525
  UNUSED(GPIO_Pin);
526
 
527
  /* NOTE : This function Should not be modified, when the callback is needed,
528
            the HAL_GPIO_EXTI_Callback could be implemented in the user file
50 mjames 529
   */
30 mjames 530
}
531
 
532
/**
533
  * @}
534
  */
535
 
536
 
537
/**
538
  * @}
539
  */
540
 
541
#endif /* HAL_GPIO_MODULE_ENABLED */
542
/**
543
  * @}
544
  */
545
 
546
/**
547
  * @}
548
  */
549
 
550
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/