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| Rev | Author | Line No. | Line |
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| 30 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32l1xx_hal_gpio.c |
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| 4 | * @author MCD Application Team |
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| 5 | * @version V1.2.0 |
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| 6 | * @date 01-July-2016 |
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| 7 | * @brief GPIO HAL module driver. |
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| 8 | * This file provides firmware functions to manage the following |
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| 9 | * functionalities of the General Purpose Input/Output (GPIO) peripheral: |
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| 10 | * + Initialization and de-initialization functions |
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| 11 | * + IO operation functions |
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| 12 | * |
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| 13 | @verbatim |
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| 14 | ============================================================================== |
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| 15 | ##### GPIO Peripheral features ##### |
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| 16 | ============================================================================== |
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| 17 | [..] |
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| 18 | Each port bit of the general-purpose I/O (GPIO) ports can be individually |
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| 19 | configured by software in several modes: |
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| 20 | (+) Input mode |
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| 21 | (+) Analog mode |
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| 22 | (+) Output mode |
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| 23 | (+) Alternate function mode |
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| 24 | (+) External interrupt/event lines |
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| 25 | |||
| 26 | [..] |
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| 27 | During and just after reset, the alternate functions and external interrupt |
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| 28 | lines are not active and the I/O ports are configured in input floating mode. |
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| 29 | |||
| 30 | [..] |
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| 31 | All GPIO pins have weak internal pull-up and pull-down resistors, which can be |
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| 32 | activated or not. |
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| 33 | |||
| 34 | [..] |
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| 35 | In Output or Alternate mode, each IO can be configured on open-drain or push-pull |
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| 36 | type and the IO speed can be selected depending on the VDD value. |
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| 37 | |||
| 38 | [..] |
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| 39 | The microcontroller IO pins are connected to onboard peripherals/modules through a |
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| 40 | multiplexer that allows only one peripheral s alternate function (AF) connected |
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| 41 | to an IO pin at a time. In this way, there can be no conflict between peripherals |
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| 42 | sharing the same IO pin. |
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| 43 | |||
| 44 | [..] |
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| 45 | All ports have external interrupt/event capability. To use external interrupt |
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| 46 | lines, the port must be configured in input mode. All available GPIO pins are |
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| 47 | connected to the 16 external interrupt/event lines from EXTI0 to EXTI15. |
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| 48 | |||
| 49 | [..] |
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| 50 | The external interrupt/event controller consists of up to 28 edge detectors |
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| 51 | (depending on products 16 lines are connected to GPIO) for generating event/interrupt |
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| 52 | requests (each input line can be independently configured to select the type |
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| 53 | (interrupt or event) and the corresponding trigger event (rising or falling or both). |
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| 54 | Each line can also be masked independently. |
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| 55 | |||
| 56 | ##### How to use this driver ##### |
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| 57 | ============================================================================== |
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| 58 | [..] |
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| 59 | (#) Enable the GPIO AHB clock using the following function : __GPIOx_CLK_ENABLE(). |
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| 60 | |||
| 61 | (#) Configure the GPIO pin(s) using HAL_GPIO_Init(). |
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| 62 | (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure |
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| 63 | (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef |
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| 64 | structure. |
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| 65 | (++) In case of Output or alternate function mode selection: the speed is |
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| 66 | configured through "Speed" member from GPIO_InitTypeDef structure, |
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| 67 | the speed is configurable: Low, Medium and High. |
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| 68 | (++) If alternate mode is selected, the alternate function connected to the IO |
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| 69 | is configured through "Alternate" member from GPIO_InitTypeDef structure |
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| 70 | (++) Analog mode is required when a pin is to be used as ADC channel |
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| 71 | or DAC output. |
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| 72 | (++) In case of external interrupt/event selection the "Mode" member from |
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| 73 | GPIO_InitTypeDef structure select the type (interrupt or event) and |
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| 74 | the corresponding trigger event (rising or falling or both). |
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| 75 | |||
| 76 | (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority |
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| 77 | mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using |
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| 78 | HAL_NVIC_EnableIRQ(). |
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| 79 | |||
| 80 | (#) HAL_GPIO_DeInit allows to set register values to their reset value. It's also |
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| 81 | recommended to use it to unconfigure pin which was used as an external interrupt |
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| 82 | or in event mode. That's the only way to reset corresponding bit in EXTI & SYSCFG |
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| 83 | registers. |
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| 84 | |||
| 85 | (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin(). |
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| 86 | |||
| 87 | (#) To set/reset the level of a pin configured in output mode use |
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| 88 | HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). |
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| 89 | |||
| 90 | (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). |
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| 91 | |||
| 92 | (#) During and just after reset, the alternate functions are not |
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| 93 | active and the GPIO pins are configured in input floating mode (except JTAG |
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| 94 | pins). |
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| 95 | |||
| 96 | (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose |
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| 97 | (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has |
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| 98 | priority over the GPIO function. |
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| 99 | |||
| 100 | (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as |
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| 101 | general purpose PH0 and PH1, respectively, when the HSE oscillator is off. |
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| 102 | The HSE has priority over the GPIO function. |
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| 103 | |||
| 104 | @endverbatim |
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| 105 | ****************************************************************************** |
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| 106 | * @attention |
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| 107 | * |
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| 108 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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| 109 | * |
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| 110 | * Redistribution and use in source and binary forms, with or without modification, |
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| 111 | * are permitted provided that the following conditions are met: |
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| 112 | * 1. Redistributions of source code must retain the above copyright notice, |
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| 113 | * this list of conditions and the following disclaimer. |
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| 114 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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| 115 | * this list of conditions and the following disclaimer in the documentation |
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| 116 | * and/or other materials provided with the distribution. |
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| 117 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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| 118 | * may be used to endorse or promote products derived from this software |
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| 119 | * without specific prior written permission. |
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| 120 | * |
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| 121 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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| 122 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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| 123 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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| 124 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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| 125 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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| 126 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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| 127 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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| 128 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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| 129 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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| 130 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 131 | * |
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| 132 | ****************************************************************************** |
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| 133 | */ |
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| 134 | |||
| 135 | /* Includes ------------------------------------------------------------------*/ |
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| 136 | #include "stm32l1xx_hal.h" |
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| 137 | |||
| 138 | /** @addtogroup STM32L1xx_HAL_Driver |
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| 139 | * @{ |
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| 140 | */ |
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| 141 | |||
| 142 | /** @addtogroup GPIO |
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| 143 | * @brief GPIO HAL module driver |
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| 144 | * @{ |
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| 145 | */ |
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| 146 | |||
| 147 | #ifdef HAL_GPIO_MODULE_ENABLED |
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| 148 | |||
| 149 | /* Private typedef -----------------------------------------------------------*/ |
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| 150 | /* Private define ------------------------------------------------------------*/ |
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| 151 | /** @addtogroup GPIO_Private_Constants |
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| 152 | * @{ |
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| 153 | */ |
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| 154 | #define GPIO_MODE ((uint32_t)0x00000003) |
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| 155 | #define EXTI_MODE ((uint32_t)0x10000000) |
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| 156 | #define GPIO_MODE_IT ((uint32_t)0x00010000) |
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| 157 | #define GPIO_MODE_EVT ((uint32_t)0x00020000) |
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| 158 | #define RISING_EDGE ((uint32_t)0x00100000) |
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| 159 | #define FALLING_EDGE ((uint32_t)0x00200000) |
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| 160 | #define GPIO_OUTPUT_TYPE ((uint32_t)0x00000010) |
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| 161 | |||
| 162 | #define GPIO_NUMBER ((uint32_t)16) |
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| 163 | |||
| 164 | /** |
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| 165 | * @} |
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| 166 | */ |
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| 167 | |||
| 168 | /* Private macro -------------------------------------------------------------*/ |
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| 169 | /* Private variables ---------------------------------------------------------*/ |
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| 170 | /* Private function prototypes -----------------------------------------------*/ |
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| 171 | /* Exported functions ---------------------------------------------------------*/ |
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| 172 | |||
| 173 | /** @addtogroup GPIO_Exported_Functions |
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| 174 | * @{ |
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| 175 | */ |
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| 176 | |||
| 177 | /** @addtogroup GPIO_Exported_Functions_Group1 |
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| 178 | * @brief Initialization and Configuration functions |
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| 179 | * |
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| 180 | @verbatim |
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| 181 | =============================================================================== |
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| 182 | ##### Initialization and Configuration functions ##### |
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| 183 | =============================================================================== |
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| 184 | |||
| 185 | @endverbatim |
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| 186 | * @{ |
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| 187 | */ |
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| 188 | |||
| 189 | /** |
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| 190 | * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init. |
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| 191 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
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| 192 | * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains |
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| 193 | * the configuration information for the specified GPIO peripheral. |
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| 194 | * @retval None |
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| 195 | */ |
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| 196 | void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) |
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| 197 | { |
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| 198 | uint32_t position = 0x00; |
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| 199 | uint32_t iocurrent = 0x00; |
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| 200 | uint32_t temp = 0x00; |
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| 201 | |||
| 202 | /* Check the parameters */ |
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| 203 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); |
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| 204 | assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); |
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| 205 | assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); |
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| 206 | assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); |
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| 207 | |||
| 208 | /* Configure the port pins */ |
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| 209 | while (((GPIO_Init->Pin) >> position) != 0) |
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| 210 | { |
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| 211 | /* Get current io position */ |
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| 212 | iocurrent = (GPIO_Init->Pin) & ((uint32_t)1 << position); |
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| 213 | |||
| 214 | if(iocurrent) |
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| 215 | { |
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| 216 | /*--------------------- GPIO Mode Configuration ------------------------*/ |
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| 217 | /* In case of Alternate function mode selection */ |
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| 218 | if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) |
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| 219 | { |
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| 220 | /* Check the Alternate function parameters */ |
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| 221 | assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); |
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| 222 | assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); |
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| 223 | |||
| 224 | /* Configure Alternate function mapped with the current IO */ |
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| 225 | /* Identify AFRL or AFRH register based on IO position*/ |
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| 226 | temp = GPIOx->AFR[position >> 3]; |
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| 227 | CLEAR_BIT(temp, (uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; |
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| 228 | SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4)); |
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| 229 | GPIOx->AFR[position >> 3] = temp; |
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| 230 | } |
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| 231 | |||
| 232 | /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ |
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| 233 | temp = GPIOx->MODER; |
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| 234 | CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2)); |
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| 235 | SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2)); |
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| 236 | GPIOx->MODER = temp; |
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| 237 | |||
| 238 | /* In case of Output or Alternate function mode selection */ |
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| 239 | if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || |
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| 240 | (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) |
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| 241 | { |
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| 242 | /* Check the Speed parameter */ |
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| 243 | assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); |
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| 244 | /* Configure the IO Speed */ |
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| 245 | temp = GPIOx->OSPEEDR; |
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| 246 | CLEAR_BIT(temp, GPIO_OSPEEDER_OSPEEDR0 << (position * 2)); |
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| 247 | SET_BIT(temp, GPIO_Init->Speed << (position * 2)); |
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| 248 | GPIOx->OSPEEDR = temp; |
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| 249 | |||
| 250 | /* Configure the IO Output Type */ |
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| 251 | temp = GPIOx->OTYPER; |
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| 252 | CLEAR_BIT(temp, GPIO_OTYPER_OT_0 << position) ; |
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| 253 | SET_BIT(temp, ((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4) << position); |
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| 254 | GPIOx->OTYPER = temp; |
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| 255 | } |
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| 256 | |||
| 257 | /* Activate the Pull-up or Pull down resistor for the current IO */ |
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| 258 | temp = GPIOx->PUPDR; |
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| 259 | CLEAR_BIT(temp, GPIO_PUPDR_PUPDR0 << (position * 2)); |
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| 260 | SET_BIT(temp, (GPIO_Init->Pull) << (position * 2)); |
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| 261 | GPIOx->PUPDR = temp; |
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| 262 | |||
| 263 | /*--------------------- EXTI Mode Configuration ------------------------*/ |
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| 264 | /* Configure the External Interrupt or event for the current IO */ |
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| 265 | if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) |
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| 266 | { |
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| 267 | /* Enable SYSCFG Clock */ |
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| 268 | __HAL_RCC_SYSCFG_CLK_ENABLE(); |
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| 269 | |||
| 270 | temp = SYSCFG->EXTICR[position >> 2]; |
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| 271 | CLEAR_BIT(temp, ((uint32_t)0x0F) << (4 * (position & 0x03))); |
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| 272 | SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))); |
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| 273 | SYSCFG->EXTICR[position >> 2] = temp; |
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| 274 | |||
| 275 | /* Clear EXTI line configuration */ |
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| 276 | temp = EXTI->IMR; |
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| 277 | CLEAR_BIT(temp, (uint32_t)iocurrent); |
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| 278 | if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) |
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| 279 | { |
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| 280 | SET_BIT(temp, iocurrent); |
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| 281 | } |
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| 282 | EXTI->IMR = temp; |
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| 283 | |||
| 284 | temp = EXTI->EMR; |
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| 285 | CLEAR_BIT(temp, (uint32_t)iocurrent); |
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| 286 | if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) |
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| 287 | { |
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| 288 | SET_BIT(temp, iocurrent); |
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| 289 | } |
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| 290 | EXTI->EMR = temp; |
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| 291 | |||
| 292 | /* Clear Rising Falling edge configuration */ |
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| 293 | temp = EXTI->RTSR; |
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| 294 | CLEAR_BIT(temp, (uint32_t)iocurrent); |
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| 295 | if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) |
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| 296 | { |
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| 297 | SET_BIT(temp, iocurrent); |
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| 298 | } |
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| 299 | EXTI->RTSR = temp; |
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| 300 | |||
| 301 | temp = EXTI->FTSR; |
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| 302 | CLEAR_BIT(temp, (uint32_t)iocurrent); |
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| 303 | if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) |
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| 304 | { |
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| 305 | SET_BIT(temp, iocurrent); |
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| 306 | } |
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| 307 | EXTI->FTSR = temp; |
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| 308 | } |
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| 309 | } |
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| 310 | |||
| 311 | position++; |
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| 312 | } |
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| 313 | } |
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| 314 | |||
| 315 | /** |
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| 316 | * @brief De-initializes the GPIOx peripheral registers to their default reset values. |
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| 317 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
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| 318 | * @param GPIO_Pin: specifies the port bit to be written. |
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| 319 | * This parameter can be one of GPIO_PIN_x where x can be (0..15). |
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| 320 | * @retval None |
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| 321 | */ |
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| 322 | void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) |
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| 323 | { |
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| 324 | uint32_t position = 0x00; |
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| 325 | uint32_t iocurrent = 0x00; |
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| 326 | uint32_t tmp = 0x00; |
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| 327 | |||
| 328 | /* Check the parameters */ |
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| 329 | assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); |
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| 330 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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| 331 | |||
| 332 | /* Configure the port pins */ |
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| 333 | while ((GPIO_Pin >> position) != 0) |
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| 334 | { |
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| 335 | /* Get current io position */ |
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| 336 | iocurrent = (GPIO_Pin) & ((uint32_t)1 << position); |
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| 337 | |||
| 338 | if (iocurrent) |
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| 339 | { |
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| 340 | /*------------------------- GPIO Mode Configuration --------------------*/ |
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| 341 | /* Configure IO Direction in Input Floting Mode */ |
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| 342 | CLEAR_BIT(GPIOx->MODER, GPIO_MODER_MODER0 << (position * 2)); |
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| 343 | |||
| 344 | /* Configure the default Alternate Function in current IO */ |
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| 345 | CLEAR_BIT(GPIOx->AFR[position >> 3], (uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; |
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| 346 | |||
| 347 | /* Configure the default value for IO Speed */ |
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| 348 | CLEAR_BIT(GPIOx->OSPEEDR, GPIO_OSPEEDER_OSPEEDR0 << (position * 2)); |
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| 349 | |||
| 350 | /* Configure the default value IO Output Type */ |
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| 351 | CLEAR_BIT(GPIOx->OTYPER, GPIO_OTYPER_OT_0 << position) ; |
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| 352 | |||
| 353 | /* Deactivate the Pull-up oand Pull-down resistor for the current IO */ |
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| 354 | CLEAR_BIT(GPIOx->PUPDR, GPIO_PUPDR_PUPDR0 << (position * 2)); |
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| 355 | |||
| 356 | /*------------------------- EXTI Mode Configuration --------------------*/ |
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| 357 | /* Clear the External Interrupt or Event for the current IO */ |
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| 358 | |||
| 359 | tmp = SYSCFG->EXTICR[position >> 2]; |
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| 360 | tmp &= (((uint32_t)0x0F) << (4 * (position & 0x03))); |
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| 361 | if(tmp == (GPIO_GET_INDEX(GPIOx) << (4 * (position & 0x03)))) |
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| 362 | { |
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| 363 | tmp = ((uint32_t)0x0F) << (4 * (position & 0x03)); |
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| 364 | CLEAR_BIT(SYSCFG->EXTICR[position >> 2], tmp); |
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| 365 | |||
| 366 | /* Clear EXTI line configuration */ |
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| 367 | CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent); |
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| 368 | CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent); |
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| 369 | |||
| 370 | /* Clear Rising Falling edge configuration */ |
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| 371 | CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent); |
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| 372 | CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent); |
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| 373 | } |
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| 374 | } |
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| 375 | |||
| 376 | position++; |
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| 377 | } |
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| 378 | } |
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| 379 | |||
| 380 | /** |
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| 381 | * @} |
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| 382 | */ |
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| 383 | |||
| 384 | /** @addtogroup GPIO_Exported_Functions_Group2 |
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| 385 | * @brief GPIO Read, Write, Toggle, Lock and EXTI management functions. |
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| 386 | * |
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| 387 | @verbatim |
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| 388 | =============================================================================== |
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| 389 | ##### IO operation functions ##### |
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| 390 | =============================================================================== |
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| 391 | |||
| 392 | @endverbatim |
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| 393 | * @{ |
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| 394 | */ |
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| 395 | |||
| 396 | /** |
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| 397 | * @brief Reads the specified input port pin. |
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| 398 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
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| 399 | * @param GPIO_Pin: specifies the port bit to read. |
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| 400 | * This parameter can be GPIO_PIN_x where x can be (0..15). |
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| 401 | * @retval The input port pin value. |
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| 402 | */ |
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| 403 | GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
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| 404 | { |
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| 405 | GPIO_PinState bitstatus; |
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| 406 | |||
| 407 | /* Check the parameters */ |
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| 408 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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| 409 | |||
| 410 | if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) |
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| 411 | { |
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| 412 | bitstatus = GPIO_PIN_SET; |
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| 413 | } |
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| 414 | else |
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| 415 | { |
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| 416 | bitstatus = GPIO_PIN_RESET; |
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| 417 | } |
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| 418 | return bitstatus; |
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| 419 | } |
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| 420 | |||
| 421 | /** |
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| 422 | * @brief Sets or clears the selected data port bit. |
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| 423 | * @note This function uses GPIOx_BSRR register to allow atomic read/modify |
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| 424 | * accesses. In this way, there is no risk of an IRQ occurring between |
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| 425 | * the read and the modify access. |
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| 426 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
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| 427 | * @param GPIO_Pin: specifies the port bit to be written. |
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| 428 | * This parameter can be one of GPIO_PIN_x where x can be (0..15). |
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| 429 | * @param PinState: specifies the value to be written to the selected bit. |
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| 430 | * This parameter can be one of the GPIO_PinState enum values: |
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| 431 | * @arg GPIO_PIN_RESET: to clear the port pin |
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| 432 | * @arg GPIO_PIN_SET: to set the port pin |
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| 433 | * @retval None |
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| 434 | */ |
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| 435 | void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) |
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| 436 | { |
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| 437 | /* Check the parameters */ |
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| 438 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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| 439 | assert_param(IS_GPIO_PIN_ACTION(PinState)); |
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| 440 | |||
| 441 | if (PinState != GPIO_PIN_RESET) |
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| 442 | { |
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| 443 | GPIOx->BSRR = (uint32_t)GPIO_Pin; |
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| 444 | } |
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| 445 | else |
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| 446 | { |
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| 447 | GPIOx->BSRR = (uint32_t)GPIO_Pin << 16 ; |
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| 448 | } |
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| 449 | } |
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| 450 | |||
| 451 | /** |
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| 452 | * @brief Toggles the specified GPIO pin |
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| 453 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
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| 454 | * @param GPIO_Pin: specifies the pins to be toggled. |
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| 455 | * @retval None |
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| 456 | */ |
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| 457 | void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
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| 458 | { |
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| 459 | /* Check the parameters */ |
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| 460 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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| 461 | |||
| 462 | GPIOx->ODR ^= GPIO_Pin; |
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| 463 | } |
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| 464 | |||
| 465 | /** |
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| 466 | * @brief Locks GPIO Pins configuration registers. |
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| 467 | * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, |
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| 468 | * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. |
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| 469 | * @note The configuration of the locked GPIO pins can no longer be modified |
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| 470 | * until the next reset. |
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| 471 | * @note Limitation concerning GPIOx_OTYPER: Locking of GPIOx_OTYPER[i] with i = 15..8 |
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| 472 | * depends from setting of GPIOx_LCKR[i-8] and not from GPIOx_LCKR[i]. |
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| 473 | * GPIOx_LCKR[i-8] is locking GPIOx_OTYPER[i] together with GPIOx_OTYPER[i-8]. |
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| 474 | * It is not possible to lock GPIOx_OTYPER[i] with i = 15..8, without locking also |
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| 475 | * GPIOx_OTYPER[i-8]. |
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| 476 | * Workaround: When calling HAL_GPIO_LockPin with GPIO_Pin from GPIO_PIN_8 to GPIO_PIN_15, |
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| 477 | * you must call also HAL_GPIO_LockPin with GPIO_Pin - 8. |
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| 478 | * (When locking a pin from GPIO_PIN_8 to GPIO_PIN_15, you must lock also the corresponding |
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| 479 | * GPIO_PIN_0 to GPIO_PIN_7). |
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| 480 | * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral for STM32L1XX family devices |
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| 481 | * @param GPIO_Pin: Specifies the port bit to be locked. |
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| 482 | * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). |
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| 483 | * @retval None |
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| 484 | */ |
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| 485 | HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
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| 486 | { |
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| 487 | __IO uint32_t tmp = GPIO_LCKR_LCKK; |
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| 488 | |||
| 489 | /* Check the parameters */ |
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| 490 | assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx)); |
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| 491 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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| 492 | |||
| 493 | /* Apply lock key write sequence */ |
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| 494 | SET_BIT(tmp, GPIO_Pin); |
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| 495 | /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ |
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| 496 | GPIOx->LCKR = tmp; |
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| 497 | /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */ |
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| 498 | GPIOx->LCKR = GPIO_Pin; |
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| 499 | /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ |
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| 500 | GPIOx->LCKR = tmp; |
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| 501 | /* Read LCKK bit*/ |
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| 502 | tmp = GPIOx->LCKR; |
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| 503 | |||
| 504 | if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET) |
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| 505 | { |
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| 506 | return HAL_OK; |
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| 507 | } |
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| 508 | else |
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| 509 | { |
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| 510 | return HAL_ERROR; |
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| 511 | } |
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| 512 | } |
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| 513 | |||
| 514 | /** |
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| 515 | * @brief This function handles EXTI interrupt request. |
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| 516 | * @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line. |
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| 517 | * @retval None |
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| 518 | */ |
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| 519 | void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) |
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| 520 | { |
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| 521 | /* EXTI line interrupt detected */ |
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| 522 | if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET) |
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| 523 | { |
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| 524 | __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); |
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| 525 | HAL_GPIO_EXTI_Callback(GPIO_Pin); |
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| 526 | } |
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| 527 | } |
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| 528 | |||
| 529 | /** |
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| 530 | * @brief EXTI line detection callbacks. |
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| 531 | * @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line. |
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| 532 | * @retval None |
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| 533 | */ |
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| 534 | __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) |
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| 535 | { |
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| 536 | /* Prevent unused argument(s) compilation warning */ |
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| 537 | UNUSED(GPIO_Pin); |
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| 538 | |||
| 539 | /* NOTE : This function Should not be modified, when the callback is needed, |
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| 540 | the HAL_GPIO_EXTI_Callback could be implemented in the user file |
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| 541 | */ |
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| 542 | } |
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| 543 | |||
| 544 | /** |
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| 545 | * @} |
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| 546 | */ |
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| 547 | |||
| 548 | |||
| 549 | /** |
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| 550 | * @} |
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| 551 | */ |
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| 552 | |||
| 553 | #endif /* HAL_GPIO_MODULE_ENABLED */ |
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| 554 | /** |
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| 555 | * @} |
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| 556 | */ |
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| 557 | |||
| 558 | /** |
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| 559 | * @} |
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| 560 | */ |
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| 561 | |||
| 562 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |