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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 77 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32l1xx_hal_flash_ramfunc.c |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief FLASH RAMFUNC driver. |
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| 6 | * This file provides a Flash firmware functions which should be |
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| 7 | * executed from internal SRAM |
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| 8 | * |
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| 9 | * @verbatim |
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| 10 | |||
| 11 | *** ARM Compiler *** |
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| 12 | -------------------- |
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| 13 | [..] RAM functions are defined using the toolchain options. |
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| 14 | Functions that are be executed in RAM should reside in a separate |
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| 15 | source module. Using the 'Options for File' dialog you can simply change |
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| 16 | the 'Code / Const' area of a module to a memory space in physical RAM. |
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| 17 | Available memory areas are declared in the 'Target' tab of the |
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| 18 | Options for Target' dialog. |
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| 19 | |||
| 20 | *** ICCARM Compiler *** |
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| 21 | ----------------------- |
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| 22 | [..] RAM functions are defined using a specific toolchain keyword "__ramfunc". |
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| 23 | |||
| 24 | *** GNU Compiler *** |
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| 25 | -------------------- |
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| 26 | [..] RAM functions are defined using a specific toolchain attribute |
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| 27 | "__attribute__((section(".RamFunc")))". |
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| 28 | |||
| 29 | @endverbatim |
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| 30 | ****************************************************************************** |
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| 31 | * @attention |
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| 32 | * |
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| 33 | * Copyright (c) 2017 STMicroelectronics. |
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| 34 | * All rights reserved. |
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| 35 | * |
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| 36 | * This software is licensed under terms that can be found in the LICENSE file in |
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| 37 | * the root directory of this software component. |
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| 38 | * If no LICENSE file comes with this software, it is provided AS-IS. |
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| 39 | ****************************************************************************** |
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| 40 | */ |
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| 41 | |||
| 42 | /* Includes ------------------------------------------------------------------*/ |
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| 43 | #include "stm32l1xx_hal.h" |
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| 44 | |||
| 45 | /** @addtogroup STM32L1xx_HAL_Driver |
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| 46 | * @{ |
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| 47 | */ |
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| 48 | |||
| 49 | #ifdef HAL_FLASH_MODULE_ENABLED |
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| 50 | |||
| 51 | /** @addtogroup FLASH |
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| 52 | * @{ |
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| 53 | */ |
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| 54 | /** @addtogroup FLASH_Private_Variables |
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| 55 | * @{ |
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| 56 | */ |
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| 57 | extern FLASH_ProcessTypeDef pFlash; |
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| 58 | /** |
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| 59 | * @} |
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| 60 | */ |
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| 61 | |||
| 62 | /** |
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| 63 | * @} |
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| 64 | */ |
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| 65 | |||
| 66 | /** @defgroup FLASH_RAMFUNC FLASH_RAMFUNC |
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| 67 | * @brief FLASH functions executed from RAM |
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| 68 | * @{ |
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| 69 | */ |
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| 70 | |||
| 71 | |||
| 72 | /* Private typedef -----------------------------------------------------------*/ |
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| 73 | /* Private define ------------------------------------------------------------*/ |
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| 74 | /* Private macro -------------------------------------------------------------*/ |
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| 75 | /* Private variables ---------------------------------------------------------*/ |
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| 76 | /* Private function prototypes -----------------------------------------------*/ |
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| 77 | /** @defgroup FLASH_RAMFUNC_Private_Functions FLASH RAM Private Functions |
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| 78 | * @{ |
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| 79 | */ |
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| 80 | |||
| 81 | static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_WaitForLastOperation(uint32_t Timeout); |
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| 82 | static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_SetErrorCode(void); |
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| 83 | |||
| 84 | /** |
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| 85 | * @} |
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| 86 | */ |
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| 87 | |||
| 88 | /* Private functions ---------------------------------------------------------*/ |
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| 89 | |||
| 90 | /** @defgroup FLASH_RAMFUNC_Exported_Functions FLASH RAM Exported Functions |
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| 91 | * |
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| 92 | @verbatim |
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| 93 | =============================================================================== |
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| 94 | ##### ramfunc functions ##### |
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| 95 | =============================================================================== |
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| 96 | [..] |
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| 97 | This subsection provides a set of functions that should be executed from RAM |
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| 98 | transfers. |
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| 99 | |||
| 100 | @endverbatim |
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| 101 | * @{ |
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| 102 | */ |
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| 103 | |||
| 104 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group1 Peripheral features functions |
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| 105 | * @{ |
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| 106 | */ |
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| 107 | |||
| 108 | /** |
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| 109 | * @brief Enable the power down mode during RUN mode. |
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| 110 | * @note This function can be used only when the user code is running from Internal SRAM. |
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| 111 | * @retval HAL status |
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| 112 | */ |
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| 113 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EnableRunPowerDown(void) |
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| 114 | { |
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| 115 | /* Enable the Power Down in Run mode*/ |
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| 116 | __HAL_FLASH_POWER_DOWN_ENABLE(); |
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| 117 | |||
| 118 | return HAL_OK; |
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| 119 | } |
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| 120 | |||
| 121 | /** |
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| 122 | * @brief Disable the power down mode during RUN mode. |
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| 123 | * @note This function can be used only when the user code is running from Internal SRAM. |
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| 124 | * @retval HAL status |
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| 125 | */ |
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| 126 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DisableRunPowerDown(void) |
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| 127 | { |
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| 128 | /* Disable the Power Down in Run mode*/ |
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| 129 | __HAL_FLASH_POWER_DOWN_DISABLE(); |
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| 130 | |||
| 131 | return HAL_OK; |
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| 132 | } |
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| 133 | |||
| 134 | /** |
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| 135 | * @} |
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| 136 | */ |
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| 137 | |||
| 138 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group2 Programming and erasing operation functions |
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| 139 | * |
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| 140 | @verbatim |
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| 141 | @endverbatim |
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| 142 | * @{ |
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| 143 | */ |
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| 144 | |||
| 145 | #if defined(FLASH_PECR_PARALLBANK) |
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| 146 | /** |
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| 147 | * @brief Erases a specified 2 pages in program memory in parallel. |
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| 148 | * @note This function can be used only for STM32L151xD, STM32L152xD), STM32L162xD and Cat5 devices. |
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| 149 | * To correctly run this function, the @ref HAL_FLASH_Unlock() function |
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| 150 | * must be called before. |
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| 151 | * Call the @ref HAL_FLASH_Lock() to disable the flash memory access |
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| 152 | * (recommended to protect the FLASH memory against possible unwanted operation). |
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| 153 | * @param Page_Address1: The page address in program memory to be erased in |
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| 154 | * the first Bank (BANK1). This parameter should be between FLASH_BASE |
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| 155 | * and FLASH_BANK1_END. |
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| 156 | * @param Page_Address2: The page address in program memory to be erased in |
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| 157 | * the second Bank (BANK2). This parameter should be between FLASH_BANK2_BASE |
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| 158 | * and FLASH_BANK2_END. |
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| 159 | * @note A Page is erased in the Program memory only if the address to load |
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| 160 | * is the start address of a page (multiple of @ref FLASH_PAGE_SIZE bytes). |
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| 161 | * @retval HAL status |
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| 162 | */ |
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| 163 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_EraseParallelPage(uint32_t Page_Address1, uint32_t Page_Address2) |
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| 164 | { |
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| 165 | HAL_StatusTypeDef status = HAL_OK; |
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| 166 | |||
| 167 | /* Wait for last operation to be completed */ |
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| 168 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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| 169 | |||
| 170 | if(status == HAL_OK) |
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| 171 | { |
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| 172 | /* Proceed to erase the page */ |
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| 173 | SET_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); |
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| 174 | SET_BIT(FLASH->PECR, FLASH_PECR_ERASE); |
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| 175 | SET_BIT(FLASH->PECR, FLASH_PECR_PROG); |
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| 176 | |||
| 177 | /* Write 00000000h to the first word of the first program page to erase */ |
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| 178 | *(__IO uint32_t *)Page_Address1 = 0x00000000U; |
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| 179 | /* Write 00000000h to the first word of the second program page to erase */ |
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| 180 | *(__IO uint32_t *)Page_Address2 = 0x00000000U; |
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| 181 | |||
| 182 | /* Wait for last operation to be completed */ |
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| 183 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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| 184 | |||
| 185 | /* If the erase operation is completed, disable the ERASE, PROG and PARALLBANK bits */ |
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| 186 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); |
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| 187 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE); |
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| 188 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); |
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| 189 | } |
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| 190 | /* Return the Erase Status */ |
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| 191 | return status; |
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| 192 | } |
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| 193 | |||
| 194 | /** |
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| 195 | * @brief Program 2 half pages in program memory in parallel (half page size is 32 Words). |
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| 196 | * @note This function can be used only for STM32L151xD, STM32L152xD), STM32L162xD and Cat5 devices. |
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| 197 | * @param Address1: specifies the first address to be written in the first bank |
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| 198 | * (BANK1). This parameter should be between FLASH_BASE and (FLASH_BANK1_END - FLASH_PAGE_SIZE). |
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| 199 | * @param pBuffer1: pointer to the buffer containing the data to be written |
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| 200 | * to the first half page in the first bank. |
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| 201 | * @param Address2: specifies the second address to be written in the second bank |
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| 202 | * (BANK2). This parameter should be between FLASH_BANK2_BASE and (FLASH_BANK2_END - FLASH_PAGE_SIZE). |
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| 203 | * @param pBuffer2: pointer to the buffer containing the data to be written |
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| 204 | * to the second half page in the second bank. |
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| 205 | * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function |
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| 206 | * must be called before. |
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| 207 | * Call the @ref HAL_FLASH_Lock() to disable the flash memory access |
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| 208 | * (recommended to protect the FLASH memory against possible unwanted operation). |
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| 209 | * @note Half page write is possible only from SRAM. |
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| 210 | * @note If there are more than 32 words to write, after 32 words another |
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| 211 | * Half Page programming operation starts and has to be finished. |
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| 212 | * @note A half page is written to the program memory only if the first |
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| 213 | * address to load is the start address of a half page (multiple of 128 |
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| 214 | * bytes) and the 31 remaining words to load are in the same half page. |
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| 215 | * @note During the Program memory half page write all read operations are |
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| 216 | * forbidden (this includes DMA read operations and debugger read |
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| 217 | * operations such as breakpoints, periodic updates, etc.). |
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| 218 | * @note If a PGAERR is set during a Program memory half page write, the |
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| 219 | * complete write operation is aborted. Software should then reset the |
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| 220 | * FPRG and PROG/DATA bits and restart the write operation from the |
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| 221 | * beginning. |
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| 222 | * @retval HAL status |
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| 223 | */ |
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| 224 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_ProgramParallelHalfPage(uint32_t Address1, uint32_t* pBuffer1, uint32_t Address2, uint32_t* pBuffer2) |
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| 225 | { |
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| 226 | uint32_t primask_bit; |
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| 227 | uint32_t count = 0U; |
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| 228 | HAL_StatusTypeDef status = HAL_OK; |
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| 229 | |||
| 230 | /* Wait for last operation to be completed */ |
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| 231 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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| 232 | |||
| 233 | if(status == HAL_OK) |
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| 234 | { |
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| 235 | /* Disable all IRQs */ |
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| 236 | primask_bit = __get_PRIMASK(); |
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| 237 | __disable_irq(); |
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| 238 | |||
| 239 | /* Proceed to program the new half page */ |
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| 240 | SET_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); |
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| 241 | SET_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
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| 242 | SET_BIT(FLASH->PECR, FLASH_PECR_PROG); |
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| 243 | |||
| 244 | /* Write the first half page directly with 32 different words */ |
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| 245 | while(count < 32U) |
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| 246 | { |
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| 247 | *(__IO uint32_t*) ((uint32_t)(Address1 + (4 * count))) = *pBuffer1; |
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| 248 | pBuffer1++; |
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| 249 | count ++; |
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| 250 | } |
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| 251 | |||
| 252 | /* Write the second half page directly with 32 different words */ |
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| 253 | count = 0U; |
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| 254 | while(count < 32U) |
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| 255 | { |
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| 256 | *(__IO uint32_t*) ((uint32_t)(Address2 + (4 * count))) = *pBuffer2; |
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| 257 | pBuffer2++; |
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| 258 | count ++; |
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| 259 | } |
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| 260 | |||
| 261 | /* Wait for last operation to be completed */ |
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| 262 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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| 263 | |||
| 264 | /* if the write operation is completed, disable the PROG, FPRG and PARALLBANK bits */ |
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| 265 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); |
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| 266 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
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| 267 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PARALLBANK); |
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| 268 | |||
| 269 | /* Enable IRQs */ |
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| 270 | __set_PRIMASK(primask_bit); |
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| 271 | } |
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| 272 | |||
| 273 | /* Return the Write Status */ |
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| 274 | return status; |
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| 275 | } |
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| 276 | #endif /* FLASH_PECR_PARALLBANK */ |
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| 277 | |||
| 278 | /** |
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| 279 | * @brief Program a half page in program memory. |
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| 280 | * @param Address specifies the address to be written. |
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| 281 | * @param pBuffer pointer to the buffer containing the data to be written to |
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| 282 | * the half page. |
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| 283 | * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function |
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| 284 | * must be called before. |
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| 285 | * Call the @ref HAL_FLASH_Lock() to disable the flash memory access |
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| 286 | * (recommended to protect the FLASH memory against possible unwanted operation) |
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| 287 | * @note Half page write is possible only from SRAM. |
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| 288 | * @note If there are more than 32 words to write, after 32 words another |
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| 289 | * Half Page programming operation starts and has to be finished. |
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| 290 | * @note A half page is written to the program memory only if the first |
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| 291 | * address to load is the start address of a half page (multiple of 128 |
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| 292 | * bytes) and the 31 remaining words to load are in the same half page. |
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| 293 | * @note During the Program memory half page write all read operations are |
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| 294 | * forbidden (this includes DMA read operations and debugger read |
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| 295 | * operations such as breakpoints, periodic updates, etc.). |
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| 296 | * @note If a PGAERR is set during a Program memory half page write, the |
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| 297 | * complete write operation is aborted. Software should then reset the |
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| 298 | * FPRG and PROG/DATA bits and restart the write operation from the |
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| 299 | * beginning. |
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| 300 | * @retval HAL status |
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| 301 | */ |
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| 302 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_HalfPageProgram(uint32_t Address, uint32_t* pBuffer) |
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| 303 | { |
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| 304 | uint32_t primask_bit; |
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| 305 | uint32_t count = 0U; |
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| 306 | HAL_StatusTypeDef status = HAL_OK; |
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| 307 | |||
| 308 | /* Wait for last operation to be completed */ |
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| 309 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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| 310 | |||
| 311 | if(status == HAL_OK) |
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| 312 | { |
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| 313 | /* Disable all IRQs */ |
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| 314 | primask_bit = __get_PRIMASK(); |
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| 315 | __disable_irq(); |
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| 316 | |||
| 317 | /* Proceed to program the new half page */ |
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| 318 | SET_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
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| 319 | SET_BIT(FLASH->PECR, FLASH_PECR_PROG); |
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| 320 | |||
| 321 | /* Write one half page directly with 32 different words */ |
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| 322 | while(count < 32U) |
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| 323 | { |
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| 324 | *(__IO uint32_t*) ((uint32_t)(Address + (4 * count))) = *pBuffer; |
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| 325 | pBuffer++; |
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| 326 | count ++; |
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| 327 | } |
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| 328 | |||
| 329 | /* Wait for last operation to be completed */ |
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| 330 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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| 331 | |||
| 332 | /* If the write operation is completed, disable the PROG and FPRG bits */ |
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| 333 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_PROG); |
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| 334 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
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| 335 | |||
| 336 | /* Enable IRQs */ |
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| 337 | __set_PRIMASK(primask_bit); |
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| 338 | } |
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| 339 | |||
| 340 | /* Return the Write Status */ |
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| 341 | return status; |
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| 342 | } |
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| 343 | |||
| 344 | /** |
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| 345 | * @} |
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| 346 | */ |
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| 347 | |||
| 348 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group3 Peripheral errors functions |
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| 349 | * @brief Peripheral errors functions |
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| 350 | * |
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| 351 | @verbatim |
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| 352 | =============================================================================== |
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| 353 | ##### Peripheral errors functions ##### |
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| 354 | =============================================================================== |
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| 355 | [..] |
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| 356 | This subsection permit to get in run-time errors of the FLASH peripheral. |
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| 357 | |||
| 358 | @endverbatim |
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| 359 | * @{ |
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| 360 | */ |
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| 361 | |||
| 362 | /** |
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| 363 | * @brief Get the specific FLASH errors flag. |
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| 364 | * @param Error pointer is the error value. It can be a mixed of: |
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| 365 | @if STM32L100xB |
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| 366 | @elif STM32L100xBA |
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| 367 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
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| 368 | @elif STM32L151xB |
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| 369 | @elif STM32L151xBA |
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| 370 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
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| 371 | @elif STM32L152xB |
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| 372 | @elif STM32L152xBA |
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| 373 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
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| 374 | @elif STM32L100xC |
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| 375 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
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| 376 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
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| 377 | @elif STM32L151xC |
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| 378 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
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| 379 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
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| 380 | @elif STM32L152xC |
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| 381 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
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| 382 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
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| 383 | @elif STM32L162xC |
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| 384 | * @arg @ref HAL_FLASH_ERROR_RD FLASH Read Protection error flag (PCROP) |
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| 385 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
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| 386 | @else |
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| 387 | * @arg @ref HAL_FLASH_ERROR_OPTVUSR FLASH Option User validity error |
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| 388 | @endif |
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| 389 | * @arg @ref HAL_FLASH_ERROR_PGA FLASH Programming Alignment error flag |
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| 390 | * @arg @ref HAL_FLASH_ERROR_WRP FLASH Write protected error flag |
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| 391 | * @arg @ref HAL_FLASH_ERROR_OPTV FLASH Option valid error flag |
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| 392 | * @retval HAL Status |
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| 393 | */ |
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| 394 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_GetError(uint32_t * Error) |
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| 395 | { |
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| 396 | *Error = pFlash.ErrorCode; |
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| 397 | return HAL_OK; |
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| 398 | } |
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| 399 | |||
| 400 | /** |
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| 401 | * @} |
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| 402 | */ |
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| 403 | |||
| 404 | /** @defgroup FLASH_RAMFUNC_Exported_Functions_Group4 DATA EEPROM functions |
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| 405 | * |
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| 406 | * @{ |
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| 407 | */ |
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| 408 | |||
| 409 | /** |
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| 410 | * @brief Erase a double word in data memory. |
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| 411 | * @param Address specifies the address to be erased. |
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| 412 | * @note To correctly run this function, the HAL_FLASH_EEPROM_Unlock() function |
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| 413 | * must be called before. |
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| 414 | * Call the HAL_FLASH_EEPROM_Lock() to he data EEPROM access |
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| 415 | * and Flash program erase control register access(recommended to protect |
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| 416 | * the DATA_EEPROM against possible unwanted operation). |
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| 417 | * @note Data memory double word erase is possible only from SRAM. |
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| 418 | * @note A double word is erased to the data memory only if the first address |
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| 419 | * to load is the start address of a double word (multiple of 8 bytes). |
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| 420 | * @note During the Data memory double word erase, all read operations are |
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| 421 | * forbidden (this includes DMA read operations and debugger read |
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| 422 | * operations such as breakpoints, periodic updates, etc.). |
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| 423 | * @retval HAL status |
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| 424 | */ |
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| 425 | |||
| 426 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_EraseDoubleWord(uint32_t Address) |
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| 427 | { |
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| 428 | uint32_t primask_bit; |
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| 429 | HAL_StatusTypeDef status = HAL_OK; |
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| 430 | |||
| 431 | /* Wait for last operation to be completed */ |
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| 432 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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| 433 | |||
| 434 | if(status == HAL_OK) |
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| 435 | { |
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| 436 | /* Disable all IRQs */ |
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| 437 | primask_bit = __get_PRIMASK(); |
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| 438 | __disable_irq(); |
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| 439 | |||
| 440 | /* If the previous operation is completed, proceed to erase the next double word */ |
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| 441 | /* Set the ERASE bit */ |
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| 442 | SET_BIT(FLASH->PECR, FLASH_PECR_ERASE); |
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| 443 | |||
| 444 | /* Set DATA bit */ |
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| 445 | SET_BIT(FLASH->PECR, FLASH_PECR_DATA); |
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| 446 | |||
| 447 | /* Write 00000000h to the 2 words to erase */ |
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| 448 | *(__IO uint32_t *)Address = 0x00000000U; |
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| 449 | Address += 4U; |
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| 450 | *(__IO uint32_t *)Address = 0x00000000U; |
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| 451 | |||
| 452 | /* Wait for last operation to be completed */ |
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| 453 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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| 454 | |||
| 455 | /* If the erase operation is completed, disable the ERASE and DATA bits */ |
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| 456 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_ERASE); |
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| 457 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_DATA); |
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| 458 | |||
| 459 | /* Enable IRQs */ |
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| 460 | __set_PRIMASK(primask_bit); |
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| 461 | |||
| 462 | } |
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| 463 | |||
| 464 | /* Return the erase status */ |
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| 465 | return status; |
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| 466 | } |
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| 467 | |||
| 468 | /** |
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| 469 | * @brief Write a double word in data memory without erase. |
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| 470 | * @param Address specifies the address to be written. |
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| 471 | * @param Data specifies the data to be written. |
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| 472 | * @note To correctly run this function, the HAL_FLASH_EEPROM_Unlock() function |
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| 473 | * must be called before. |
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| 474 | * Call the HAL_FLASH_EEPROM_Lock() to he data EEPROM access |
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| 475 | * and Flash program erase control register access(recommended to protect |
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| 476 | * the DATA_EEPROM against possible unwanted operation). |
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| 477 | * @note Data memory double word write is possible only from SRAM. |
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| 478 | * @note A data memory double word is written to the data memory only if the |
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| 479 | * first address to load is the start address of a double word (multiple |
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| 480 | * of double word). |
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| 481 | * @note During the Data memory double word write, all read operations are |
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| 482 | * forbidden (this includes DMA read operations and debugger read |
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| 483 | * operations such as breakpoints, periodic updates, etc.). |
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| 484 | * @retval HAL status |
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| 485 | */ |
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| 486 | __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_ProgramDoubleWord(uint32_t Address, uint64_t Data) |
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| 487 | { |
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| 488 | uint32_t primask_bit; |
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| 489 | HAL_StatusTypeDef status = HAL_OK; |
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| 490 | |||
| 491 | /* Wait for last operation to be completed */ |
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| 492 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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| 493 | |||
| 494 | if(status == HAL_OK) |
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| 495 | { |
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| 496 | /* Disable all IRQs */ |
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| 497 | primask_bit = __get_PRIMASK(); |
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| 498 | __disable_irq(); |
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| 499 | |||
| 500 | /* If the previous operation is completed, proceed to program the new data*/ |
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| 501 | SET_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
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| 502 | SET_BIT(FLASH->PECR, FLASH_PECR_DATA); |
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| 503 | |||
| 504 | /* Write the 2 words */ |
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| 505 | *(__IO uint32_t *)Address = (uint32_t) Data; |
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| 506 | Address += 4U; |
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| 507 | *(__IO uint32_t *)Address = (uint32_t) (Data >> 32); |
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| 508 | |||
| 509 | /* Wait for last operation to be completed */ |
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| 510 | status = FLASHRAM_WaitForLastOperation(FLASH_TIMEOUT_VALUE); |
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| 511 | |||
| 512 | /* If the write operation is completed, disable the FPRG and DATA bits */ |
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| 513 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_FPRG); |
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| 514 | CLEAR_BIT(FLASH->PECR, FLASH_PECR_DATA); |
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| 515 | |||
| 516 | /* Enable IRQs */ |
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| 517 | __set_PRIMASK(primask_bit); |
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| 518 | } |
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| 519 | |||
| 520 | /* Return the Write Status */ |
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| 521 | return status; |
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| 522 | } |
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| 523 | |||
| 524 | /** |
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| 525 | * @} |
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| 526 | */ |
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| 527 | |||
| 528 | /** |
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| 529 | * @} |
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| 530 | */ |
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| 531 | |||
| 532 | /** @addtogroup FLASH_RAMFUNC_Private_Functions |
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| 533 | * @{ |
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| 534 | */ |
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| 535 | |||
| 536 | /** |
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| 537 | * @brief Set the specific FLASH error flag. |
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| 538 | * @retval HAL Status |
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| 539 | */ |
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| 540 | static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_SetErrorCode(void) |
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| 541 | { |
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| 542 | uint32_t flags = 0U; |
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| 543 | |||
| 544 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) |
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| 545 | { |
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| 546 | pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; |
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| 547 | flags |= FLASH_FLAG_WRPERR; |
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| 548 | } |
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| 549 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) |
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| 550 | { |
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| 551 | pFlash.ErrorCode |= HAL_FLASH_ERROR_PGA; |
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| 552 | flags |= FLASH_FLAG_PGAERR; |
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| 553 | } |
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| 554 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR)) |
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| 555 | { |
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| 556 | pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV; |
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| 557 | flags |= FLASH_FLAG_OPTVERR; |
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| 558 | } |
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| 559 | |||
| 560 | #if defined(FLASH_SR_RDERR) |
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| 561 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR)) |
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| 562 | { |
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| 563 | pFlash.ErrorCode |= HAL_FLASH_ERROR_RD; |
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| 564 | flags |= FLASH_FLAG_RDERR; |
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| 565 | } |
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| 566 | #endif /* FLASH_SR_RDERR */ |
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| 567 | #if defined(FLASH_SR_OPTVERRUSR) |
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| 568 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERRUSR)) |
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| 569 | { |
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| 570 | pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTVUSR; |
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| 571 | flags |= FLASH_FLAG_OPTVERRUSR; |
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| 572 | } |
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| 573 | #endif /* FLASH_SR_OPTVERRUSR */ |
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| 574 | |||
| 575 | /* Clear FLASH error pending bits */ |
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| 576 | __HAL_FLASH_CLEAR_FLAG(flags); |
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| 577 | |||
| 578 | return HAL_OK; |
||
| 579 | } |
||
| 580 | |||
| 581 | /** |
||
| 582 | * @brief Wait for a FLASH operation to complete. |
||
| 583 | * @param Timeout maximum flash operationtimeout |
||
| 584 | * @retval HAL status |
||
| 585 | */ |
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| 586 | static __RAM_FUNC HAL_StatusTypeDef FLASHRAM_WaitForLastOperation(uint32_t Timeout) |
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| 587 | { |
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| 588 | /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. |
||
| 589 | Even if the FLASH operation fails, the BUSY flag will be reset and an error |
||
| 590 | flag will be set */ |
||
| 591 | |||
| 592 | while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY) && (Timeout != 0x00U)) |
||
| 593 | { |
||
| 594 | Timeout--; |
||
| 595 | } |
||
| 596 | |||
| 597 | if(Timeout == 0x00U) |
||
| 598 | { |
||
| 599 | return HAL_TIMEOUT; |
||
| 600 | } |
||
| 601 | |||
| 602 | /* Check FLASH End of Operation flag */ |
||
| 603 | if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) |
||
| 604 | { |
||
| 605 | /* Clear FLASH End of Operation pending bit */ |
||
| 606 | __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); |
||
| 607 | } |
||
| 608 | |||
| 609 | if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || |
||
| 610 | __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) || |
||
| 611 | #if defined(FLASH_SR_RDERR) |
||
| 612 | __HAL_FLASH_GET_FLAG(FLASH_FLAG_RDERR) || |
||
| 613 | #endif /* FLASH_SR_RDERR */ |
||
| 614 | #if defined(FLASH_SR_OPTVERRUSR) |
||
| 615 | __HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERRUSR) || |
||
| 616 | #endif /* FLASH_SR_OPTVERRUSR */ |
||
| 617 | __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGAERR)) |
||
| 618 | { |
||
| 619 | /*Save the error code*/ |
||
| 620 | FLASHRAM_SetErrorCode(); |
||
| 621 | return HAL_ERROR; |
||
| 622 | } |
||
| 623 | |||
| 624 | /* There is no error flag set */ |
||
| 625 | return HAL_OK; |
||
| 626 | } |
||
| 627 | |||
| 628 | /** |
||
| 629 | * @} |
||
| 630 | */ |
||
| 631 | |||
| 632 | /** |
||
| 633 | * @} |
||
| 634 | */ |
||
| 635 | |||
| 636 | #endif /* HAL_FLASH_MODULE_ENABLED */ |
||
| 637 | /** |
||
| 638 | * @} |
||
| 639 | */ |
||
| 640 |