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/**
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  ******************************************************************************
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  * @file    stm32l1xx_hal_adc.c
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  * @author  MCD Application Team
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  * @brief   This file provides firmware functions to manage the following
6
  *          functionalities of the Analog to Digital Convertor (ADC)
7
  *          peripheral:
8
  *           + Initialization and de-initialization functions
9
  *             ++ Initialization and Configuration of ADC
10
  *           + Operation functions
11
  *             ++ Start, stop, get result of conversions of regular
12
  *                group, using 3 possible modes: polling, interruption or DMA.
13
  *           + Control functions
14
  *             ++ Channels configuration on regular group
15
  *             ++ Channels configuration on injected group
16
  *             ++ Analog Watchdog configuration
17
  *           + State functions
18
  *             ++ ADC state machine management
19
  *             ++ Interrupts and flags management
20
  *          Other functions (extended functions) are available in file
21
  *          "stm32l1xx_hal_adc_ex.c".
22
  *
23
  @verbatim
24
  ==============================================================================
25
                     ##### ADC peripheral features #####
26
  ==============================================================================
27
  [..]
28
  (+) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution
29
 
30
  (+) Interrupt generation at the end of regular conversion, end of injected
31
      conversion, and in case of analog watchdog or overrun events.
32
 
33
  (+) Single and continuous conversion modes.
34
 
35
  (+) Scan mode for conversion of several channels sequentially.
36
 
37
  (+) Data alignment with in-built data coherency.
38
 
39
  (+) Programmable sampling time (channel wise)
40
 
41
  (+) ADC conversion of regular group and injected group.
42
 
43
  (+) External trigger (timer or EXTI) with configurable polarity
44
      for both regular and injected groups.
45
 
46
  (+) DMA request generation for transfer of conversions data of regular group.
47
 
48
  (+) ADC offset on injected channels
49
 
50
  (+) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
51
      slower speed.
52
 
53
  (+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to
54
      Vdda or to an external voltage reference).
55
 
56
 
57
                     ##### How to use this driver #####
58
  ==============================================================================
59
    [..]
60
 
61
     *** Configuration of top level parameters related to ADC ***
62
     ============================================================
63
     [..]
64
 
65
    (#) Enable the ADC interface
66
      (++) As prerequisite, ADC clock must be configured at RCC top level.
67
           Caution: On STM32L1, ADC clock frequency max is 16MHz (refer
68
                    to device datasheet).
69
                    Therefore, ADC clock prescaler must be configured in
70
                    function of ADC clock source frequency to remain below
71
                    this maximum frequency.
72
 
73
        (++) Two clock settings are mandatory:
74
             (+++) ADC clock (core clock).
75
             (+++) ADC clock (conversions clock).
76
                   Only one possible clock source: derived from HSI RC 16MHz oscillator
77
                   (HSI).
78
                   ADC is connected directly to HSI RC 16MHz oscillator.
79
                   Therefore, RCC PLL setting has no impact on ADC.
80
                   PLL can be disabled (".PLL.PLLState = RCC_PLL_NONE") or
81
                   enabled with HSI16 as clock source
82
                   (".PLL.PLLSource = RCC_PLLSOURCE_HSI") to be used as device
83
                   main clock source SYSCLK.
84
                   The only mandatory setting is ".HSIState = RCC_HSI_ON"
85
 
86
             (+++) Example:
87
                   Into HAL_ADC_MspInit() (recommended code location) or with
88
                   other device clock parameters configuration:
89
               (+++) __HAL_RCC_ADC1_CLK_ENABLE();
90
 
91
               (+++) HAL_RCC_GetOscConfig(&RCC_OscInitStructure);
92
               (+++) RCC_OscInitStructure.OscillatorType = (... | RCC_OSCILLATORTYPE_HSI);
93
               (+++) RCC_OscInitStructure.HSIState = RCC_HSI_ON;
94
               (+++) RCC_OscInitStructure.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
95
               (+++) RCC_OscInitStructure.PLL.PLLState = RCC_PLL_NONE;
96
               (+++) RCC_OscInitStructure.PLL.PLLSource = ...
97
               (+++) RCC_OscInitStructure.PLL...
98
               (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
99
 
100
        (++) ADC clock prescaler is configured at ADC level with
101
             parameter "ClockPrescaler" using function HAL_ADC_Init().
102
 
103
    (#) ADC pins configuration
104
         (++) Enable the clock for the ADC GPIOs
105
              using macro __HAL_RCC_GPIOx_CLK_ENABLE()
106
         (++) Configure these ADC pins in analog mode
107
              using function HAL_GPIO_Init()
108
 
109
    (#) Optionally, in case of usage of ADC with interruptions:
110
         (++) Configure the NVIC for ADC
111
              using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
112
         (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
113
              into the function of corresponding ADC interruption vector
114
              ADCx_IRQHandler().
115
 
116
    (#) Optionally, in case of usage of DMA:
117
         (++) Configure the DMA (DMA channel, mode normal or circular, ...)
118
              using function HAL_DMA_Init().
119
         (++) Configure the NVIC for DMA
120
              using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
121
         (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
122
              into the function of corresponding DMA interruption vector
123
              DMAx_Channelx_IRQHandler().
124
 
125
     *** Configuration of ADC, groups regular/injected, channels parameters ***
126
     ==========================================================================
127
     [..]
128
 
129
    (#) Configure the ADC parameters (resolution, data alignment, ...)
130
        and regular group parameters (conversion trigger, sequencer, ...)
131
        using function HAL_ADC_Init().
132
 
133
    (#) Configure the channels for regular group parameters (channel number,
134
        channel rank into sequencer, ..., into regular group)
135
        using function HAL_ADC_ConfigChannel().
136
 
137
    (#) Optionally, configure the injected group parameters (conversion trigger,
138
        sequencer, ..., of injected group)
139
        and the channels for injected group parameters (channel number,
140
        channel rank into sequencer, ..., into injected group)
141
        using function HAL_ADCEx_InjectedConfigChannel().
142
 
143
    (#) Optionally, configure the analog watchdog parameters (channels
144
        monitored, thresholds, ...)
145
        using function HAL_ADC_AnalogWDGConfig().
146
 
147
    (#) Optionally, for devices with several ADC instances: configure the
148
        multimode parameters
149
        using function HAL_ADCEx_MultiModeConfigChannel().
150
 
151
     *** Execution of ADC conversions ***
152
     ====================================
153
     [..]
154
 
155
    (#) ADC driver can be used among three modes: polling, interruption,
156
        transfer by DMA.
157
 
158
        (++) ADC conversion by polling:
159
          (+++) Activate the ADC peripheral and start conversions
160
                using function HAL_ADC_Start()
161
          (+++) Wait for ADC conversion completion
162
                using function HAL_ADC_PollForConversion()
163
                (or for injected group: HAL_ADCEx_InjectedPollForConversion() )
164
          (+++) Retrieve conversion results
165
                using function HAL_ADC_GetValue()
166
                (or for injected group: HAL_ADCEx_InjectedGetValue() )
167
          (+++) Stop conversion and disable the ADC peripheral
168
                using function HAL_ADC_Stop()
169
 
170
        (++) ADC conversion by interruption:
171
          (+++) Activate the ADC peripheral and start conversions
172
                using function HAL_ADC_Start_IT()
173
          (+++) Wait for ADC conversion completion by call of function
174
                HAL_ADC_ConvCpltCallback()
175
                (this function must be implemented in user program)
176
                (or for injected group: HAL_ADCEx_InjectedConvCpltCallback() )
177
          (+++) Retrieve conversion results
178
                using function HAL_ADC_GetValue()
179
                (or for injected group: HAL_ADCEx_InjectedGetValue() )
180
          (+++) Stop conversion and disable the ADC peripheral
181
                using function HAL_ADC_Stop_IT()
182
 
183
        (++) ADC conversion with transfer by DMA:
184
          (+++) Activate the ADC peripheral and start conversions
185
                using function HAL_ADC_Start_DMA()
186
          (+++) Wait for ADC conversion completion by call of function
187
                HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()
188
                (these functions must be implemented in user program)
189
          (+++) Conversion results are automatically transferred by DMA into
190
                destination variable address.
191
          (+++) Stop conversion and disable the ADC peripheral
192
                using function HAL_ADC_Stop_DMA()
193
 
194
        (++) For devices with several ADCs: ADC multimode conversion
195
             with transfer by DMA:
196
          (+++) Activate the ADC peripheral (slave) and start conversions
197
                using function HAL_ADC_Start()
198
          (+++) Activate the ADC peripheral (master) and start conversions
199
                using function HAL_ADCEx_MultiModeStart_DMA()
200
          (+++) Wait for ADC conversion completion by call of function
201
                HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()
202
                (these functions must be implemented in user program)
203
          (+++) Conversion results are automatically transferred by DMA into
204
                destination variable address.
205
          (+++) Stop conversion and disable the ADC peripheral (master)
206
                using function HAL_ADCEx_MultiModeStop_DMA()
207
          (+++) Stop conversion and disable the ADC peripheral (slave)
208
                using function HAL_ADC_Stop_IT()
209
 
210
     [..]
211
 
212
    (@) Callback functions must be implemented in user program:
213
      (+@) HAL_ADC_ErrorCallback()
214
      (+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog)
215
      (+@) HAL_ADC_ConvCpltCallback()
216
      (+@) HAL_ADC_ConvHalfCpltCallback
217
      (+@) HAL_ADCEx_InjectedConvCpltCallback()
218
 
219
     *** Deinitialization of ADC ***
220
     ============================================================
221
     [..]
222
 
223
    (#) Disable the ADC interface
224
      (++) ADC clock can be hard reset and disabled at RCC top level.
225
        (++) Hard reset of ADC peripherals
226
             using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET().
227
        (++) ADC clock disable
228
             using the equivalent macro/functions as configuration step.
229
             (+++) Example:
230
                   Into HAL_ADC_MspDeInit() (recommended code location) or with
231
                   other device clock parameters configuration:
232
               (+++) HAL_RCC_GetOscConfig(&RCC_OscInitStructure);
233
               (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI;
234
               (+++) RCC_OscInitStructure.HSIState = RCC_HSI_OFF; (if not used for system clock)
235
               (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
236
 
237
    (#) ADC pins configuration
238
         (++) Disable the clock for the ADC GPIOs
239
              using macro __HAL_RCC_GPIOx_CLK_DISABLE()
240
 
241
    (#) Optionally, in case of usage of ADC with interruptions:
242
         (++) Disable the NVIC for ADC
243
              using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
244
 
245
    (#) Optionally, in case of usage of DMA:
246
         (++) Deinitialize the DMA
247
              using function HAL_DMA_Init().
248
         (++) Disable the NVIC for DMA
249
              using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
250
 
251
    [..]
252
 
253
    *** Callback registration ***
254
    =============================================
255
    [..]
256
 
257
     The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1,
258
     allows the user to configure dynamically the driver callbacks.
259
     Use Functions @ref HAL_ADC_RegisterCallback()
260
     to register an interrupt callback.
261
    [..]
262
 
263
     Function @ref HAL_ADC_RegisterCallback() allows to register following callbacks:
264
       (+) ConvCpltCallback               : ADC conversion complete callback
265
       (+) ConvHalfCpltCallback           : ADC conversion DMA half-transfer callback
266
       (+) LevelOutOfWindowCallback       : ADC analog watchdog 1 callback
267
       (+) ErrorCallback                  : ADC error callback
268
       (+) InjectedConvCpltCallback       : ADC group injected conversion complete callback
269
       (+) MspInitCallback                : ADC Msp Init callback
270
       (+) MspDeInitCallback              : ADC Msp DeInit callback
271
     This function takes as parameters the HAL peripheral handle, the Callback ID
272
     and a pointer to the user callback function.
273
    [..]
274
 
275
     Use function @ref HAL_ADC_UnRegisterCallback to reset a callback to the default
276
     weak function.
277
    [..]
278
 
279
     @ref HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle,
280
     and the Callback ID.
281
     This function allows to reset following callbacks:
282
       (+) ConvCpltCallback               : ADC conversion complete callback
283
       (+) ConvHalfCpltCallback           : ADC conversion DMA half-transfer callback
284
       (+) LevelOutOfWindowCallback       : ADC analog watchdog 1 callback
285
       (+) ErrorCallback                  : ADC error callback
286
       (+) InjectedConvCpltCallback       : ADC group injected conversion complete callback
287
       (+) MspInitCallback                : ADC Msp Init callback
288
       (+) MspDeInitCallback              : ADC Msp DeInit callback
289
     [..]
290
 
291
     By default, after the @ref HAL_ADC_Init() and when the state is @ref HAL_ADC_STATE_RESET
292
     all callbacks are set to the corresponding weak functions:
293
     examples @ref HAL_ADC_ConvCpltCallback(), @ref HAL_ADC_ErrorCallback().
294
     Exception done for MspInit and MspDeInit functions that are
295
     reset to the legacy weak functions in the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit() only when
296
     these callbacks are null (not registered beforehand).
297
    [..]
298
 
299
     If MspInit or MspDeInit are not null, the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit()
300
     keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
301
     [..]
302
 
303
     Callbacks can be registered/unregistered in @ref HAL_ADC_STATE_READY state only.
304
     Exception done MspInit/MspDeInit functions that can be registered/unregistered
305
     in @ref HAL_ADC_STATE_READY or @ref HAL_ADC_STATE_RESET state,
306
     thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
307
    [..]
308
 
309
     Then, the user first registers the MspInit/MspDeInit user callbacks
310
     using @ref HAL_ADC_RegisterCallback() before calling @ref HAL_ADC_DeInit()
311
     or @ref HAL_ADC_Init() function.
312
     [..]
313
 
314
     When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or
315
     not defined, the callback registration feature is not available and all callbacks
316
     are set to the corresponding weak functions.
317
 
318
  @endverbatim
319
  ******************************************************************************
320
  * @attention
321
  *
322
  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
323
  * All rights reserved.</center></h2>
324
  *
325
  * This software component is licensed by ST under BSD 3-Clause license,
326
  * the "License"; You may not use this file except in compliance with the
327
  * License. You may obtain a copy of the License at:
328
  *                        opensource.org/licenses/BSD-3-Clause
329
  *
330
  ******************************************************************************  
331
  */
332
 
333
/* Includes ------------------------------------------------------------------*/
334
#include "stm32l1xx_hal.h"
335
 
336
/** @addtogroup STM32L1xx_HAL_Driver
337
  * @{
338
  */
339
 
340
/** @defgroup ADC ADC
341
  * @brief ADC HAL module driver
342
  * @{
343
  */
344
 
345
#ifdef HAL_ADC_MODULE_ENABLED
346
 
347
/* Private typedef -----------------------------------------------------------*/
348
/* Private define ------------------------------------------------------------*/
349
/** @defgroup ADC_Private_Constants ADC Private Constants
350
  * @{
351
  */
352
 
353
  /* Timeout values for ADC enable and disable settling time.                 */
354
  /* Values defined to be higher than worst cases: low clocks freq,           */
355
  /* maximum prescaler.                                                       */
356
  /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock         */
357
  /* prescaler 4, sampling time 7.5 ADC clock cycles, resolution 12 bits.     */
358
  /* Unit: ms                                                                 */
359
  #define ADC_ENABLE_TIMEOUT              (2U)
360
  #define ADC_DISABLE_TIMEOUT             (2U)
361
 
362
  /* Delay for ADC stabilization time.                                        */
363
  /* Maximum delay is 1us (refer to device datasheet, parameter tSTAB).       */
364
  /* Unit: us                                                                 */
365
  #define ADC_STAB_DELAY_US               (3U)
366
 
367
  /* Delay for temperature sensor stabilization time.                         */
368
  /* Maximum delay is 10us (refer to device datasheet, parameter tSTART).     */
369
  /* Unit: us                                                                 */
370
  #define ADC_TEMPSENSOR_DELAY_US         (10U)
371
 
372
/**
373
  * @}
374
  */
375
 
376
/* Private macro -------------------------------------------------------------*/
377
/* Private variables ---------------------------------------------------------*/
378
/* Private function prototypes -----------------------------------------------*/
379
/** @defgroup ADC_Private_Functions ADC Private Functions
380
  * @{
381
  */
382
static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
383
static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
384
static void ADC_DMAError(DMA_HandleTypeDef *hdma);
385
/**
386
  * @}
387
  */
388
 
389
/* Exported functions --------------------------------------------------------*/
390
 
391
/** @defgroup ADC_Exported_Functions ADC Exported Functions
392
  * @{
393
  */
394
 
395
/** @defgroup ADC_Exported_Functions_Group1 ADC Initialization/de-initialization functions
396
  * @brief    ADC Initialization and Configuration functions
397
  *
398
@verbatim    
399
 ===============================================================================
400
              ##### Initialization and de-initialization functions #####
401
 ===============================================================================
402
    [..]  This section provides functions allowing to:
403
      (+) Initialize and configure the ADC.
404
      (+) De-initialize the ADC.
405
@endverbatim
406
  * @{
407
  */
408
 
409
/**
410
  * @brief  Initializes the ADC peripheral and regular group according to  
411
  *         parameters specified in structure "ADC_InitTypeDef".
412
  * @note   As prerequisite, ADC clock must be configured at RCC top level
413
  *         (clock source APB2).
414
  *         See commented example code below that can be copied and uncommented
415
  *         into HAL_ADC_MspInit().
416
  * @note   Possibility to update parameters on the fly:
417
  *         This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
418
  *         coming from ADC state reset. Following calls to this function can
419
  *         be used to reconfigure some parameters of ADC_InitTypeDef  
420
  *         structure on the fly, without modifying MSP configuration. If ADC  
421
  *         MSP has to be modified again, HAL_ADC_DeInit() must be called
422
  *         before HAL_ADC_Init().
423
  *         The setting of these parameters is conditioned to ADC state.
424
  *         For parameters constraints, see comments of structure
425
  *         "ADC_InitTypeDef".
426
  * @note   This function configures the ADC within 2 scopes: scope of entire
427
  *         ADC and scope of regular group. For parameters details, see comments
428
  *         of structure "ADC_InitTypeDef".
429
  * @param  hadc ADC handle
430
  * @retval HAL status
431
  */
432
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
433
{
434
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
435
  uint32_t tmp_cr1 = 0;
436
  uint32_t tmp_cr2 = 0;
437
 
438
  /* Check ADC handle */
439
  if(hadc == NULL)
440
  {
441
    return HAL_ERROR;
442
  }
443
 
444
  /* Check the parameters */
445
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
446
  assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
447
  assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
448
  assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
449
  assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
450
  assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
451
  assert_param(IS_ADC_AUTOWAIT(hadc->Init.LowPowerAutoWait));
452
  assert_param(IS_ADC_AUTOPOWEROFF(hadc->Init.LowPowerAutoPowerOff));
453
  assert_param(IS_ADC_CHANNELSBANK(hadc->Init.ChannelsBank));
454
  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
455
  assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
456
  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
457
 
458
  if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
459
  {
460
    assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion));
461
    assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
462
    if(hadc->Init.DiscontinuousConvMode != DISABLE)
463
    {
464
      assert_param(IS_ADC_REGULAR_DISCONT_NUMBER(hadc->Init.NbrOfDiscConversion));
465
    }
466
  }
467
 
468
  if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
469
  {
470
    assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
471
  }
472
 
473
 
474
  /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured    */
475
  /* at RCC top level.                                                        */
476
  /* Refer to header of this file for more details on clock enabling          */
477
  /* procedure.                                                               */
478
 
479
  /* Actions performed only if ADC is coming from state reset:                */
480
  /* - Initialization of ADC MSP                                              */
481
  if (hadc->State == HAL_ADC_STATE_RESET)
482
  {
483
    /* Initialize ADC error code */
484
    ADC_CLEAR_ERRORCODE(hadc);
485
 
486
    /* Allocate lock resource and initialize it */
487
    hadc->Lock = HAL_UNLOCKED;
488
 
489
    /* Enable SYSCFG clock to control the routing Interface (RI) */
490
    __HAL_RCC_SYSCFG_CLK_ENABLE();
491
 
492
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
493
    /* Init the ADC Callback settings */
494
    hadc->ConvCpltCallback              = HAL_ADC_ConvCpltCallback;                 /* Legacy weak callback */
495
    hadc->ConvHalfCpltCallback          = HAL_ADC_ConvHalfCpltCallback;             /* Legacy weak callback */
496
    hadc->LevelOutOfWindowCallback      = HAL_ADC_LevelOutOfWindowCallback;         /* Legacy weak callback */
497
    hadc->ErrorCallback                 = HAL_ADC_ErrorCallback;                    /* Legacy weak callback */
498
    hadc->InjectedConvCpltCallback      = HAL_ADCEx_InjectedConvCpltCallback;       /* Legacy weak callback */
499
 
500
    if (hadc->MspInitCallback == NULL)
501
    {
502
      hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit  */
503
    }
504
 
505
    /* Init the low level hardware */
506
    hadc->MspInitCallback(hadc);
507
#else
508
    /* Init the low level hardware */
509
    HAL_ADC_MspInit(hadc);
510
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
511
  }
512
 
513
  /* Configuration of ADC parameters if previous preliminary actions are      */
514
  /* correctly completed.                                                     */
515
  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
516
  {
517
    /* Set ADC state */
518
    ADC_STATE_CLR_SET(hadc->State,
519
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
520
                      HAL_ADC_STATE_BUSY_INTERNAL);
521
 
522
    /* Set ADC parameters */
523
 
524
    /* Configuration of common ADC clock: clock source HSI with selectable    */
525
    /* prescaler                                                              */
526
    MODIFY_REG(ADC->CCR                 ,
527
               ADC_CCR_ADCPRE           ,
528
               hadc->Init.ClockPrescaler );
529
 
530
    /* Configuration of ADC:                                                  */
531
    /*  - external trigger polarity                                           */
532
    /*  - End of conversion selection                                         */
533
    /*  - DMA continuous request                                              */
534
    /*  - Channels bank (Banks availability depends on devices categories)    */
535
    /*  - continuous conversion mode                                          */
536
    tmp_cr2 |= (hadc->Init.DataAlign                                           |
537
                hadc->Init.EOCSelection                                        |
538
                ADC_CR2_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) |
539
                hadc->Init.ChannelsBank                                        |
540
                ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode)     );
541
 
542
    /* Enable external trigger if trigger selection is different of software  */
543
    /* start.                                                                 */
544
    /* Note: This configuration keeps the hardware feature of parameter       */
545
    /*       ExternalTrigConvEdge "trigger edge none" equivalent to           */
546
    /*       software start.                                                  */
547
    if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
548
    {
549
      tmp_cr2 |= ( hadc->Init.ExternalTrigConv    |
550
                  hadc->Init.ExternalTrigConvEdge );
551
    }
552
 
553
    /* Parameters update conditioned to ADC state:                            */
554
    /* Parameters that can be updated only when ADC is disabled:              */
555
    /*  - delay selection (LowPowerAutoWait mode)                             */
556
    /*  - resolution                                                          */
557
    /*  - auto power off (LowPowerAutoPowerOff mode)                          */
558
    /*  - scan mode                                                           */
559
    /*  - discontinuous mode disable/enable                                   */
560
    /*  - discontinuous mode number of conversions                            */
561
    if ((ADC_IS_ENABLE(hadc) == RESET))
562
    {
563
      tmp_cr2 |= hadc->Init.LowPowerAutoWait;
564
 
565
      tmp_cr1 |= (hadc->Init.Resolution                     |
566
                  hadc->Init.LowPowerAutoPowerOff           |
567
                  ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode)  );
568
 
569
      /* Enable discontinuous mode only if continuous mode is disabled */
570
      /* Note: If parameter "Init.ScanConvMode" is set to disable, parameter  */
571
      /*       discontinuous is set anyway, but has no effect on ADC HW.      */
572
      if (hadc->Init.DiscontinuousConvMode == ENABLE)
573
      {
574
        if (hadc->Init.ContinuousConvMode == DISABLE)
575
        {
576
          /* Enable the selected ADC regular discontinuous mode */
577
          /* Set the number of channels to be converted in discontinuous mode */
578
          SET_BIT(tmp_cr1, ADC_CR1_DISCEN                                            |
579
                           ADC_CR1_DISCONTINUOUS_NUM(hadc->Init.NbrOfDiscConversion)  );
580
        }
581
        else
582
        {
583
          /* ADC regular group settings continuous and sequencer discontinuous*/
584
          /* cannot be enabled simultaneously.                                */
585
 
586
          /* Update ADC state machine to error */
587
          SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
588
 
589
          /* Set ADC error code to ADC IP internal error */
590
          SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
591
        }
592
      }
593
 
594
      /* Update ADC configuration register CR1 with previous settings */
595
        MODIFY_REG(hadc->Instance->CR1,
596
                   ADC_CR1_RES     |
597
                   ADC_CR1_PDI     |
598
                   ADC_CR1_PDD     |
599
                   ADC_CR1_DISCNUM |
600
                   ADC_CR1_DISCEN  |
601
                   ADC_CR1_SCAN     ,
602
                   tmp_cr1           );
603
    }
604
 
605
    /* Update ADC configuration register CR2 with previous settings */
606
    MODIFY_REG(hadc->Instance->CR2    ,
607
               ADC_CR2_MASK_ADCINIT() ,
608
               tmp_cr2                 );
609
 
610
    /* Configuration of regular group sequencer:                              */
611
    /* - if scan mode is disabled, regular channels sequence length is set to */
612
    /*   0x00: 1 channel converted (channel on regular rank 1)                */
613
    /*   Parameter "NbrOfConversion" is discarded.                            */
614
    /*   Note: Scan mode is present by hardware on this device and, if        */
615
    /*   disabled, discards automatically nb of conversions. Anyway, nb of    */
616
    /*   conversions is forced to 0x00 for alignment over all STM32 devices.  */
617
    /* - if scan mode is enabled, regular channels sequence length is set to  */
618
    /*   parameter "NbrOfConversion"                                          */
619
    if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
620
    {
621
      MODIFY_REG(hadc->Instance->SQR1                         ,
622
                 ADC_SQR1_L                                   ,
623
                 ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion)  );
624
    }
625
    else
626
    {
627
      MODIFY_REG(hadc->Instance->SQR1,
628
                 ADC_SQR1_L          ,
629
                 0x00000000           );
630
    }
631
 
632
    /* Check back that ADC registers have effectively been configured to      */
633
    /* ensure of no potential problem of ADC core IP clocking.                */
634
    /* Check through register CR2 (excluding execution control bits ADON,     */
635
    /* JSWSTART, SWSTART and injected trigger bits JEXTEN and JEXTSEL).       */
636
    if ((READ_REG(hadc->Instance->CR2) & ~(ADC_CR2_ADON |
637
                                           ADC_CR2_SWSTART | ADC_CR2_JSWSTART |
638
                                           ADC_CR2_JEXTEN  | ADC_CR2_JEXTSEL   ))
639
         == tmp_cr2)
640
    {
641
      /* Set ADC error code to none */
642
      ADC_CLEAR_ERRORCODE(hadc);
643
 
644
      /* Set the ADC state */
645
      ADC_STATE_CLR_SET(hadc->State,
646
                        HAL_ADC_STATE_BUSY_INTERNAL,
647
                        HAL_ADC_STATE_READY);
648
    }
649
    else
650
    {
651
      /* Update ADC state machine to error */
652
      ADC_STATE_CLR_SET(hadc->State,
653
                        HAL_ADC_STATE_BUSY_INTERNAL,
654
                        HAL_ADC_STATE_ERROR_INTERNAL);
655
 
656
      /* Set ADC error code to ADC IP internal error */
657
      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
658
 
659
      tmp_hal_status = HAL_ERROR;
660
    }
661
 
662
  }
663
  else
664
  {
665
    tmp_hal_status = HAL_ERROR;
666
  }
667
 
668
  /* Return function status */
669
  return tmp_hal_status;
670
}
671
 
672
/**
673
  * @brief  Deinitialize the ADC peripheral registers to its default reset values.
674
  * @note   To not impact other ADCs, reset of common ADC registers have been
675
  *         left commented below.
676
  *         If needed, the example code can be copied and uncommented into
677
  *         function HAL_ADC_MspDeInit().
678
  * @param  hadc ADC handle
679
  * @retval HAL status
680
  */
681
HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
682
{
683
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
684
 
685
  /* Check ADC handle */
686
  if(hadc == NULL)
687
  {
688
    return HAL_ERROR;
689
  }
690
 
691
  /* Check the parameters */
692
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
693
 
694
  /* Set ADC state */
695
  SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
696
 
697
  /* Stop potential conversion on going, on regular and injected groups */
698
  /* Disable ADC peripheral */
699
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
700
 
701
 
702
  /* Configuration of ADC parameters if previous preliminary actions are      */
703
  /* correctly completed.                                                     */
704
  if (tmp_hal_status == HAL_OK)
705
  {
706
    /* ========== Reset ADC registers ========== */
707
    /* Reset register SR */
708
    __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_JEOC | ADC_FLAG_EOC |
709
                                ADC_FLAG_JSTRT | ADC_FLAG_STRT));
710
 
711
    /* Reset register CR1 */
712
    CLEAR_BIT(hadc->Instance->CR1, (ADC_CR1_OVRIE   | ADC_CR1_RES     | ADC_CR1_AWDEN  |
713
                                    ADC_CR1_JAWDEN  | ADC_CR1_PDI     | ADC_CR1_PDD    |
714
                                    ADC_CR1_DISCNUM | ADC_CR1_JDISCEN | ADC_CR1_DISCEN |
715
                                    ADC_CR1_JAUTO   | ADC_CR1_AWDSGL  | ADC_CR1_SCAN   |
716
                                    ADC_CR1_JEOCIE  | ADC_CR1_AWDIE   | ADC_CR1_EOCIE  |
717
                                    ADC_CR1_AWDCH                                       ));
718
 
719
    /* Reset register CR2 */
720
    ADC_CR2_CLEAR(hadc);
721
 
722
    /* Reset register SMPR0 */
723
    ADC_SMPR0_CLEAR(hadc);
724
 
725
    /* Reset register SMPR1 */
726
    ADC_SMPR1_CLEAR(hadc);
727
 
728
    /* Reset register SMPR2 */
729
    CLEAR_BIT(hadc->Instance->SMPR2, (ADC_SMPR2_SMP19 | ADC_SMPR2_SMP18 | ADC_SMPR2_SMP17 |
730
                                      ADC_SMPR2_SMP16 | ADC_SMPR2_SMP15 | ADC_SMPR2_SMP14 |
731
                                      ADC_SMPR2_SMP13 | ADC_SMPR2_SMP12 | ADC_SMPR2_SMP11 |
732
                                      ADC_SMPR2_SMP10                                      ));
733
 
734
    /* Reset register SMPR3 */
735
    CLEAR_BIT(hadc->Instance->SMPR3, (ADC_SMPR3_SMP9 | ADC_SMPR3_SMP8 | ADC_SMPR3_SMP7 |
736
                                      ADC_SMPR3_SMP6 | ADC_SMPR3_SMP5 | ADC_SMPR3_SMP4 |
737
                                      ADC_SMPR3_SMP3 | ADC_SMPR3_SMP2 | ADC_SMPR3_SMP1 |
738
                                      ADC_SMPR3_SMP0                                    ));
739
 
740
    /* Reset register JOFR1 */
741
    CLEAR_BIT(hadc->Instance->JOFR1, ADC_JOFR1_JOFFSET1);
742
    /* Reset register JOFR2 */
743
    CLEAR_BIT(hadc->Instance->JOFR2, ADC_JOFR2_JOFFSET2);
744
    /* Reset register JOFR3 */
745
    CLEAR_BIT(hadc->Instance->JOFR3, ADC_JOFR3_JOFFSET3);
746
    /* Reset register JOFR4 */
747
    CLEAR_BIT(hadc->Instance->JOFR4, ADC_JOFR4_JOFFSET4);
748
 
749
    /* Reset register HTR */
750
    CLEAR_BIT(hadc->Instance->HTR, ADC_HTR_HT);
751
    /* Reset register LTR */
752
    CLEAR_BIT(hadc->Instance->LTR, ADC_LTR_LT);
753
 
754
    /* Reset register SQR1 */
755
    CLEAR_BIT(hadc->Instance->SQR1, (ADC_SQR1_L | __ADC_SQR1_SQXX));
756
 
757
    /* Reset register SQR2 */
758
    CLEAR_BIT(hadc->Instance->SQR2, (ADC_SQR2_SQ24 | ADC_SQR2_SQ23 | ADC_SQR2_SQ22 |
759
                                     ADC_SQR2_SQ21 | ADC_SQR2_SQ20 | ADC_SQR2_SQ19  ));
760
 
761
    /* Reset register SQR3 */
762
    CLEAR_BIT(hadc->Instance->SQR3, (ADC_SQR3_SQ18 | ADC_SQR3_SQ17 | ADC_SQR3_SQ16 |
763
                                     ADC_SQR3_SQ15 | ADC_SQR3_SQ14 | ADC_SQR3_SQ13  ));
764
 
765
    /* Reset register SQR4 */
766
    CLEAR_BIT(hadc->Instance->SQR4, (ADC_SQR4_SQ12 | ADC_SQR4_SQ11 | ADC_SQR4_SQ10 |
767
                                     ADC_SQR4_SQ9  | ADC_SQR4_SQ8  | ADC_SQR4_SQ7   ));
768
 
769
    /* Reset register SQR5 */
770
    CLEAR_BIT(hadc->Instance->SQR5, (ADC_SQR5_SQ6 | ADC_SQR5_SQ5 | ADC_SQR5_SQ4 |
771
                                     ADC_SQR5_SQ3 | ADC_SQR5_SQ2 | ADC_SQR5_SQ1  ));
772
 
773
 
774
    /* Reset register JSQR */
775
    CLEAR_BIT(hadc->Instance->JSQR, (ADC_JSQR_JL |
776
                                     ADC_JSQR_JSQ4 | ADC_JSQR_JSQ3 |
777
                                     ADC_JSQR_JSQ2 | ADC_JSQR_JSQ1  ));
778
 
779
    /* Reset register DR */
780
    /* bits in access mode read only, no direct reset applicable*/
781
 
782
    /* Reset registers JDR1, JDR2, JDR3, JDR4 */
783
    /* bits in access mode read only, no direct reset applicable*/
784
 
785
    /* Reset register CCR */
786
    CLEAR_BIT(ADC->CCR, ADC_CCR_TSVREFE);  
787
 
788
    /* ========== Hard reset ADC peripheral ========== */
789
    /* Performs a global reset of the entire ADC peripheral: ADC state is     */
790
    /* forced to a similar state after device power-on.                       */
791
    /* If needed, copy-paste and uncomment the following reset code into      */
792
    /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)":              */
793
    /*                                                                        */
794
    /*  __HAL_RCC_ADC1_FORCE_RESET()                                          */
795
    /*  __HAL_RCC_ADC1_RELEASE_RESET()                                        */
796
 
797
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
798
    if (hadc->MspDeInitCallback == NULL)
799
    {
800
      hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit  */
801
    }
802
 
803
    /* DeInit the low level hardware */
804
    hadc->MspDeInitCallback(hadc);
805
#else
806
    /* DeInit the low level hardware */
807
    HAL_ADC_MspDeInit(hadc);
808
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
809
 
810
    /* Set ADC error code to none */
811
    ADC_CLEAR_ERRORCODE(hadc);
812
 
813
    /* Set ADC state */
814
    hadc->State = HAL_ADC_STATE_RESET;
815
 
816
  }
817
 
818
  /* Process unlocked */
819
  __HAL_UNLOCK(hadc);
820
 
821
  /* Return function status */
822
  return tmp_hal_status;
823
}
824
 
825
/**
826
  * @brief  Initializes the ADC MSP.
827
  * @param  hadc ADC handle
828
  * @retval None
829
  */
830
__weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
831
{
832
  /* Prevent unused argument(s) compilation warning */
833
  UNUSED(hadc);
834
 
835
  /* NOTE : This function should not be modified. When the callback is needed,
836
            function HAL_ADC_MspInit must be implemented in the user file.
837
   */
838
}
839
 
840
/**
841
  * @brief  DeInitializes the ADC MSP.
842
  * @param  hadc ADC handle
843
  * @retval None
844
  */
845
__weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
846
{
847
  /* Prevent unused argument(s) compilation warning */
848
  UNUSED(hadc);
849
 
850
  /* NOTE : This function should not be modified. When the callback is needed,
851
            function HAL_ADC_MspDeInit must be implemented in the user file.
852
   */
853
}
854
 
855
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
856
/**
857
  * @brief  Register a User ADC Callback
858
  *         To be used instead of the weak predefined callback
859
  * @param  hadc Pointer to a ADC_HandleTypeDef structure that contains
860
  *                the configuration information for the specified ADC.
861
  * @param  CallbackID ID of the callback to be registered
862
  *         This parameter can be one of the following values:
863
  *          @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID      ADC conversion complete callback ID
864
  *          @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID          ADC conversion complete callback ID
865
  *          @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID    ADC analog watchdog 1 callback ID
866
  *          @arg @ref HAL_ADC_ERROR_CB_ID                    ADC error callback ID
867
  *          @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID  ADC group injected conversion complete callback ID
868
  *          @arg @ref HAL_ADC_MSPINIT_CB_ID                  ADC Msp Init callback ID
869
  *          @arg @ref HAL_ADC_MSPDEINIT_CB_ID                ADC Msp DeInit callback ID
870
  *          @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
871
  *          @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
872
  * @param  pCallback pointer to the Callback function
873
  * @retval HAL status
874
  */
875
HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID, pADC_CallbackTypeDef pCallback)
876
{
877
  HAL_StatusTypeDef status = HAL_OK;
878
 
879
  if (pCallback == NULL)
880
  {
881
    /* Update the error code */
882
    hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
883
 
884
    return HAL_ERROR;
885
  }
886
 
887
  if ((hadc->State & HAL_ADC_STATE_READY) != 0)
888
  {
889
    switch (CallbackID)
890
    {
891
      case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
892
        hadc->ConvCpltCallback = pCallback;
893
        break;
894
 
895
      case HAL_ADC_CONVERSION_HALF_CB_ID :
896
        hadc->ConvHalfCpltCallback = pCallback;
897
        break;
898
 
899
      case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
900
        hadc->LevelOutOfWindowCallback = pCallback;
901
        break;
902
 
903
      case HAL_ADC_ERROR_CB_ID :
904
        hadc->ErrorCallback = pCallback;
905
        break;
906
 
907
      case HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID :
908
        hadc->InjectedConvCpltCallback = pCallback;
909
        break;
910
 
911
      case HAL_ADC_MSPINIT_CB_ID :
912
        hadc->MspInitCallback = pCallback;
913
        break;
914
 
915
      case HAL_ADC_MSPDEINIT_CB_ID :
916
        hadc->MspDeInitCallback = pCallback;
917
        break;
918
 
919
      default :
920
        /* Update the error code */
921
        hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
922
 
923
        /* Return error status */
924
        status = HAL_ERROR;
925
        break;
926
    }
927
  }
928
  else if (HAL_ADC_STATE_RESET == hadc->State)
929
  {
930
    switch (CallbackID)
931
    {
932
      case HAL_ADC_MSPINIT_CB_ID :
933
        hadc->MspInitCallback = pCallback;
934
        break;
935
 
936
      case HAL_ADC_MSPDEINIT_CB_ID :
937
        hadc->MspDeInitCallback = pCallback;
938
        break;
939
 
940
      default :
941
        /* Update the error code */
942
        hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
943
 
944
        /* Return error status */
945
        status = HAL_ERROR;
946
        break;
947
    }
948
  }
949
  else
950
  {
951
    /* Update the error code */
952
    hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
953
 
954
    /* Return error status */
955
    status =  HAL_ERROR;
956
  }
957
 
958
  return status;
959
}
960
 
961
/**
962
  * @brief  Unregister a ADC Callback
963
  *         ADC callback is redirected to the weak predefined callback
964
  * @param  hadc Pointer to a ADC_HandleTypeDef structure that contains
965
  *                the configuration information for the specified ADC.
966
  * @param  CallbackID ID of the callback to be unregistered
967
  *         This parameter can be one of the following values:
968
  *          @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID      ADC conversion complete callback ID
969
  *          @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID          ADC conversion complete callback ID
970
  *          @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID    ADC analog watchdog 1 callback ID
971
  *          @arg @ref HAL_ADC_ERROR_CB_ID                    ADC error callback ID
972
  *          @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID  ADC group injected conversion complete callback ID
973
  *          @arg @ref HAL_ADC_MSPINIT_CB_ID                  ADC Msp Init callback ID
974
  *          @arg @ref HAL_ADC_MSPDEINIT_CB_ID                ADC Msp DeInit callback ID
975
  *          @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
976
  *          @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
977
  * @retval HAL status
978
  */
979
HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID)
980
{
981
  HAL_StatusTypeDef status = HAL_OK;
982
 
983
  if ((hadc->State & HAL_ADC_STATE_READY) != 0)
984
  {
985
    switch (CallbackID)
986
    {
987
      case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
988
        hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback;
989
        break;
990
 
991
      case HAL_ADC_CONVERSION_HALF_CB_ID :
992
        hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback;
993
        break;
994
 
995
      case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
996
        hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback;
997
        break;
998
 
999
      case HAL_ADC_ERROR_CB_ID :
1000
        hadc->ErrorCallback = HAL_ADC_ErrorCallback;
1001
        break;
1002
 
1003
      case HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID :
1004
        hadc->InjectedConvCpltCallback = HAL_ADCEx_InjectedConvCpltCallback;
1005
        break;
1006
 
1007
      case HAL_ADC_MSPINIT_CB_ID :
1008
        hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit              */
1009
        break;
1010
 
1011
      case HAL_ADC_MSPDEINIT_CB_ID :
1012
        hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit            */
1013
        break;
1014
 
1015
      default :
1016
        /* Update the error code */
1017
        hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
1018
 
1019
        /* Return error status */
1020
        status =  HAL_ERROR;
1021
        break;
1022
    }
1023
  }
1024
  else if (HAL_ADC_STATE_RESET == hadc->State)
1025
  {
1026
    switch (CallbackID)
1027
    {
1028
      case HAL_ADC_MSPINIT_CB_ID :
1029
        hadc->MspInitCallback = HAL_ADC_MspInit;                   /* Legacy weak MspInit              */
1030
        break;
1031
 
1032
      case HAL_ADC_MSPDEINIT_CB_ID :
1033
        hadc->MspDeInitCallback = HAL_ADC_MspDeInit;               /* Legacy weak MspDeInit            */
1034
        break;
1035
 
1036
      default :
1037
        /* Update the error code */
1038
        hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
1039
 
1040
        /* Return error status */
1041
        status =  HAL_ERROR;
1042
        break;
1043
    }
1044
  }
1045
  else
1046
  {
1047
    /* Update the error code */
1048
    hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
1049
 
1050
    /* Return error status */
1051
    status =  HAL_ERROR;
1052
  }
1053
 
1054
  return status;
1055
}
1056
 
1057
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1058
 
1059
/**
1060
  * @}
1061
  */
1062
 
1063
/** @defgroup ADC_Exported_Functions_Group2 ADC Input and Output operation functions
1064
 *  @brief    ADC IO operation functions
1065
 *
1066
@verbatim  
1067
 ===============================================================================
1068
                      ##### IO operation functions #####
1069
 ===============================================================================
1070
    [..]  This section provides functions allowing to:
1071
      (+) Start conversion of regular group.
1072
      (+) Stop conversion of regular group.
1073
      (+) Poll for conversion complete on regular group.
1074
      (+) Poll for conversion event.
1075
      (+) Get result of regular channel conversion.
1076
      (+) Start conversion of regular group and enable interruptions.
1077
      (+) Stop conversion of regular group and disable interruptions.
1078
      (+) Handle ADC interrupt request
1079
      (+) Start conversion of regular group and enable DMA transfer.
1080
      (+) Stop conversion of regular group and disable ADC DMA transfer.
1081
@endverbatim
1082
  * @{
1083
  */
1084
 
1085
/**
1086
  * @brief  Enables ADC, starts conversion of regular group.
1087
  *         Interruptions enabled in this function: None.
1088
  * @param  hadc ADC handle
1089
  * @retval HAL status
1090
  */
1091
HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
1092
{
1093
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1094
 
1095
  /* Check the parameters */
1096
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1097
 
1098
  /* Process locked */
1099
  __HAL_LOCK(hadc);
1100
 
1101
  /* Enable the ADC peripheral */
1102
  tmp_hal_status = ADC_Enable(hadc);
1103
 
1104
  /* Start conversion if ADC is effectively enabled */
1105
  if (tmp_hal_status == HAL_OK)
1106
  {
1107
    /* Set ADC state                                                          */
1108
    /* - Clear state bitfield related to regular group conversion results     */
1109
    /* - Set state bitfield related to regular group operation                */
1110
    ADC_STATE_CLR_SET(hadc->State,
1111
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR,
1112
                      HAL_ADC_STATE_REG_BUSY);
1113
 
1114
    /* If conversions on group regular are also triggering group injected,    */
1115
    /* update ADC state.                                                      */
1116
    if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
1117
    {
1118
      ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
1119
    }
1120
 
1121
    /* State machine update: Check if an injected conversion is ongoing */
1122
    if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
1123
    {
1124
      /* Reset ADC error code fields related to conversions on group regular */
1125
      CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));        
1126
    }
1127
    else
1128
    {
1129
      /* Reset ADC all error code fields */
1130
      ADC_CLEAR_ERRORCODE(hadc);
1131
    }
1132
 
1133
    /* Process unlocked */
1134
    /* Unlock before starting ADC conversions: in case of potential           */
1135
    /* interruption, to let the process to ADC IRQ Handler.                   */
1136
    __HAL_UNLOCK(hadc);
1137
 
1138
    /* Clear regular group conversion flag and overrun flag */
1139
    /* (To ensure of no unknown state from potential previous ADC operations) */
1140
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC | ADC_FLAG_OVR);
1141
 
1142
    /* Enable conversion of regular group.                                    */
1143
    /* If software start has been selected, conversion starts immediately.    */
1144
    /* If external trigger has been selected, conversion will start at next   */
1145
    /* trigger event.                                                         */
1146
    if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
1147
    {
1148
      /* Start ADC conversion on regular group */
1149
      SET_BIT(hadc->Instance->CR2, ADC_CR2_SWSTART);
1150
    }
1151
  }
1152
 
1153
  /* Return function status */
1154
  return tmp_hal_status;
1155
}
1156
 
1157
/**
1158
  * @brief  Stop ADC conversion of regular group (and injected channels in
1159
  *         case of auto_injection mode), disable ADC peripheral.
1160
  * @note:  ADC peripheral disable is forcing stop of potential
1161
  *         conversion on injected group. If injected group is under use, it
1162
  *         should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
1163
  * @param  hadc ADC handle
1164
  * @retval HAL status.
1165
  */
1166
HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
1167
{
1168
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1169
 
1170
  /* Check the parameters */
1171
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1172
 
1173
  /* Process locked */
1174
  __HAL_LOCK(hadc);
1175
 
1176
  /* Stop potential conversion on going, on regular and injected groups */
1177
  /* Disable ADC peripheral */
1178
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
1179
 
1180
  /* Check if ADC is effectively disabled */
1181
  if (tmp_hal_status == HAL_OK)
1182
  {
1183
    /* Set ADC state */
1184
    ADC_STATE_CLR_SET(hadc->State,
1185
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
1186
                      HAL_ADC_STATE_READY);
1187
  }
1188
 
1189
  /* Process unlocked */
1190
  __HAL_UNLOCK(hadc);
1191
 
1192
  /* Return function status */
1193
  return tmp_hal_status;
1194
}
1195
 
1196
/**
1197
  * @brief  Wait for regular group conversion to be completed.
1198
  * @note   ADC conversion flags EOS (end of sequence) and EOC (end of
1199
  *         conversion) are cleared by this function, with an exception:
1200
  *         if low power feature "LowPowerAutoWait" is enabled, flags are
1201
  *         not cleared to not interfere with this feature until data register
1202
  *         is read using function HAL_ADC_GetValue().
1203
  * @note   This function cannot be used in a particular setup: ADC configured
1204
  *         in DMA mode and polling for end of each conversion (ADC init
1205
  *         parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV).
1206
  *         In this case, DMA resets the flag EOC and polling cannot be
1207
  *         performed on each conversion. Nevertheless, polling can still
1208
  *         be performed on the complete sequence (ADC init
1209
  *         parameter "EOCSelection" set to ADC_EOC_SEQ_CONV).
1210
  * @param  hadc ADC handle
1211
  * @param  Timeout Timeout value in millisecond.
1212
  * @retval HAL status
1213
  */
1214
HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
1215
{
1216
  uint32_t tickstart = 0;
1217
 
1218
  /* Check the parameters */
1219
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1220
 
1221
  /* Verification that ADC configuration is compliant with polling for      */
1222
  /* each conversion:                                                       */
1223
  /* Particular case is ADC configured in DMA mode and ADC sequencer with   */
1224
  /* several ranks and polling for end of each conversion.                  */
1225
  /* For code simplicity sake, this particular case is generalized to       */
1226
  /* ADC configured in DMA mode and and polling for end of each conversion. */
1227
  if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_EOCS) &&
1228
      HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA)    )
1229
  {
1230
    /* Update ADC state machine to error */
1231
    SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1232
 
1233
    /* Process unlocked */
1234
    __HAL_UNLOCK(hadc);
1235
 
1236
    return HAL_ERROR;
1237
  }
1238
 
1239
  /* Get tick count */
1240
  tickstart = HAL_GetTick();
1241
 
1242
  /* Wait until End of Conversion flag is raised */
1243
  while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC))
1244
  {
1245
    /* Check if timeout is disabled (set to infinite wait) */
1246
    if(Timeout != HAL_MAX_DELAY)
1247
    {
1248
      if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
1249
      {
61 mjames 1250
        /* New check to avoid false timeout detection in case of preemption */
1251
        if(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC))
1252
        {
1253
          /* Update ADC state machine to timeout */
1254
          SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1255
 
1256
          /* Process unlocked */
1257
          __HAL_UNLOCK(hadc);
1258
 
1259
          return HAL_TIMEOUT;
1260
        }
56 mjames 1261
      }
1262
    }
1263
  }
1264
 
1265
  /* Clear end of conversion flag of regular group if low power feature     */
1266
  /* "Auto Wait" is disabled, to not interfere with this feature until data */
1267
  /* register is read using function HAL_ADC_GetValue().                    */
1268
  if (hadc->Init.LowPowerAutoWait == DISABLE)
1269
  {
1270
    /* Clear regular group conversion flag */
1271
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
1272
  }
1273
 
1274
  /* Update ADC state machine */
1275
  SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
1276
 
1277
  /* Determine whether any further conversion upcoming on group regular       */
1278
  /* by external trigger, continuous mode or scan sequence on going.          */
1279
  /* Note: On STM32L1, there is no independent flag of end of sequence.       */
1280
  /*       The test of scan sequence on going is done either with scan        */
1281
  /*       sequence disabled or with end of conversion flag set to            */
1282
  /*       of end of sequence.                                                */
1283
  if(ADC_IS_SOFTWARE_START_REGULAR(hadc)                   &&
1284
     (hadc->Init.ContinuousConvMode == DISABLE)            &&
1285
     (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
1286
      HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS)  )   )
1287
  {
1288
    /* Set ADC state */
1289
    CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);  
1290
 
1291
    if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
1292
    {
1293
      SET_BIT(hadc->State, HAL_ADC_STATE_READY);
1294
    }
1295
  }
1296
 
1297
  /* Return ADC state */
1298
  return HAL_OK;
1299
}
1300
 
1301
/**
1302
  * @brief  Poll for conversion event.
1303
  * @param  hadc ADC handle
1304
  * @param  EventType the ADC event type.
1305
  *          This parameter can be one of the following values:
1306
  *            @arg ADC_AWD_EVENT: ADC Analog watchdog event.
1307
  *            @arg ADC_OVR_EVENT: ADC Overrun event.
1308
  * @param  Timeout Timeout value in millisecond.
1309
  * @retval HAL status
1310
  */
1311
HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
1312
{
1313
  uint32_t tickstart = 0;
1314
 
1315
  /* Check the parameters */
1316
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1317
  assert_param(IS_ADC_EVENT_TYPE(EventType));
1318
 
1319
  /* Get tick count */
1320
  tickstart = HAL_GetTick();
1321
 
1322
  /* Check selected event flag */
1323
  while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
1324
  {
1325
    /* Check if timeout is disabled (set to infinite wait) */
1326
    if(Timeout != HAL_MAX_DELAY)
1327
    {
1328
      if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
1329
      {
61 mjames 1330
        /* New check to avoid false timeout detection in case of preemption */
1331
        if(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
1332
        {
1333
          /* Update ADC state machine to timeout */
1334
          SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1335
 
1336
          /* Process unlocked */
1337
          __HAL_UNLOCK(hadc);
1338
 
1339
          return HAL_TIMEOUT;
1340
        }
56 mjames 1341
      }
1342
    }
1343
  }
1344
 
1345
  switch(EventType)
1346
  {
1347
  /* Analog watchdog (level out of window) event */
1348
  case ADC_AWD_EVENT:
1349
    /* Set ADC state */
1350
    SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
1351
 
1352
    /* Clear ADC analog watchdog flag */
1353
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
1354
    break;
1355
 
1356
  /* Overrun event */
1357
  default: /* Case ADC_OVR_EVENT */
1358
    /* Note: On STM32L1, ADC overrun can be set through other parameters      */
1359
    /*       refer to description of parameter "EOCSelection" for more        */
1360
    /*       details.                                                         */
1361
 
1362
    /* Set ADC state */
1363
    SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR);
1364
    /* Set ADC error code to overrun */
1365
    SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
1366
 
1367
    /* Clear ADC overrun flag */
1368
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
1369
    break;
1370
  }
1371
 
1372
  /* Return ADC state */
1373
  return HAL_OK;
1374
}
1375
 
1376
/**
1377
  * @brief  Enables ADC, starts conversion of regular group with interruption.
1378
  *         Interruptions enabled in this function:
1379
  *          - EOC (end of conversion of regular group)
1380
  *          - overrun
1381
  *         Each of these interruptions has its dedicated callback function.
1382
  * @param  hadc ADC handle
1383
  * @retval HAL status
1384
  */
1385
HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
1386
{
1387
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1388
 
1389
  /* Check the parameters */
1390
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1391
 
1392
  /* Process locked */
1393
  __HAL_LOCK(hadc);
1394
 
1395
  /* Enable the ADC peripheral */
1396
  tmp_hal_status = ADC_Enable(hadc);
1397
 
1398
  /* Start conversion if ADC is effectively enabled */
1399
  if (tmp_hal_status == HAL_OK)
1400
  {
1401
    /* Set ADC state                                                          */
1402
    /* - Clear state bitfield related to regular group conversion results     */
1403
    /* - Set state bitfield related to regular group operation                */
1404
    ADC_STATE_CLR_SET(hadc->State,
1405
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR,
1406
                      HAL_ADC_STATE_REG_BUSY);
1407
 
1408
    /* If conversions on group regular are also triggering group injected,    */
1409
    /* update ADC state.                                                      */
1410
    if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
1411
    {
1412
      ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
1413
    }
1414
 
1415
    /* State machine update: Check if an injected conversion is ongoing */
1416
    if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
1417
    {
1418
      /* Reset ADC error code fields related to conversions on group regular */
1419
      CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));        
1420
    }
1421
    else
1422
    {
1423
      /* Reset ADC all error code fields */
1424
      ADC_CLEAR_ERRORCODE(hadc);
1425
    }
1426
 
1427
    /* Process unlocked */
1428
    /* Unlock before starting ADC conversions: in case of potential           */
1429
    /* interruption, to let the process to ADC IRQ Handler.                   */
1430
    __HAL_UNLOCK(hadc);
1431
 
1432
    /* Clear regular group conversion flag and overrun flag */
1433
    /* (To ensure of no unknown state from potential previous ADC operations) */
1434
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC | ADC_FLAG_OVR);
1435
 
1436
    /* Enable end of conversion interrupt for regular group */
1437
    __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_OVR));
1438
 
1439
    /* Enable conversion of regular group.                                    */
1440
    /* If software start has been selected, conversion starts immediately.    */
1441
    /* If external trigger has been selected, conversion will start at next   */
1442
    /* trigger event.                                                         */
1443
    if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
1444
    {
1445
      /* Start ADC conversion on regular group */
1446
      SET_BIT(hadc->Instance->CR2, ADC_CR2_SWSTART);
1447
    }
1448
  }
1449
 
1450
  /* Return function status */
1451
  return tmp_hal_status;
1452
}
1453
 
1454
/**
1455
  * @brief  Stop ADC conversion of regular group (and injected group in
1456
  *         case of auto_injection mode), disable interrution of
1457
  *         end-of-conversion, disable ADC peripheral.
1458
  * @param  hadc ADC handle
1459
  * @retval None
1460
  */
1461
HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
1462
{
1463
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1464
 
1465
  /* Check the parameters */
1466
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1467
 
1468
  /* Process locked */
1469
  __HAL_LOCK(hadc);
1470
 
1471
  /* Stop potential conversion on going, on regular and injected groups */
1472
  /* Disable ADC peripheral */
1473
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
1474
 
1475
  /* Check if ADC is effectively disabled */
1476
  if (tmp_hal_status == HAL_OK)
1477
  {
1478
    /* Disable ADC end of conversion interrupt for regular group */
1479
    __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
1480
 
1481
    /* Set ADC state */
1482
    ADC_STATE_CLR_SET(hadc->State,
1483
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
1484
                      HAL_ADC_STATE_READY);
1485
  }
1486
 
1487
  /* Process unlocked */
1488
  __HAL_UNLOCK(hadc);
1489
 
1490
  /* Return function status */
1491
  return tmp_hal_status;
1492
}
1493
 
1494
/**
1495
  * @brief  Enables ADC, starts conversion of regular group and transfers result
1496
  *         through DMA.
1497
  *         Interruptions enabled in this function:
1498
  *          - DMA transfer complete
1499
  *          - DMA half transfer
1500
  *          - overrun
1501
  *         Each of these interruptions has its dedicated callback function.
1502
  * @param  hadc ADC handle
1503
  * @param  pData The destination Buffer address.
1504
  * @param  Length The length of data to be transferred from ADC peripheral to memory.
1505
  * @retval None
1506
  */
1507
HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
1508
{
1509
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1510
 
1511
  /* Check the parameters */
1512
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1513
 
1514
  /* Process locked */
1515
  __HAL_LOCK(hadc);
1516
 
1517
  /* Enable the ADC peripheral */
1518
  tmp_hal_status = ADC_Enable(hadc);
1519
 
1520
  /* Start conversion if ADC is effectively enabled */
1521
  if (tmp_hal_status == HAL_OK)
1522
  {
1523
    /* Set ADC state                                                          */
1524
    /* - Clear state bitfield related to regular group conversion results     */
1525
    /* - Set state bitfield related to regular group operation                */
1526
    ADC_STATE_CLR_SET(hadc->State,
1527
                      HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR,
1528
                      HAL_ADC_STATE_REG_BUSY);
1529
 
1530
    /* If conversions on group regular are also triggering group injected,    */
1531
    /* update ADC state.                                                      */
1532
    if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
1533
    {
1534
      ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);  
1535
    }
1536
 
1537
    /* State machine update: Check if an injected conversion is ongoing */
1538
    if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
1539
    {
1540
      /* Reset ADC error code fields related to conversions on group regular */
1541
      CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));        
1542
    }
1543
    else
1544
    {
1545
      /* Reset ADC all error code fields */
1546
      ADC_CLEAR_ERRORCODE(hadc);
1547
    }
1548
 
1549
    /* Process unlocked */
1550
    /* Unlock before starting ADC conversions: in case of potential           */
1551
    /* interruption, to let the process to ADC IRQ Handler.                   */
1552
    __HAL_UNLOCK(hadc);
1553
 
1554
    /* Set the DMA transfer complete callback */
1555
    hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
1556
 
1557
    /* Set the DMA half transfer complete callback */
1558
    hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
1559
 
1560
    /* Set the DMA error callback */
1561
    hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
1562
 
1563
 
1564
    /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC     */
1565
    /* start (in case of SW start):                                           */
1566
 
1567
    /* Clear regular group conversion flag and overrun flag */
1568
    /* (To ensure of no unknown state from potential previous ADC operations) */
1569
    __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC | ADC_FLAG_OVR);
1570
 
1571
    /* Enable ADC overrun interrupt */
1572
    __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
1573
 
1574
    /* Enable ADC DMA mode */
1575
    hadc->Instance->CR2 |= ADC_CR2_DMA;
1576
 
1577
    /* Start the DMA channel */
1578
    HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
1579
 
1580
    /* Enable conversion of regular group.                                    */
1581
    /* If software start has been selected, conversion starts immediately.    */
1582
    /* If external trigger has been selected, conversion will start at next   */
1583
    /* trigger event.                                                         */
1584
    /* Note: Alternate trigger for single conversion could be to force an     */
1585
    /*       additional set of bit ADON "hadc->Instance->CR2 |= ADC_CR2_ADON;"*/
1586
    if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
1587
    {
1588
      /* Start ADC conversion on regular group */
1589
      SET_BIT(hadc->Instance->CR2, ADC_CR2_SWSTART);
1590
    }
1591
  }
1592
 
1593
  /* Return function status */
1594
  return tmp_hal_status;
1595
}
1596
 
1597
/**
1598
  * @brief  Stop ADC conversion of regular group (and injected group in
1599
  *         case of auto_injection mode), disable ADC DMA transfer, disable
1600
  *         ADC peripheral.
1601
  * @note:  ADC peripheral disable is forcing stop of potential
1602
  *         conversion on injected group. If injected group is under use, it
1603
  *         should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
1604
  * @param  hadc ADC handle
1605
  * @retval HAL status.
1606
  */
1607
HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
1608
{
1609
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1610
 
1611
  /* Check the parameters */
1612
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1613
 
1614
  /* Process locked */
1615
  __HAL_LOCK(hadc);
1616
 
1617
  /* Stop potential conversion on going, on regular and injected groups */
1618
  /* Disable ADC peripheral */
1619
  tmp_hal_status = ADC_ConversionStop_Disable(hadc);
1620
 
1621
  /* Check if ADC is effectively disabled */
1622
  if (tmp_hal_status == HAL_OK)
1623
  {
1624
    /* Disable ADC DMA mode */
1625
    hadc->Instance->CR2 &= ~ADC_CR2_DMA;
1626
 
1627
    /* Disable the DMA channel (in case of DMA in circular mode or stop while */
1628
    /* DMA transfer is on going)                                              */
61 mjames 1629
    if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY)
1630
    {
1631
      HAL_DMA_Abort(hadc->DMA_Handle);
1632
 
1633
      /* Check if DMA channel effectively disabled */
1634
      if (tmp_hal_status != HAL_OK)
1635
      {
1636
        /* Update ADC state machine to error */
1637
        SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1638
      }
1639
    }
56 mjames 1640
 
1641
    /* Set ADC state */
1642
    ADC_STATE_CLR_SET(hadc->State,
1643
                      HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
1644
                      HAL_ADC_STATE_READY);
1645
 
1646
    /* Disable ADC overrun interrupt */
1647
    __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1648
  }
1649
 
1650
  /* Process unlocked */
1651
  __HAL_UNLOCK(hadc);
1652
 
1653
  /* Return function status */
1654
  return tmp_hal_status;
1655
}
1656
 
1657
/**
1658
  * @brief  Get ADC regular group conversion result.
1659
  * @note   Reading register DR automatically clears ADC flag EOC
1660
  *         (ADC group regular end of unitary conversion).
1661
  * @note   This function does not clear ADC flag EOS
1662
  *         (ADC group regular end of sequence conversion).
1663
  *         Occurrence of flag EOS rising:
1664
  *          - If sequencer is composed of 1 rank, flag EOS is equivalent
1665
  *            to flag EOC.
1666
  *          - If sequencer is composed of several ranks, during the scan
1667
  *            sequence flag EOC only is raised, at the end of the scan sequence
1668
  *            both flags EOC and EOS are raised.
1669
  *         To clear this flag, either use function:
1670
  *         in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
1671
  *         model polling: @ref HAL_ADC_PollForConversion()
1672
  *         or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS).
1673
  * @param  hadc ADC handle
1674
  * @retval ADC group regular conversion data
1675
  */
1676
uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
1677
{
1678
  /* Check the parameters */
1679
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1680
 
1681
  /* Note: EOC flag is not cleared here by software because automatically     */
1682
  /*       cleared by hardware when reading register DR.                      */
1683
 
1684
  /* Return ADC converted value */
1685
  return hadc->Instance->DR;
1686
}
1687
 
1688
/**
1689
  * @brief  Handles ADC interrupt request  
1690
  * @param  hadc ADC handle
1691
  * @retval None
1692
  */
1693
void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
1694
{
1695
  /* Check the parameters */
1696
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1697
  assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
1698
  assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion));
1699
 
1700
 
1701
  /* ========== Check End of Conversion flag for regular group ========== */
1702
  if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC))
1703
  {
1704
    if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) )
1705
    {
1706
      /* Update state machine on conversion status if not in error state */
1707
      if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
1708
      {
1709
        /* Set ADC state */
1710
        SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
1711
      }
1712
 
1713
      /* Determine whether any further conversion upcoming on group regular   */
1714
      /* by external trigger, continuous mode or scan sequence on going.      */
1715
      /* Note: On STM32L1, there is no independent flag of end of sequence.   */
1716
      /*       The test of scan sequence on going is done either with scan    */
1717
      /*       sequence disabled or with end of conversion flag set to        */
1718
      /*       of end of sequence.                                            */
1719
      if(ADC_IS_SOFTWARE_START_REGULAR(hadc)                   &&
1720
         (hadc->Init.ContinuousConvMode == DISABLE)            &&
1721
         (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
1722
          HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS)  )   )
1723
      {
1724
        /* Disable ADC end of single conversion interrupt on group regular */
1725
        /* Note: Overrun interrupt was enabled with EOC interrupt in          */
1726
        /* HAL_ADC_Start_IT(), but is not disabled here because can be used   */
1727
        /* by overrun IRQ process below.                                      */
1728
        __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
1729
 
1730
        /* Set ADC state */
1731
        CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1732
 
1733
        if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
1734
        {
1735
          SET_BIT(hadc->State, HAL_ADC_STATE_READY);
1736
        }
1737
      }
1738
 
1739
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1740
      hadc->ConvCpltCallback(hadc);
1741
#else
1742
      HAL_ADC_ConvCpltCallback(hadc);
1743
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1744
 
1745
      /* Clear regular group conversion flag */
1746
      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
1747
    }
1748
  }
1749
 
1750
  /* ========== Check End of Conversion flag for injected group ========== */
1751
  if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC))
1752
  {
1753
    if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC))
1754
    {
1755
      /* Update state machine on conversion status if not in error state */
1756
      if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
1757
      {
1758
        /* Set ADC state */
1759
        SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
1760
      }
1761
 
1762
      /* Determine whether any further conversion upcoming on group injected  */
1763
      /* by external trigger, scan sequence on going or by automatic injected */
1764
      /* conversion from group regular (same conditions as group regular      */
1765
      /* interruption disabling above).                                       */
1766
      if(ADC_IS_SOFTWARE_START_INJECTED(hadc)                    &&
1767
         (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL)  ||
1768
          HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS)    ) &&
1769
         (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
1770
          (ADC_IS_SOFTWARE_START_REGULAR(hadc)       &&
1771
          (hadc->Init.ContinuousConvMode == DISABLE)   )       )   )
1772
      {
1773
        /* Disable ADC end of single conversion interrupt on group injected */
1774
        __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
1775
 
1776
        /* Set ADC state */
1777
        CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);  
1778
 
1779
        if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
1780
        {
1781
          SET_BIT(hadc->State, HAL_ADC_STATE_READY);
1782
        }
1783
      }
1784
 
1785
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1786
      hadc->InjectedConvCpltCallback(hadc);
1787
#else
1788
      HAL_ADCEx_InjectedConvCpltCallback(hadc);
1789
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1790
 
1791
      /* Clear injected group conversion flag */
1792
      __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JSTRT | ADC_FLAG_JEOC));
1793
    }
1794
  }
1795
 
1796
  /* ========== Check Analog watchdog flags ========== */
1797
  if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD))
1798
  {
1799
    if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD))
1800
    {
1801
      /* Set ADC state */
1802
      SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
1803
 
1804
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1805
      hadc->LevelOutOfWindowCallback(hadc);
1806
#else
1807
      HAL_ADC_LevelOutOfWindowCallback(hadc);
1808
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1809
 
1810
      /* Clear the ADC analog watchdog flag */
1811
      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
1812
    }
1813
  }
1814
 
1815
  /* ========== Check Overrun flag ========== */
1816
  if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR))
1817
  {
1818
    if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR))
1819
    {
1820
      /* Note: On STM32L1, ADC overrun can be set through other parameters    */
1821
      /*       refer to description of parameter "EOCSelection" for more      */
1822
      /*       details.                                                       */
1823
 
1824
      /* Set ADC error code to overrun */
1825
      SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
1826
 
1827
      /* Clear ADC overrun flag */
1828
      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
1829
 
1830
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1831
      hadc->ErrorCallback(hadc);
1832
#else
1833
      HAL_ADC_ErrorCallback(hadc);
1834
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1835
 
1836
      /* Clear the Overrun flag */
1837
      __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
1838
    }
1839
  }
1840
 
1841
}
1842
 
1843
/**
1844
  * @brief  Conversion complete callback in non blocking mode
1845
  * @param  hadc ADC handle
1846
  * @retval None
1847
  */
1848
__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
1849
{
1850
  /* Prevent unused argument(s) compilation warning */
1851
  UNUSED(hadc);
1852
 
1853
  /* NOTE : This function should not be modified. When the callback is needed,
1854
            function HAL_ADC_ConvCpltCallback must be implemented in the user file.
1855
   */
1856
}
1857
 
1858
/**
1859
  * @brief  Conversion DMA half-transfer callback in non blocking mode
1860
  * @param  hadc ADC handle
1861
  * @retval None
1862
  */
1863
__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
1864
{
1865
  /* Prevent unused argument(s) compilation warning */
1866
  UNUSED(hadc);
1867
 
1868
  /* NOTE : This function should not be modified. When the callback is needed,
1869
            function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
1870
  */
1871
}
1872
 
1873
/**
1874
  * @brief  Analog watchdog callback in non blocking mode.
1875
  * @param  hadc ADC handle
1876
  * @retval None
1877
  */
1878
__weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
1879
{
1880
  /* Prevent unused argument(s) compilation warning */
1881
  UNUSED(hadc);
1882
 
1883
  /* NOTE : This function should not be modified. When the callback is needed,
1884
            function HAL_ADC_LevelOutOfWindowCallback must be implemented in the user file.
1885
  */
1886
}
1887
 
1888
/**
1889
  * @brief  ADC error callback in non blocking mode
1890
  *         (ADC conversion with interruption or transfer by DMA)
1891
  * @note   In case of error due to overrun when using ADC with DMA transfer
1892
  *         (HAL ADC handle paramater "ErrorCode" to state "HAL_ADC_ERROR_OVR"):
1893
  *         - Reinitialize the DMA using function "HAL_ADC_Stop_DMA()".
1894
  *         - If needed, restart a new ADC conversion using function
1895
  *           "HAL_ADC_Start_DMA()"
1896
  *           (this function is also clearing overrun flag)
1897
  * @param  hadc ADC handle
1898
  * @retval None
1899
  */
1900
__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
1901
{
1902
  /* Prevent unused argument(s) compilation warning */
1903
  UNUSED(hadc);
1904
 
1905
  /* NOTE : This function should not be modified. When the callback is needed,
1906
            function HAL_ADC_ErrorCallback must be implemented in the user file.
1907
  */
1908
}
1909
 
1910
 
1911
/**
1912
  * @}
1913
  */
1914
 
1915
/** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
1916
 *  @brief    Peripheral Control functions
1917
 *
1918
@verbatim  
1919
 ===============================================================================
1920
             ##### Peripheral Control functions #####
1921
 ===============================================================================  
1922
    [..]  This section provides functions allowing to:
1923
      (+) Configure channels on regular group
1924
      (+) Configure the analog watchdog
1925
 
1926
@endverbatim
1927
  * @{
1928
  */
1929
 
1930
/**
1931
  * @brief  Configures the the selected channel to be linked to the regular
1932
  *         group.
1933
  * @note   In case of usage of internal measurement channels:
1934
  *         Vbat/VrefInt/TempSensor.
1935
  *         These internal paths can be be disabled using function
1936
  *         HAL_ADC_DeInit().
1937
  * @note   Possibility to update parameters on the fly:
1938
  *         This function initializes channel into regular group, following  
1939
  *         calls to this function can be used to reconfigure some parameters
1940
  *         of structure "ADC_ChannelConfTypeDef" on the fly, without reseting
1941
  *         the ADC.
1942
  *         The setting of these parameters is conditioned to ADC state.
1943
  *         For parameters constraints, see comments of structure
1944
  *         "ADC_ChannelConfTypeDef".
1945
  * @param  hadc ADC handle
1946
  * @param  sConfig Structure of ADC channel for regular group.
1947
  * @retval HAL status
1948
  */
1949
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
1950
{
1951
  HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1952
  __IO uint32_t wait_loop_index = 0;
1953
 
1954
  /* Check the parameters */
1955
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1956
  assert_param(IS_ADC_CHANNEL(sConfig->Channel));
1957
  assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
1958
  assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
1959
 
1960
  /* Process locked */
1961
  __HAL_LOCK(hadc);
1962
 
1963
 
1964
  /* Regular sequence configuration */
1965
  /* For Rank 1 to 6 */
1966
  if (sConfig->Rank < 7)
1967
  {
1968
    MODIFY_REG(hadc->Instance->SQR5,
1969
               ADC_SQR5_RK(ADC_SQR5_SQ1, sConfig->Rank),
1970
               ADC_SQR5_RK(sConfig->Channel, sConfig->Rank) );
1971
  }
1972
  /* For Rank 7 to 12 */
1973
  else if (sConfig->Rank < 13)
1974
  {
1975
    MODIFY_REG(hadc->Instance->SQR4,
1976
               ADC_SQR4_RK(ADC_SQR4_SQ7, sConfig->Rank),
1977
               ADC_SQR4_RK(sConfig->Channel, sConfig->Rank) );
1978
  }
1979
  /* For Rank 13 to 18 */
1980
  else if (sConfig->Rank < 19)
1981
  {
1982
    MODIFY_REG(hadc->Instance->SQR3,
1983
               ADC_SQR3_RK(ADC_SQR3_SQ13, sConfig->Rank),
1984
               ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
1985
  }
1986
  /* For Rank 19 to 24 */
1987
  else if (sConfig->Rank < 25)
1988
  {
1989
    MODIFY_REG(hadc->Instance->SQR2,
1990
               ADC_SQR2_RK(ADC_SQR2_SQ19, sConfig->Rank),
1991
               ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
1992
  }
1993
  /* For Rank 25 to 28 */
1994
  else
1995
  {
1996
    MODIFY_REG(hadc->Instance->SQR1,
1997
               ADC_SQR1_RK(ADC_SQR1_SQ25, sConfig->Rank),
1998
               ADC_SQR1_RK(sConfig->Channel, sConfig->Rank) );
1999
  }
2000
 
2001
 
2002
  /* Channel sampling time configuration */
2003
  /* For channels 0 to 9 */
2004
  if (sConfig->Channel < ADC_CHANNEL_10)
2005
  {
2006
    MODIFY_REG(hadc->Instance->SMPR3,
2007
               ADC_SMPR3(ADC_SMPR3_SMP0, sConfig->Channel),
2008
               ADC_SMPR3(sConfig->SamplingTime, sConfig->Channel) );
2009
  }
2010
  /* For channels 10 to 19 */
2011
  else if (sConfig->Channel < ADC_CHANNEL_20)
2012
  {
2013
    MODIFY_REG(hadc->Instance->SMPR2,
2014
               ADC_SMPR2(ADC_SMPR2_SMP10, sConfig->Channel),
2015
               ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
2016
  }
2017
  /* For channels 20 to 26 for devices Cat.1, Cat.2, Cat.3 */
2018
  /* For channels 20 to 29 for devices Cat4, Cat.5 */
2019
  else if (sConfig->Channel <= ADC_SMPR1_CHANNEL_MAX)
2020
  {
2021
    MODIFY_REG(hadc->Instance->SMPR1,
2022
               ADC_SMPR1(ADC_SMPR1_SMP20, sConfig->Channel),
2023
               ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
2024
  }
2025
  /* For channels 30 to 31 for devices Cat4, Cat.5 */
2026
  else
2027
  {
2028
    ADC_SMPR0_CHANNEL_SET(hadc, sConfig->SamplingTime, sConfig->Channel);
2029
  }
2030
 
2031
  /* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor  */
2032
  /* and VREFINT measurement path.                                            */
2033
  if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
2034
      (sConfig->Channel == ADC_CHANNEL_VREFINT)      )
2035
  {
2036
      if (READ_BIT(ADC->CCR, ADC_CCR_TSVREFE) == RESET)
2037
      {
2038
        SET_BIT(ADC->CCR, ADC_CCR_TSVREFE);
2039
 
61 mjames 2040
        if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
56 mjames 2041
        {
2042
          /* Delay for temperature sensor stabilization time */
2043
          /* Compute number of CPU cycles to wait for */
2044
          wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000));
2045
          while(wait_loop_index != 0)
2046
          {
2047
            wait_loop_index--;
2048
          }
2049
        }
2050
    }
2051
  }
2052
 
2053
  /* Process unlocked */
2054
  __HAL_UNLOCK(hadc);
2055
 
2056
  /* Return function status */
2057
  return tmp_hal_status;
2058
}
2059
 
2060
/**
2061
  * @brief  Configures the analog watchdog.
2062
  * @note   Analog watchdog thresholds can be modified while ADC conversion
2063
  *         is on going.
2064
  *         In this case, some constraints must be taken into account:
2065
  *         the programmed threshold values are effective from the next
2066
  *         ADC EOC (end of unitary conversion).
2067
  *         Considering that registers write delay may happen due to
2068
  *         bus activity, this might cause an uncertainty on the
2069
  *         effective timing of the new programmed threshold values.
2070
  * @param  hadc ADC handle
2071
  * @param  AnalogWDGConfig Structure of ADC analog watchdog configuration
2072
  * @retval HAL status
2073
  */
2074
HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
2075
{
2076
  /* Check the parameters */
2077
  assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2078
  assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
2079
  assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
2080
  assert_param(IS_ADC_RANGE(ADC_RESOLUTION_12B, AnalogWDGConfig->HighThreshold));
2081
  assert_param(IS_ADC_RANGE(ADC_RESOLUTION_12B, AnalogWDGConfig->LowThreshold));
2082
 
2083
  if((AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG)     ||
2084
     (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_INJEC)   ||
2085
     (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC)  )
2086
  {
2087
    assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
2088
  }
2089
 
2090
  /* Process locked */
2091
  __HAL_LOCK(hadc);
2092
 
2093
  /* Analog watchdog configuration */
2094
 
2095
  /* Configure ADC Analog watchdog interrupt */
2096
  if(AnalogWDGConfig->ITMode == ENABLE)
2097
  {
2098
    /* Enable the ADC Analog watchdog interrupt */
2099
    __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
2100
  }
2101
  else
2102
  {
2103
    /* Disable the ADC Analog watchdog interrupt */
2104
    __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
2105
  }
2106
 
2107
  /* Configuration of analog watchdog:                                        */
2108
  /*  - Set the analog watchdog enable mode: regular and/or injected groups,  */
2109
  /*    one or all channels.                                                  */
2110
  /*  - Set the Analog watchdog channel (is not used if watchdog              */
2111
  /*    mode "all channels": ADC_CFGR_AWD1SGL=0).                             */
2112
  hadc->Instance->CR1 &= ~( ADC_CR1_AWDSGL |
2113
                            ADC_CR1_JAWDEN |
2114
                            ADC_CR1_AWDEN  |
2115
                            ADC_CR1_AWDCH   );
2116
 
2117
  hadc->Instance->CR1 |= ( AnalogWDGConfig->WatchdogMode |
2118
                           AnalogWDGConfig->Channel       );
2119
 
2120
  /* Set the high threshold */
2121
  hadc->Instance->HTR = AnalogWDGConfig->HighThreshold;
2122
 
2123
  /* Set the low threshold */
2124
  hadc->Instance->LTR = AnalogWDGConfig->LowThreshold;
2125
 
2126
  /* Process unlocked */
2127
  __HAL_UNLOCK(hadc);
2128
 
2129
  /* Return function status */
2130
  return HAL_OK;
2131
}
2132
 
2133
 
2134
/**
2135
  * @}
2136
  */
2137
 
2138
 
2139
/** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions
2140
 *  @brief    Peripheral State functions
2141
 *
2142
@verbatim
2143
 ===============================================================================
2144
            ##### Peripheral State and Errors functions #####
2145
 ===============================================================================  
2146
    [..]
2147
    This subsection provides functions to get in run-time the status of the  
2148
    peripheral.
2149
      (+) Check the ADC state
2150
      (+) Check the ADC error code
2151
 
2152
@endverbatim
2153
  * @{
2154
  */
2155
 
2156
/**
2157
  * @brief  return the ADC state
2158
  * @param  hadc ADC handle
2159
  * @retval HAL state
2160
  */
2161
uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
2162
{
2163
  /* Return ADC state */
2164
  return hadc->State;
2165
}
2166
 
2167
/**
2168
  * @brief  Return the ADC error code
2169
  * @param  hadc ADC handle
2170
  * @retval ADC Error Code
2171
  */
2172
uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
2173
{
2174
  return hadc->ErrorCode;
2175
}
2176
 
2177
/**
2178
  * @}
2179
  */
2180
 
2181
/**
2182
  * @}
2183
  */
2184
 
2185
/** @defgroup ADC_Private_Functions ADC Private Functions
2186
  * @{
2187
  */
2188
 
2189
/**
2190
  * @brief  Enable the selected ADC.
2191
  * @note   Prerequisite condition to use this function: ADC must be disabled
2192
  *         and voltage regulator must be enabled (done into HAL_ADC_Init()).
2193
  * @note   If low power mode AutoPowerOff is enabled, power-on/off phases are
2194
  *         performed automatically by hardware.
2195
  *         In this mode, this function is useless and must not be called because
2196
  *         flag ADC_FLAG_RDY is not usable.
2197
  *         Therefore, this function must be called under condition of
2198
  *         "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)".
2199
  * @param  hadc ADC handle
2200
  * @retval HAL status.
2201
  */
2202
HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
2203
{
2204
  uint32_t tickstart = 0;
2205
  __IO uint32_t wait_loop_index = 0;
2206
 
2207
  /* ADC enable and wait for ADC ready (in case of ADC is disabled or         */
2208
  /* enabling phase not yet completed: flag ADC ready not yet set).           */
2209
  /* Timeout implemented to not be stuck if ADC cannot be enabled (possible   */
2210
  /* causes: ADC clock not running, ...).                                     */
2211
  if (ADC_IS_ENABLE(hadc) == RESET)
2212
  {
2213
    /* Enable the Peripheral */
2214
    __HAL_ADC_ENABLE(hadc);
2215
 
2216
    /* Delay for ADC stabilization time */
2217
    /* Compute number of CPU cycles to wait for */
2218
    wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000));
2219
    while(wait_loop_index != 0)
2220
    {
2221
      wait_loop_index--;
2222
    }
2223
 
2224
    /* Get tick count */
2225
    tickstart = HAL_GetTick();    
2226
 
2227
    /* Wait for ADC effectively enabled */
2228
    while(ADC_IS_ENABLE(hadc) == RESET)
2229
    {
2230
      if((HAL_GetTick() - tickstart ) > ADC_ENABLE_TIMEOUT)
2231
      {
61 mjames 2232
        /* New check to avoid false timeout detection in case of preemption */
2233
        if(ADC_IS_ENABLE(hadc) == RESET)
2234
        {
2235
          /* Update ADC state machine to error */
2236
          SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2237
 
2238
          /* Set ADC error code to ADC IP internal error */
2239
          SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2240
 
2241
          /* Process unlocked */
2242
          __HAL_UNLOCK(hadc);
2243
 
2244
          return HAL_ERROR;
2245
        }
56 mjames 2246
      }
2247
    }
2248
  }
2249
 
2250
  /* Return HAL status */
2251
  return HAL_OK;
2252
}
2253
 
2254
/**
2255
  * @brief  Stop ADC conversion and disable the selected ADC
2256
  * @note   Prerequisite condition to use this function: ADC conversions must be
2257
  *         stopped to disable the ADC.
2258
  * @param  hadc ADC handle
2259
  * @retval HAL status.
2260
  */
2261
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
2262
{
2263
  uint32_t tickstart = 0;
2264
 
2265
  /* Verification if ADC is not already disabled */
2266
  if (ADC_IS_ENABLE(hadc) != RESET)
2267
  {
2268
    /* Disable the ADC peripheral */
2269
    __HAL_ADC_DISABLE(hadc);
2270
 
2271
    /* Get tick count */
2272
    tickstart = HAL_GetTick();
2273
 
2274
    /* Wait for ADC effectively disabled */    
2275
    while(ADC_IS_ENABLE(hadc) != RESET)
2276
    {
2277
      if((HAL_GetTick() - tickstart ) > ADC_DISABLE_TIMEOUT)
2278
      {
61 mjames 2279
        /* New check to avoid false timeout detection in case of preemption */
2280
        if(ADC_IS_ENABLE(hadc) != RESET)
2281
        {
2282
          /* Update ADC state machine to error */
2283
          SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
2284
 
2285
          /* Set ADC error code to ADC IP internal error */
2286
          SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
2287
 
2288
          return HAL_ERROR;
2289
        }
56 mjames 2290
      }
2291
    }
2292
  }
2293
 
2294
  /* Return HAL status */
2295
  return HAL_OK;
2296
}
2297
 
2298
/**
2299
  * @brief  DMA transfer complete callback.
2300
  * @param  hdma pointer to DMA handle.
2301
  * @retval None
2302
  */
2303
static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
2304
{
2305
  /* Retrieve ADC handle corresponding to current DMA handle */
2306
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2307
 
2308
  /* Update state machine on conversion status if not in error state */
2309
  if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
2310
  {
2311
    /* Update ADC state machine */
2312
    SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
2313
 
2314
    /* Determine whether any further conversion upcoming on group regular   */
2315
    /* by external trigger, continuous mode or scan sequence on going.      */
2316
    /* Note: On STM32L1, there is no independent flag of end of sequence.   */
2317
    /*       The test of scan sequence on going is done either with scan    */
2318
    /*       sequence disabled or with end of conversion flag set to        */
2319
    /*       of end of sequence.                                            */
2320
    if(ADC_IS_SOFTWARE_START_REGULAR(hadc)                   &&
2321
       (hadc->Init.ContinuousConvMode == DISABLE)            &&
2322
       (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
2323
        HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS)  )   )
2324
    {
2325
      /* Disable ADC end of single conversion interrupt on group regular */
2326
      /* Note: Overrun interrupt was enabled with EOC interrupt in          */
2327
      /* HAL_ADC_Start_IT(), but is not disabled here because can be used   */
2328
      /* by overrun IRQ process below.                                      */
2329
      __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
2330
 
2331
      /* Set ADC state */
2332
      CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);  
2333
 
2334
      if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
2335
      {
2336
        SET_BIT(hadc->State, HAL_ADC_STATE_READY);
2337
      }
2338
    }
2339
 
2340
    /* Conversion complete callback */
2341
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2342
    hadc->ConvCpltCallback(hadc);
2343
#else
2344
    HAL_ADC_ConvCpltCallback(hadc);
2345
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2346
  }
2347
  else
2348
  {
2349
    /* Call DMA error callback */
2350
    hadc->DMA_Handle->XferErrorCallback(hdma);
2351
  }
2352
}
2353
 
2354
/**
2355
  * @brief  DMA half transfer complete callback.
2356
  * @param  hdma pointer to DMA handle.
2357
  * @retval None
2358
  */
2359
static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)  
2360
{
2361
  /* Retrieve ADC handle corresponding to current DMA handle */
2362
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2363
 
2364
  /* Half conversion callback */
2365
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2366
    hadc->ConvHalfCpltCallback(hadc);
2367
#else
2368
  HAL_ADC_ConvHalfCpltCallback(hadc);
2369
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2370
}
2371
 
2372
/**
2373
  * @brief  DMA error callback
2374
  * @param  hdma pointer to DMA handle.
2375
  * @retval None
2376
  */
2377
static void ADC_DMAError(DMA_HandleTypeDef *hdma)  
2378
{
2379
  /* Retrieve ADC handle corresponding to current DMA handle */
2380
  ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
2381
 
2382
  /* Set ADC state */
2383
  SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
2384
 
2385
  /* Set ADC error code to DMA error */
2386
  SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
2387
 
2388
  /* Error callback */
2389
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2390
  hadc->ErrorCallback(hadc);
2391
#else
2392
  HAL_ADC_ErrorCallback(hadc);
2393
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2394
}
2395
 
2396
/**
2397
  * @}
2398
  */
2399
 
2400
#endif /* HAL_ADC_MODULE_ENABLED */
2401
/**
2402
  * @}
2403
  */
2404
 
2405
/**
2406
  * @}
2407
  */
2408
 
2409
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/