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/**
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  ******************************************************************************
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  * @file    stm32l1xx_ll_utils.h
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  * @author  MCD Application Team
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  * @brief   Header file of UTILS LL module.
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  @verbatim
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  ==============================================================================
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                     ##### How to use this driver #####
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  ==============================================================================
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    [..]
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    The LL UTILS driver contains a set of generic APIs that can be
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    used by user:
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      (+) Device electronic signature
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      (+) Timing functions
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      (+) PLL configuration functions
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  @endverbatim
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  ******************************************************************************
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  * @attention
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  *
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  * Copyright (c) 2017 STMicroelectronics.
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  * All rights reserved.
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  *
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  * This software is licensed under terms that can be found in the LICENSE file
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  * in the root directory of this software component.
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  * If no LICENSE file comes with this software, it is provided AS-IS.
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  *
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  ******************************************************************************
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  */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32L1xx_LL_UTILS_H
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#define __STM32L1xx_LL_UTILS_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l1xx.h"
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/** @addtogroup STM32L1xx_LL_Driver
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  * @{
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  */
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/** @defgroup UTILS_LL UTILS
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  * @{
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  */
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
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  * @{
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  */
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/* Max delay can be used in LL_mDelay */
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#define LL_MAX_DELAY                  0xFFFFFFFFU
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/**
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 * @brief Unique device ID register base address
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 */
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#define UID_BASE_ADDRESS              UID_BASE
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/**
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 * @brief Flash size data register base address
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 */
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#define FLASHSIZE_BASE_ADDRESS        FLASHSIZE_BASE
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/**
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  * @}
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  */
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/* Private macros ------------------------------------------------------------*/
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/** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
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  * @{
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  */
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/**
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  * @}
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  */
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
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  * @{
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  */
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/**
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  * @brief  UTILS PLL structure definition
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  */
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typedef struct
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{
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  uint32_t PLLMul;   /*!< Multiplication factor for PLL VCO input clock.
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                          This parameter can be a value of @ref RCC_LL_EC_PLL_MUL
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                          This feature can be modified afterwards using unitary function
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                          @ref LL_RCC_PLL_ConfigDomain_SYS(). */
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  uint32_t PLLDiv;   /*!< Division factor for PLL VCO output clock.
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                          This parameter can be a value of @ref RCC_LL_EC_PLL_DIV
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                          This feature can be modified afterwards using unitary function
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                          @ref LL_RCC_PLL_ConfigDomain_SYS(). */
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} LL_UTILS_PLLInitTypeDef;
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/**
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  * @brief  UTILS System, AHB and APB buses clock configuration structure definition
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  */
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typedef struct
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{
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  uint32_t AHBCLKDivider;         /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
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                                       This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
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                                       This feature can be modified afterwards using unitary function
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                                       @ref LL_RCC_SetAHBPrescaler(). */
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  uint32_t APB1CLKDivider;        /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
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                                       This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
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                                       This feature can be modified afterwards using unitary function
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                                       @ref LL_RCC_SetAPB1Prescaler(). */
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  uint32_t APB2CLKDivider;        /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
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                                       This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
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                                       This feature can be modified afterwards using unitary function
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                                       @ref LL_RCC_SetAPB2Prescaler(). */
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} LL_UTILS_ClkInitTypeDef;
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/**
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  * @}
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  */
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
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  * @{
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  */
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/** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
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  * @{
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  */
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#define LL_UTILS_HSEBYPASS_OFF        0x00000000U       /*!< HSE Bypass is not enabled                */
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#define LL_UTILS_HSEBYPASS_ON         0x00000001U       /*!< HSE Bypass is enabled                    */
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/**
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  * @}
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  */
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/**
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  * @}
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  */
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/* Exported macro ------------------------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
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  * @{
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  */
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/** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
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  * @{
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  */
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/**
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  * @brief  Get Word0 of the unique device identifier (UID based on 96 bits)
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  * @retval UID[31:0]
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  */
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__STATIC_INLINE uint32_t LL_GetUID_Word0(void)
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{
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  return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
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}
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/**
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  * @brief  Get Word1 of the unique device identifier (UID based on 96 bits)
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  * @retval UID[63:32]
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  */
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__STATIC_INLINE uint32_t LL_GetUID_Word1(void)
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{
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  return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 0x04U))));
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}
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/**
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  * @brief  Get Word2 of the unique device identifier (UID based on 96 bits)
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  * @retval UID[95:64]
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  */
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__STATIC_INLINE uint32_t LL_GetUID_Word2(void)
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{
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  return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 0x14U))));
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}
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/**
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  * @brief  Get Flash memory size
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  * @note   For DEV_ID = 0x416 or 0x427 or 0x429 or 0x437, this field value indicates the Flash memory
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  *         size of the device in Kbytes.\n
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  *         Example: 0x0080 = 128 Kbytes.\n
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  *         For DEV_ID = 0x436, the field value can be '0' or '1', with '0' for 384 Kbytes and '1' for 256 Kbytes.
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  * @note   For DEV_ID = 0x429, only LSB part of F_SIZE: F_SIZE[7:0] is valid. The MSB part
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  *         F_SIZE[15:8] is reserved and must be ignored.
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  * @retval FLASH_SIZE[15:0]: Flash memory size
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  */
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__STATIC_INLINE uint32_t LL_GetFlashSize(void)
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{
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  return (uint32_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)) & 0xFFFFU);
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}
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/**
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  * @}
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  */
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/** @defgroup UTILS_LL_EF_DELAY DELAY
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  * @{
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  */
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/**
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  * @brief  This function configures the Cortex-M SysTick source of the time base.
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  * @param  HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
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  * @note   When a RTOS is used, it is recommended to avoid changing the SysTick
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  *         configuration by calling this function, for a delay use rather osDelay RTOS service.
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  * @param  Ticks Number of ticks
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  * @retval None
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  */
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__STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
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{
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  /* Configure the SysTick to have interrupt in 1ms time base */
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  SysTick->LOAD  = (uint32_t)((HCLKFrequency / Ticks) - 1UL);  /* set reload register */
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  SysTick->VAL   = 0UL;                                       /* Load the SysTick Counter Value */
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  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
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                   SysTick_CTRL_ENABLE_Msk;                   /* Enable the Systick Timer */
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}
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void        LL_Init1msTick(uint32_t HCLKFrequency);
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void        LL_mDelay(uint32_t Delay);
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/**
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  * @}
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  */
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/** @defgroup UTILS_EF_SYSTEM SYSTEM
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  * @{
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  */
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void        LL_SetSystemCoreClock(uint32_t HCLKFrequency);
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ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
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                                         LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
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ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
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                                         LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
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#if defined(FLASH_ACR_LATENCY)
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ErrorStatus LL_SetFlashLatency(uint32_t Frequency);
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#endif /* FLASH_ACR_LATENCY */
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/**
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  * @}
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  */
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/**
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  * @}
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  */
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/**
259
  * @}
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  */
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/**
263
  * @}
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  */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __STM32L1xx_LL_UTILS_H */