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| Rev | Author | Line No. | Line |
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| 77 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32l1xx_ll_pwr.h |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief Header file of PWR LL module. |
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| 6 | ****************************************************************************** |
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| 7 | * @attention |
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| 8 | * |
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| 9 | * Copyright (c) 2017 STMicroelectronics. |
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| 10 | * All rights reserved. |
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| 11 | * |
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| 12 | * This software is licensed under terms that can be found in the LICENSE file |
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| 13 | * in the root directory of this software component. |
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| 14 | * If no LICENSE file comes with this software, it is provided AS-IS. |
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| 15 | * |
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| 16 | ****************************************************************************** |
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| 17 | */ |
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| 18 | |||
| 19 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 20 | #ifndef __STM32L1xx_LL_PWR_H |
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| 21 | #define __STM32L1xx_LL_PWR_H |
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| 22 | |||
| 23 | #ifdef __cplusplus |
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| 24 | extern "C" { |
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| 25 | #endif |
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| 26 | |||
| 27 | /* Includes ------------------------------------------------------------------*/ |
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| 28 | #include "stm32l1xx.h" |
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| 29 | |||
| 30 | /** @addtogroup STM32L1xx_LL_Driver |
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| 31 | * @{ |
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| 32 | */ |
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| 33 | |||
| 34 | #if defined(PWR) |
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| 35 | |||
| 36 | /** @defgroup PWR_LL PWR |
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| 37 | * @{ |
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| 38 | */ |
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| 39 | |||
| 40 | /* Private types -------------------------------------------------------------*/ |
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| 41 | /* Private variables ---------------------------------------------------------*/ |
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| 42 | /* Private constants ---------------------------------------------------------*/ |
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| 43 | /* Private macros ------------------------------------------------------------*/ |
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| 44 | /* Exported types ------------------------------------------------------------*/ |
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| 45 | /* Exported constants --------------------------------------------------------*/ |
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| 46 | /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants |
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| 47 | * @{ |
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| 48 | */ |
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| 49 | |||
| 50 | /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines |
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| 51 | * @brief Flags defines which can be used with LL_PWR_WriteReg function |
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| 52 | * @{ |
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| 53 | */ |
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| 54 | #define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */ |
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| 55 | #define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */ |
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| 56 | /** |
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| 57 | * @} |
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| 58 | */ |
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| 59 | |||
| 60 | /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines |
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| 61 | * @brief Flags defines which can be used with LL_PWR_ReadReg function |
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| 62 | * @{ |
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| 63 | */ |
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| 64 | #define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */ |
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| 65 | #define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */ |
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| 66 | #if defined(PWR_PVD_SUPPORT) |
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| 67 | #define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */ |
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| 68 | #endif /* PWR_PVD_SUPPORT */ |
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| 69 | #if defined(PWR_CSR_VREFINTRDYF) |
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| 70 | #define LL_PWR_CSR_VREFINTRDYF PWR_CSR_VREFINTRDYF /*!< VREFINT ready flag */ |
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| 71 | #endif /* PWR_CSR_VREFINTRDYF */ |
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| 72 | #define LL_PWR_CSR_VOS PWR_CSR_VOSF /*!< Voltage scaling select flag */ |
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| 73 | #define LL_PWR_CSR_REGLPF PWR_CSR_REGLPF /*!< Regulator low power flag */ |
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| 74 | #define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP1 /*!< Enable WKUP pin 1 */ |
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| 75 | #define LL_PWR_CSR_EWUP2 PWR_CSR_EWUP2 /*!< Enable WKUP pin 2 */ |
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| 76 | #if defined(PWR_CSR_EWUP3) |
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| 77 | #define LL_PWR_CSR_EWUP3 PWR_CSR_EWUP3 /*!< Enable WKUP pin 3 */ |
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| 78 | #endif /* PWR_CSR_EWUP3 */ |
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| 79 | /** |
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| 80 | * @} |
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| 81 | */ |
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| 82 | |||
| 83 | /** @defgroup PWR_LL_EC_REGU_VOLTAGE Regulator Voltage |
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| 84 | * @{ |
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| 85 | */ |
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| 86 | #define LL_PWR_REGU_VOLTAGE_SCALE1 (PWR_CR_VOS_0) /*!< 1.8V (range 1) */ |
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| 87 | #define LL_PWR_REGU_VOLTAGE_SCALE2 (PWR_CR_VOS_1) /*!< 1.5V (range 2) */ |
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| 88 | #define LL_PWR_REGU_VOLTAGE_SCALE3 (PWR_CR_VOS_0 | PWR_CR_VOS_1) /*!< 1.2V (range 3) */ |
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| 89 | /** |
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| 90 | * @} |
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| 91 | */ |
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| 92 | |||
| 93 | /** @defgroup PWR_LL_EC_MODE_PWR Mode Power |
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| 94 | * @{ |
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| 95 | */ |
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| 96 | #define LL_PWR_MODE_STOP 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */ |
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| 97 | #define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */ |
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| 98 | /** |
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| 99 | * @} |
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| 100 | */ |
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| 101 | |||
| 102 | /** @defgroup PWR_LL_EC_REGU_MODE_LP_MODES Regulator Mode In Low Power Modes |
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| 103 | * @{ |
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| 104 | */ |
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| 105 | #define LL_PWR_REGU_LPMODES_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep/sleep/low-power run mode */ |
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| 106 | #define LL_PWR_REGU_LPMODES_LOW_POWER (PWR_CR_LPSDSR) /*!< Voltage Regulator in low-power mode during deepsleep/sleep/low-power run mode */ |
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| 107 | /** |
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| 108 | * @} |
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| 109 | */ |
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| 110 | #if defined(PWR_CR_LPDS) |
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| 111 | /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode |
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| 112 | * @{ |
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| 113 | */ |
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| 114 | #define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep mode */ |
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| 115 | #define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage Regulator in low-power mode during deepsleep mode */ |
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| 116 | /** |
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| 117 | * @} |
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| 118 | */ |
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| 119 | #endif /* PWR_CR_LPDS */ |
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| 120 | |||
| 121 | #if defined(PWR_PVD_SUPPORT) |
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| 122 | /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level |
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| 123 | * @{ |
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| 124 | */ |
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| 125 | #define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 1.9 V */ |
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| 126 | #define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.1 V */ |
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| 127 | #define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.3 V */ |
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| 128 | #define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */ |
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| 129 | #define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.7 V */ |
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| 130 | #define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.9 V */ |
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| 131 | #define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 3.1 V */ |
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| 132 | #define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< External input analog voltage (Compare internally to VREFINT) */ |
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| 133 | /** |
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| 134 | * @} |
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| 135 | */ |
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| 136 | #endif /* PWR_PVD_SUPPORT */ |
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| 137 | /** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins |
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| 138 | * @{ |
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| 139 | */ |
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| 140 | #define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP1) /*!< WKUP pin 1 : PA0 */ |
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| 141 | #define LL_PWR_WAKEUP_PIN2 (PWR_CSR_EWUP2) /*!< WKUP pin 2 : PC13 */ |
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| 142 | #if defined(PWR_CSR_EWUP3) |
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| 143 | #define LL_PWR_WAKEUP_PIN3 (PWR_CSR_EWUP3) /*!< WKUP pin 3 : PE6 or PA2 according to device */ |
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| 144 | #endif /* PWR_CSR_EWUP3 */ |
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| 145 | /** |
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| 146 | * @} |
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| 147 | */ |
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| 148 | |||
| 149 | /** |
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| 150 | * @} |
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| 151 | */ |
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| 152 | |||
| 153 | |||
| 154 | /* Exported macro ------------------------------------------------------------*/ |
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| 155 | /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros |
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| 156 | * @{ |
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| 157 | */ |
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| 158 | |||
| 159 | /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros |
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| 160 | * @{ |
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| 161 | */ |
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| 162 | |||
| 163 | /** |
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| 164 | * @brief Write a value in PWR register |
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| 165 | * @param __REG__ Register to be written |
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| 166 | * @param __VALUE__ Value to be written in the register |
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| 167 | * @retval None |
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| 168 | */ |
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| 169 | #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__)) |
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| 170 | |||
| 171 | /** |
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| 172 | * @brief Read a value in PWR register |
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| 173 | * @param __REG__ Register to be read |
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| 174 | * @retval Register value |
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| 175 | */ |
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| 176 | #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__) |
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| 177 | /** |
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| 178 | * @} |
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| 179 | */ |
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| 180 | |||
| 181 | /** |
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| 182 | * @} |
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| 183 | */ |
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| 184 | |||
| 185 | /* Exported functions --------------------------------------------------------*/ |
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| 186 | /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions |
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| 187 | * @{ |
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| 188 | */ |
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| 189 | |||
| 190 | /** @defgroup PWR_LL_EF_Configuration Configuration |
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| 191 | * @{ |
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| 192 | */ |
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| 193 | /** |
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| 194 | * @brief Switch the Regulator from main mode to low-power mode |
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| 195 | * @rmtoll CR LPRUN LL_PWR_EnableLowPowerRunMode |
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| 196 | * @note Remind to set the Regulator to low power before enabling |
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| 197 | * LowPower run mode (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER). |
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| 198 | * @retval None |
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| 199 | */ |
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| 200 | __STATIC_INLINE void LL_PWR_EnableLowPowerRunMode(void) |
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| 201 | { |
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| 202 | SET_BIT(PWR->CR, PWR_CR_LPRUN); |
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| 203 | } |
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| 204 | |||
| 205 | /** |
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| 206 | * @brief Switch the Regulator from low-power mode to main mode |
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| 207 | * @rmtoll CR LPRUN LL_PWR_DisableLowPowerRunMode |
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| 208 | * @retval None |
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| 209 | */ |
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| 210 | __STATIC_INLINE void LL_PWR_DisableLowPowerRunMode(void) |
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| 211 | { |
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| 212 | CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); |
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| 213 | } |
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| 214 | |||
| 215 | /** |
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| 216 | * @brief Check if the Regulator is in low-power mode |
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| 217 | * @rmtoll CR LPRUN LL_PWR_IsEnabledLowPowerRunMode |
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| 218 | * @retval State of bit (1 or 0). |
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| 219 | */ |
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| 220 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRunMode(void) |
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| 221 | { |
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| 222 | return ((READ_BIT(PWR->CR, PWR_CR_LPRUN) == PWR_CR_LPRUN) ? 1UL : 0UL); |
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| 223 | } |
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| 224 | |||
| 225 | /** |
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| 226 | * @brief Set voltage Regulator to low-power and switch from |
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| 227 | * run main mode to run low-power mode. |
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| 228 | * @rmtoll CR LPSDSR LL_PWR_EnterLowPowerRunMode\n |
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| 229 | * CR LPRUN LL_PWR_EnterLowPowerRunMode |
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| 230 | * @note This "high level" function is introduced to provide functional |
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| 231 | * compatibility with other families. Notice that the two registers |
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| 232 | * have to be written sequentially, so this function is not atomic. |
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| 233 | * To assure atomicity you can call separately the following functions: |
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| 234 | * - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_LOW_POWER); |
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| 235 | * - @ref LL_PWR_EnableLowPowerRunMode(); |
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| 236 | * @retval None |
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| 237 | */ |
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| 238 | __STATIC_INLINE void LL_PWR_EnterLowPowerRunMode(void) |
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| 239 | { |
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| 240 | SET_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_LOW_POWER) */ |
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| 241 | SET_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_EnableLowPowerRunMode() */ |
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| 242 | } |
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| 243 | |||
| 244 | /** |
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| 245 | * @brief Set voltage Regulator to main and switch from |
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| 246 | * run main mode to low-power mode. |
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| 247 | * @rmtoll CR LPSDSR LL_PWR_ExitLowPowerRunMode\n |
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| 248 | * CR LPRUN LL_PWR_ExitLowPowerRunMode |
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| 249 | * @note This "high level" function is introduced to provide functional |
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| 250 | * compatibility with other families. Notice that the two registers |
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| 251 | * have to be written sequentially, so this function is not atomic. |
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| 252 | * To assure atomicity you can call separately the following functions: |
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| 253 | * - @ref LL_PWR_DisableLowPowerRunMode(); |
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| 254 | * - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_MAIN); |
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| 255 | * @retval None |
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| 256 | */ |
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| 257 | __STATIC_INLINE void LL_PWR_ExitLowPowerRunMode(void) |
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| 258 | { |
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| 259 | CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_DisableLowPowerRunMode() */ |
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| 260 | CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_MAIN) */ |
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| 261 | } |
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| 262 | /** |
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| 263 | * @brief Set the main internal Regulator output voltage |
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| 264 | * @rmtoll CR VOS LL_PWR_SetRegulVoltageScaling |
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| 265 | * @param VoltageScaling This parameter can be one of the following values: |
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| 266 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 |
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| 267 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 |
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| 268 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3 |
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| 269 | * @retval None |
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| 270 | */ |
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| 271 | __STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling) |
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| 272 | { |
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| 273 | MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling); |
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| 274 | } |
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| 275 | |||
| 276 | /** |
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| 277 | * @brief Get the main internal Regulator output voltage |
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| 278 | * @rmtoll CR VOS LL_PWR_GetRegulVoltageScaling |
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| 279 | * @retval Returned value can be one of the following values: |
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| 280 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 |
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| 281 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 |
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| 282 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3 |
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| 283 | */ |
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| 284 | __STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(void) |
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| 285 | { |
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| 286 | return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS)); |
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| 287 | } |
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| 288 | |||
| 289 | /** |
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| 290 | * @brief Enable access to the backup domain |
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| 291 | * @rmtoll CR DBP LL_PWR_EnableBkUpAccess |
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| 292 | * @retval None |
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| 293 | */ |
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| 294 | __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void) |
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| 295 | { |
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| 296 | SET_BIT(PWR->CR, PWR_CR_DBP); |
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| 297 | } |
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| 298 | |||
| 299 | /** |
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| 300 | * @brief Disable access to the backup domain |
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| 301 | * @rmtoll CR DBP LL_PWR_DisableBkUpAccess |
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| 302 | * @retval None |
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| 303 | */ |
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| 304 | __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void) |
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| 305 | { |
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| 306 | CLEAR_BIT(PWR->CR, PWR_CR_DBP); |
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| 307 | } |
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| 308 | |||
| 309 | /** |
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| 310 | * @brief Check if the backup domain is enabled |
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| 311 | * @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess |
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| 312 | * @retval State of bit (1 or 0). |
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| 313 | */ |
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| 314 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void) |
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| 315 | { |
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| 316 | return ((READ_BIT(PWR->CR, PWR_CR_DBP) == PWR_CR_DBP) ? 1UL : 0UL); |
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| 317 | } |
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| 318 | |||
| 319 | /** |
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| 320 | * @brief Set voltage Regulator mode during low power modes |
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| 321 | * @rmtoll CR LPSDSR LL_PWR_SetRegulModeLP |
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| 322 | * @param RegulMode This parameter can be one of the following values: |
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| 323 | * @arg @ref LL_PWR_REGU_LPMODES_MAIN |
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| 324 | * @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER |
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| 325 | * @retval None |
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| 326 | */ |
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| 327 | __STATIC_INLINE void LL_PWR_SetRegulModeLP(uint32_t RegulMode) |
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| 328 | { |
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| 329 | MODIFY_REG(PWR->CR, PWR_CR_LPSDSR, RegulMode); |
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| 330 | } |
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| 331 | |||
| 332 | /** |
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| 333 | * @brief Get voltage Regulator mode during low power modes |
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| 334 | * @rmtoll CR LPSDSR LL_PWR_GetRegulModeLP |
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| 335 | * @retval Returned value can be one of the following values: |
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| 336 | * @arg @ref LL_PWR_REGU_LPMODES_MAIN |
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| 337 | * @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER |
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| 338 | */ |
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| 339 | __STATIC_INLINE uint32_t LL_PWR_GetRegulModeLP(void) |
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| 340 | { |
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| 341 | return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPSDSR)); |
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| 342 | } |
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| 343 | |||
| 344 | #if defined(PWR_CR_LPDS) |
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| 345 | /** |
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| 346 | * @brief Set voltage Regulator mode during deep sleep mode |
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| 347 | * @rmtoll CR LPDS LL_PWR_SetRegulModeDS |
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| 348 | * @param RegulMode This parameter can be one of the following values: |
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| 349 | * @arg @ref LL_PWR_REGU_DSMODE_MAIN |
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| 350 | * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER |
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| 351 | * @retval None |
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| 352 | */ |
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| 353 | __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode) |
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| 354 | { |
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| 355 | MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode); |
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| 356 | } |
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| 357 | |||
| 358 | /** |
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| 359 | * @brief Get voltage Regulator mode during deep sleep mode |
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| 360 | * @rmtoll CR LPDS LL_PWR_GetRegulModeDS |
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| 361 | * @retval Returned value can be one of the following values: |
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| 362 | * @arg @ref LL_PWR_REGU_DSMODE_MAIN |
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| 363 | * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER |
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| 364 | */ |
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| 365 | __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void) |
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| 366 | { |
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| 367 | return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS)); |
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| 368 | } |
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| 369 | #endif /* PWR_CR_LPDS */ |
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| 370 | |||
| 371 | /** |
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| 372 | * @brief Set Power Down mode when CPU enters deepsleep |
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| 373 | * @rmtoll CR PDDS LL_PWR_SetPowerMode |
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| 374 | * @param PDMode This parameter can be one of the following values: |
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| 375 | * @arg @ref LL_PWR_MODE_STOP |
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| 376 | * @arg @ref LL_PWR_MODE_STANDBY |
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| 377 | * @note Set the Regulator to low power (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER) |
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| 378 | * before setting MODE_STOP. If the Regulator remains in "main mode", |
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| 379 | * it consumes more power without providing any additional feature. |
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| 380 | * In MODE_STANDBY the Regulator is automatically off. |
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| 381 | * @retval None |
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| 382 | */ |
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| 383 | __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode) |
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| 384 | { |
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| 385 | MODIFY_REG(PWR->CR, PWR_CR_PDDS, PDMode); |
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| 386 | } |
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| 387 | |||
| 388 | /** |
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| 389 | * @brief Get Power Down mode when CPU enters deepsleep |
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| 390 | * @rmtoll CR PDDS LL_PWR_GetPowerMode |
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| 391 | * @retval Returned value can be one of the following values: |
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| 392 | * @arg @ref LL_PWR_MODE_STOP |
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| 393 | * @arg @ref LL_PWR_MODE_STANDBY |
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| 394 | */ |
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| 395 | __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void) |
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| 396 | { |
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| 397 | return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PDDS)); |
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| 398 | } |
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| 399 | |||
| 400 | #if defined(PWR_PVD_SUPPORT) |
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| 401 | /** |
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| 402 | * @brief Configure the voltage threshold detected by the Power Voltage Detector |
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| 403 | * @rmtoll CR PLS LL_PWR_SetPVDLevel |
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| 404 | * @param PVDLevel This parameter can be one of the following values: |
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| 405 | * @arg @ref LL_PWR_PVDLEVEL_0 |
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| 406 | * @arg @ref LL_PWR_PVDLEVEL_1 |
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| 407 | * @arg @ref LL_PWR_PVDLEVEL_2 |
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| 408 | * @arg @ref LL_PWR_PVDLEVEL_3 |
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| 409 | * @arg @ref LL_PWR_PVDLEVEL_4 |
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| 410 | * @arg @ref LL_PWR_PVDLEVEL_5 |
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| 411 | * @arg @ref LL_PWR_PVDLEVEL_6 |
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| 412 | * @arg @ref LL_PWR_PVDLEVEL_7 |
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| 413 | * @retval None |
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| 414 | */ |
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| 415 | __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel) |
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| 416 | { |
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| 417 | MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel); |
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| 418 | } |
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| 419 | |||
| 420 | /** |
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| 421 | * @brief Get the voltage threshold detection |
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| 422 | * @rmtoll CR PLS LL_PWR_GetPVDLevel |
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| 423 | * @retval Returned value can be one of the following values: |
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| 424 | * @arg @ref LL_PWR_PVDLEVEL_0 |
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| 425 | * @arg @ref LL_PWR_PVDLEVEL_1 |
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| 426 | * @arg @ref LL_PWR_PVDLEVEL_2 |
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| 427 | * @arg @ref LL_PWR_PVDLEVEL_3 |
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| 428 | * @arg @ref LL_PWR_PVDLEVEL_4 |
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| 429 | * @arg @ref LL_PWR_PVDLEVEL_5 |
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| 430 | * @arg @ref LL_PWR_PVDLEVEL_6 |
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| 431 | * @arg @ref LL_PWR_PVDLEVEL_7 |
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| 432 | */ |
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| 433 | __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void) |
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| 434 | { |
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| 435 | return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS)); |
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| 436 | } |
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| 437 | |||
| 438 | /** |
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| 439 | * @brief Enable Power Voltage Detector |
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| 440 | * @rmtoll CR PVDE LL_PWR_EnablePVD |
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| 441 | * @retval None |
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| 442 | */ |
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| 443 | __STATIC_INLINE void LL_PWR_EnablePVD(void) |
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| 444 | { |
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| 445 | SET_BIT(PWR->CR, PWR_CR_PVDE); |
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| 446 | } |
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| 447 | |||
| 448 | /** |
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| 449 | * @brief Disable Power Voltage Detector |
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| 450 | * @rmtoll CR PVDE LL_PWR_DisablePVD |
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| 451 | * @retval None |
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| 452 | */ |
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| 453 | __STATIC_INLINE void LL_PWR_DisablePVD(void) |
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| 454 | { |
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| 455 | CLEAR_BIT(PWR->CR, PWR_CR_PVDE); |
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| 456 | } |
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| 457 | |||
| 458 | /** |
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| 459 | * @brief Check if Power Voltage Detector is enabled |
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| 460 | * @rmtoll CR PVDE LL_PWR_IsEnabledPVD |
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| 461 | * @retval State of bit (1 or 0). |
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| 462 | */ |
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| 463 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void) |
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| 464 | { |
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| 465 | return ((READ_BIT(PWR->CR, PWR_CR_PVDE) == PWR_CR_PVDE) ? 1UL : 0UL); |
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| 466 | } |
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| 467 | #endif /* PWR_PVD_SUPPORT */ |
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| 468 | |||
| 469 | /** |
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| 470 | * @brief Enable the WakeUp PINx functionality |
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| 471 | * @rmtoll CSR EWUP1 LL_PWR_EnableWakeUpPin\n |
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| 472 | * @rmtoll CSR EWUP2 LL_PWR_EnableWakeUpPin\n |
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| 473 | * @rmtoll CSR EWUP3 LL_PWR_EnableWakeUpPin |
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| 474 | * @param WakeUpPin This parameter can be one of the following values: |
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| 475 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
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| 476 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
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| 477 | * @arg @ref LL_PWR_WAKEUP_PIN3 (*) |
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| 478 | * |
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| 479 | * (*) not available on all devices |
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| 480 | * @retval None |
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| 481 | */ |
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| 482 | __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin) |
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| 483 | { |
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| 484 | SET_BIT(PWR->CSR, WakeUpPin); |
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| 485 | } |
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| 486 | |||
| 487 | /** |
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| 488 | * @brief Disable the WakeUp PINx functionality |
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| 489 | * @rmtoll CSR EWUP1 LL_PWR_DisableWakeUpPin\n |
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| 490 | * @rmtoll CSR EWUP2 LL_PWR_DisableWakeUpPin\n |
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| 491 | * @rmtoll CSR EWUP3 LL_PWR_DisableWakeUpPin |
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| 492 | * @param WakeUpPin This parameter can be one of the following values: |
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| 493 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
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| 494 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
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| 495 | * @arg @ref LL_PWR_WAKEUP_PIN3 (*) |
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| 496 | * |
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| 497 | * (*) not available on all devices |
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| 498 | * @retval None |
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| 499 | */ |
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| 500 | __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin) |
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| 501 | { |
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| 502 | CLEAR_BIT(PWR->CSR, WakeUpPin); |
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| 503 | } |
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| 504 | |||
| 505 | /** |
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| 506 | * @brief Check if the WakeUp PINx functionality is enabled |
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| 507 | * @rmtoll CSR EWUP1 LL_PWR_IsEnabledWakeUpPin\n |
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| 508 | * @rmtoll CSR EWUP2 LL_PWR_IsEnabledWakeUpPin\n |
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| 509 | * @rmtoll CSR EWUP3 LL_PWR_IsEnabledWakeUpPin |
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| 510 | * @param WakeUpPin This parameter can be one of the following values: |
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| 511 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
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| 512 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
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| 513 | * @arg @ref LL_PWR_WAKEUP_PIN3 (*) |
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| 514 | * |
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| 515 | * (*) not available on all devices |
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| 516 | * @retval State of bit (1 or 0). |
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| 517 | */ |
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| 518 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin) |
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| 519 | { |
||
| 520 | return ((READ_BIT(PWR->CSR, WakeUpPin) == WakeUpPin) ? 1UL : 0UL); |
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| 521 | } |
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| 522 | |||
| 523 | /** |
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| 524 | * @brief Enable ultra low-power mode by enabling VREFINT switch off in low-power modes |
||
| 525 | * @rmtoll CR ULP LL_PWR_EnableUltraLowPower |
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| 526 | * @retval None |
||
| 527 | */ |
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| 528 | __STATIC_INLINE void LL_PWR_EnableUltraLowPower(void) |
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| 529 | { |
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| 530 | SET_BIT(PWR->CR, PWR_CR_ULP); |
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| 531 | } |
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| 532 | |||
| 533 | /** |
||
| 534 | * @brief Disable ultra low-power mode by disabling VREFINT switch off in low-power modes |
||
| 535 | * @rmtoll CR ULP LL_PWR_DisableUltraLowPower |
||
| 536 | * @retval None |
||
| 537 | */ |
||
| 538 | __STATIC_INLINE void LL_PWR_DisableUltraLowPower(void) |
||
| 539 | { |
||
| 540 | CLEAR_BIT(PWR->CR, PWR_CR_ULP); |
||
| 541 | } |
||
| 542 | |||
| 543 | /** |
||
| 544 | * @brief Check if ultra low-power mode is enabled by checking if VREFINT switch off in low-power modes is enabled |
||
| 545 | * @rmtoll CR ULP LL_PWR_IsEnabledUltraLowPower |
||
| 546 | * @retval State of bit (1 or 0). |
||
| 547 | */ |
||
| 548 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledUltraLowPower(void) |
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| 549 | { |
||
| 550 | return ((READ_BIT(PWR->CR, PWR_CR_ULP) == PWR_CR_ULP) ? 1UL : 0UL); |
||
| 551 | } |
||
| 552 | |||
| 553 | /** |
||
| 554 | * @brief Enable fast wakeup by ignoring VREFINT startup time when exiting from low-power mode |
||
| 555 | * @rmtoll CR FWU LL_PWR_EnableFastWakeUp |
||
| 556 | * @note Works in conjunction with ultra low power mode. |
||
| 557 | * @retval None |
||
| 558 | */ |
||
| 559 | __STATIC_INLINE void LL_PWR_EnableFastWakeUp(void) |
||
| 560 | { |
||
| 561 | SET_BIT(PWR->CR, PWR_CR_FWU); |
||
| 562 | } |
||
| 563 | |||
| 564 | /** |
||
| 565 | * @brief Disable fast wakeup by waiting VREFINT startup time when exiting from low-power mode |
||
| 566 | * @rmtoll CR FWU LL_PWR_DisableFastWakeUp |
||
| 567 | * @note Works in conjunction with ultra low power mode. |
||
| 568 | * @retval None |
||
| 569 | */ |
||
| 570 | __STATIC_INLINE void LL_PWR_DisableFastWakeUp(void) |
||
| 571 | { |
||
| 572 | CLEAR_BIT(PWR->CR, PWR_CR_FWU); |
||
| 573 | } |
||
| 574 | |||
| 575 | /** |
||
| 576 | * @brief Check if fast wakeup is enabled by checking if VREFINT startup time when exiting from low-power mode is ignored |
||
| 577 | * @rmtoll CR FWU LL_PWR_IsEnabledFastWakeUp |
||
| 578 | * @retval State of bit (1 or 0). |
||
| 579 | */ |
||
| 580 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledFastWakeUp(void) |
||
| 581 | { |
||
| 582 | return ((READ_BIT(PWR->CR, PWR_CR_FWU) == PWR_CR_FWU) ? 1UL : 0UL); |
||
| 583 | } |
||
| 584 | |||
| 585 | |||
| 586 | /** |
||
| 587 | * @} |
||
| 588 | */ |
||
| 589 | |||
| 590 | /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management |
||
| 591 | * @{ |
||
| 592 | */ |
||
| 593 | |||
| 594 | /** |
||
| 595 | * @brief Get Wake-up Flag |
||
| 596 | * @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU |
||
| 597 | * @retval State of bit (1 or 0). |
||
| 598 | */ |
||
| 599 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void) |
||
| 600 | { |
||
| 601 | return ((READ_BIT(PWR->CSR, PWR_CSR_WUF) == PWR_CSR_WUF) ? 1UL : 0UL); |
||
| 602 | } |
||
| 603 | |||
| 604 | /** |
||
| 605 | * @brief Get Standby Flag |
||
| 606 | * @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB |
||
| 607 | * @retval State of bit (1 or 0). |
||
| 608 | */ |
||
| 609 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void) |
||
| 610 | { |
||
| 611 | return ((READ_BIT(PWR->CSR, PWR_CSR_SBF) == PWR_CSR_SBF) ? 1UL : 0UL); |
||
| 612 | } |
||
| 613 | |||
| 614 | #if defined(PWR_PVD_SUPPORT) |
||
| 615 | /** |
||
| 616 | * @brief Indicate whether VDD voltage is below the selected PVD threshold |
||
| 617 | * @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO |
||
| 618 | * @retval State of bit (1 or 0). |
||
| 619 | */ |
||
| 620 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void) |
||
| 621 | { |
||
| 622 | return ((READ_BIT(PWR->CSR, PWR_CSR_PVDO) == PWR_CSR_PVDO) ? 1UL : 0UL); |
||
| 623 | } |
||
| 624 | #endif /* PWR_PVD_SUPPORT */ |
||
| 625 | |||
| 626 | #if defined(PWR_CSR_VREFINTRDYF) |
||
| 627 | /** |
||
| 628 | * @brief Get Internal Reference VrefInt Flag |
||
| 629 | * @rmtoll CSR VREFINTRDYF LL_PWR_IsActiveFlag_VREFINTRDY |
||
| 630 | * @retval State of bit (1 or 0). |
||
| 631 | */ |
||
| 632 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VREFINTRDY(void) |
||
| 633 | { |
||
| 634 | return ((READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == PWR_CSR_VREFINTRDYF) ? 1UL : 0UL); |
||
| 635 | } |
||
| 636 | #endif /* PWR_CSR_VREFINTRDYF */ |
||
| 637 | /** |
||
| 638 | * @brief Indicate whether the Regulator is ready in the selected voltage range or if its output voltage is still changing to the required voltage level |
||
| 639 | * @rmtoll CSR VOSF LL_PWR_IsActiveFlag_VOS |
||
| 640 | * @retval State of bit (1 or 0). |
||
| 641 | */ |
||
| 642 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOS(void) |
||
| 643 | { |
||
| 644 | return ((READ_BIT(PWR->CSR, PWR_CSR_VOSF) == PWR_CSR_VOSF) ? 1UL : 0UL); |
||
| 645 | } |
||
| 646 | /** |
||
| 647 | * @brief Indicate whether the Regulator is ready in main mode or is in low-power mode |
||
| 648 | * @rmtoll CSR REGLPF LL_PWR_IsActiveFlag_REGLPF |
||
| 649 | * @note Take care, return value "0" means the Regulator is ready. Return value "1" means the output voltage range is still changing. |
||
| 650 | * @retval State of bit (1 or 0). |
||
| 651 | */ |
||
| 652 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPF(void) |
||
| 653 | { |
||
| 654 | return ((READ_BIT(PWR->CSR, PWR_CSR_REGLPF) == PWR_CSR_REGLPF) ? 1UL : 0UL); |
||
| 655 | } |
||
| 656 | /** |
||
| 657 | * @brief Clear Standby Flag |
||
| 658 | * @rmtoll CR CSBF LL_PWR_ClearFlag_SB |
||
| 659 | * @retval None |
||
| 660 | */ |
||
| 661 | __STATIC_INLINE void LL_PWR_ClearFlag_SB(void) |
||
| 662 | { |
||
| 663 | SET_BIT(PWR->CR, PWR_CR_CSBF); |
||
| 664 | } |
||
| 665 | |||
| 666 | /** |
||
| 667 | * @brief Clear Wake-up Flags |
||
| 668 | * @rmtoll CR CWUF LL_PWR_ClearFlag_WU |
||
| 669 | * @retval None |
||
| 670 | */ |
||
| 671 | __STATIC_INLINE void LL_PWR_ClearFlag_WU(void) |
||
| 672 | { |
||
| 673 | SET_BIT(PWR->CR, PWR_CR_CWUF); |
||
| 674 | } |
||
| 675 | |||
| 676 | /** |
||
| 677 | * @} |
||
| 678 | */ |
||
| 679 | |||
| 680 | #if defined(USE_FULL_LL_DRIVER) |
||
| 681 | /** @defgroup PWR_LL_EF_Init De-initialization function |
||
| 682 | * @{ |
||
| 683 | */ |
||
| 684 | ErrorStatus LL_PWR_DeInit(void); |
||
| 685 | /** |
||
| 686 | * @} |
||
| 687 | */ |
||
| 688 | #endif /* USE_FULL_LL_DRIVER */ |
||
| 689 | |||
| 690 | /** @defgroup PWR_LL_EF_Legacy_Functions PWR legacy functions name |
||
| 691 | * @{ |
||
| 692 | */ |
||
| 693 | /* Old functions name kept for legacy purpose, to be replaced by the */ |
||
| 694 | /* current functions name. */ |
||
| 695 | #define LL_PWR_IsActiveFlag_VOSF LL_PWR_IsActiveFlag_VOS |
||
| 696 | /** |
||
| 697 | * @} |
||
| 698 | */ |
||
| 699 | |||
| 700 | /** |
||
| 701 | * @} |
||
| 702 | */ |
||
| 703 | |||
| 704 | /** |
||
| 705 | * @} |
||
| 706 | */ |
||
| 707 | |||
| 708 | #endif /* defined(PWR) */ |
||
| 709 | |||
| 710 | /** |
||
| 711 | * @} |
||
| 712 | */ |
||
| 713 | |||
| 714 | #ifdef __cplusplus |
||
| 715 | } |
||
| 716 | #endif |
||
| 717 | |||
| 718 | #endif /* __STM32L1xx_LL_PWR_H */ |