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| Rev | Author | Line No. | Line |
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| 77 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32l1xx_hal_uart.h |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief Header file of UART HAL module. |
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| 6 | ****************************************************************************** |
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| 7 | * @attention |
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| 8 | * |
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| 9 | * Copyright (c) 2016 STMicroelectronics. |
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| 10 | * All rights reserved. |
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| 11 | * |
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| 12 | * This software is licensed under terms that can be found in the LICENSE file |
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| 13 | * in the root directory of this software component. |
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| 14 | * If no LICENSE file comes with this software, it is provided AS-IS. |
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| 15 | * |
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| 16 | ****************************************************************************** |
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| 17 | */ |
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| 18 | |||
| 19 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 20 | #ifndef __STM32L1xx_HAL_UART_H |
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| 21 | #define __STM32L1xx_HAL_UART_H |
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| 22 | |||
| 23 | #ifdef __cplusplus |
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| 24 | extern "C" { |
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| 25 | #endif |
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| 26 | |||
| 27 | /* Includes ------------------------------------------------------------------*/ |
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| 28 | #include "stm32l1xx_hal_def.h" |
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| 29 | |||
| 30 | /** @addtogroup STM32L1xx_HAL_Driver |
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| 31 | * @{ |
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| 32 | */ |
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| 33 | |||
| 34 | /** @addtogroup UART |
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| 35 | * @{ |
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| 36 | */ |
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| 37 | |||
| 38 | /* Exported types ------------------------------------------------------------*/ |
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| 39 | /** @defgroup UART_Exported_Types UART Exported Types |
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| 40 | * @{ |
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| 41 | */ |
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| 42 | |||
| 43 | /** |
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| 44 | * @brief UART Init Structure definition |
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| 45 | */ |
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| 46 | typedef struct |
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| 47 | { |
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| 48 | uint32_t BaudRate; /*!< This member configures the UART communication baud rate. |
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| 49 | The baud rate is computed using the following formula: |
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| 50 | - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate))) |
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| 51 | - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5 |
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| 52 | Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */ |
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| 53 | |||
| 54 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
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| 55 | This parameter can be a value of @ref UART_Word_Length */ |
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| 56 | |||
| 57 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
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| 58 | This parameter can be a value of @ref UART_Stop_Bits */ |
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| 59 | |||
| 60 | uint32_t Parity; /*!< Specifies the parity mode. |
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| 61 | This parameter can be a value of @ref UART_Parity |
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| 62 | @note When parity is enabled, the computed parity is inserted |
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| 63 | at the MSB position of the transmitted data (9th bit when |
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| 64 | the word length is set to 9 data bits; 8th bit when the |
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| 65 | word length is set to 8 data bits). */ |
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| 66 | |||
| 67 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
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| 68 | This parameter can be a value of @ref UART_Mode */ |
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| 69 | |||
| 70 | uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled. |
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| 71 | This parameter can be a value of @ref UART_Hardware_Flow_Control */ |
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| 72 | |||
| 73 | uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8). |
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| 74 | This parameter can be a value of @ref UART_Over_Sampling */ |
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| 75 | } UART_InitTypeDef; |
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| 76 | |||
| 77 | /** |
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| 78 | * @brief HAL UART State structures definition |
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| 79 | * @note HAL UART State value is a combination of 2 different substates: gState and RxState. |
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| 80 | * - gState contains UART state information related to global Handle management |
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| 81 | * and also information related to Tx operations. |
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| 82 | * gState value coding follow below described bitmap : |
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| 83 | * b7-b6 Error information |
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| 84 | * 00 : No Error |
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| 85 | * 01 : (Not Used) |
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| 86 | * 10 : Timeout |
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| 87 | * 11 : Error |
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| 88 | * b5 Peripheral initialization status |
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| 89 | * 0 : Reset (Peripheral not initialized) |
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| 90 | * 1 : Init done (Peripheral initialized. HAL UART Init function already called) |
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| 91 | * b4-b3 (not used) |
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| 92 | * xx : Should be set to 00 |
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| 93 | * b2 Intrinsic process state |
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| 94 | * 0 : Ready |
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| 95 | * 1 : Busy (Peripheral busy with some configuration or internal operations) |
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| 96 | * b1 (not used) |
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| 97 | * x : Should be set to 0 |
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| 98 | * b0 Tx state |
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| 99 | * 0 : Ready (no Tx operation ongoing) |
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| 100 | * 1 : Busy (Tx operation ongoing) |
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| 101 | * - RxState contains information related to Rx operations. |
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| 102 | * RxState value coding follow below described bitmap : |
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| 103 | * b7-b6 (not used) |
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| 104 | * xx : Should be set to 00 |
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| 105 | * b5 Peripheral initialization status |
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| 106 | * 0 : Reset (Peripheral not initialized) |
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| 107 | * 1 : Init done (Peripheral initialized) |
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| 108 | * b4-b2 (not used) |
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| 109 | * xxx : Should be set to 000 |
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| 110 | * b1 Rx state |
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| 111 | * 0 : Ready (no Rx operation ongoing) |
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| 112 | * 1 : Busy (Rx operation ongoing) |
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| 113 | * b0 (not used) |
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| 114 | * x : Should be set to 0. |
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| 115 | */ |
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| 116 | typedef enum |
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| 117 | { |
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| 118 | HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized |
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| 119 | Value is allowed for gState and RxState */ |
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| 120 | HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use |
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| 121 | Value is allowed for gState and RxState */ |
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| 122 | HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing |
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| 123 | Value is allowed for gState only */ |
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| 124 | HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing |
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| 125 | Value is allowed for gState only */ |
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| 126 | HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing |
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| 127 | Value is allowed for RxState only */ |
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| 128 | HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing |
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| 129 | Not to be used for neither gState nor RxState. |
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| 130 | Value is result of combination (Or) between gState and RxState values */ |
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| 131 | HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state |
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| 132 | Value is allowed for gState only */ |
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| 133 | HAL_UART_STATE_ERROR = 0xE0U /*!< Error |
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| 134 | Value is allowed for gState only */ |
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| 135 | } HAL_UART_StateTypeDef; |
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| 136 | |||
| 137 | /** |
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| 138 | * @brief HAL UART Reception type definition |
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| 139 | * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. |
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| 140 | * This parameter can be a value of @ref UART_Reception_Type_Values : |
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| 141 | * HAL_UART_RECEPTION_STANDARD = 0x00U, |
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| 142 | * HAL_UART_RECEPTION_TOIDLE = 0x01U, |
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| 143 | */ |
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| 144 | typedef uint32_t HAL_UART_RxTypeTypeDef; |
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| 145 | |||
| 146 | /** |
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| 147 | * @brief HAL UART Rx Event type definition |
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| 148 | * @note HAL UART Rx Event type value aims to identify which type of Event has occurred |
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| 149 | * leading to call of the RxEvent callback. |
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| 150 | * This parameter can be a value of @ref UART_RxEvent_Type_Values : |
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| 151 | * HAL_UART_RXEVENT_TC = 0x00U, |
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| 152 | * HAL_UART_RXEVENT_HT = 0x01U, |
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| 153 | * HAL_UART_RXEVENT_IDLE = 0x02U, |
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| 154 | */ |
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| 155 | typedef uint32_t HAL_UART_RxEventTypeTypeDef; |
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| 156 | |||
| 157 | /** |
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| 158 | * @brief UART handle Structure definition |
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| 159 | */ |
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| 160 | typedef struct __UART_HandleTypeDef |
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| 161 | { |
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| 162 | USART_TypeDef *Instance; /*!< UART registers base address */ |
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| 163 | |||
| 164 | UART_InitTypeDef Init; /*!< UART communication parameters */ |
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| 165 | |||
| 166 | const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ |
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| 167 | |||
| 168 | uint16_t TxXferSize; /*!< UART Tx Transfer size */ |
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| 169 | |||
| 170 | __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ |
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| 171 | |||
| 172 | uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ |
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| 173 | |||
| 174 | uint16_t RxXferSize; /*!< UART Rx Transfer size */ |
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| 175 | |||
| 176 | __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ |
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| 177 | |||
| 178 | __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ |
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| 179 | |||
| 180 | __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */ |
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| 181 | |||
| 182 | DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ |
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| 183 | |||
| 184 | DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ |
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| 185 | |||
| 186 | HAL_LockTypeDef Lock; /*!< Locking object */ |
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| 187 | |||
| 188 | __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management |
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| 189 | and also related to Tx operations. |
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| 190 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
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| 191 | |||
| 192 | __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. |
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| 193 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
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| 194 | |||
| 195 | __IO uint32_t ErrorCode; /*!< UART Error code */ |
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| 196 | |||
| 197 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
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| 198 | void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ |
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| 199 | void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ |
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| 200 | void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ |
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| 201 | void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ |
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| 202 | void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ |
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| 203 | void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ |
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| 204 | void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ |
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| 205 | void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ |
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| 206 | void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ |
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| 207 | void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ |
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| 208 | |||
| 209 | void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ |
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| 210 | void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ |
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| 211 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
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| 212 | |||
| 213 | } UART_HandleTypeDef; |
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| 214 | |||
| 215 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
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| 216 | /** |
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| 217 | * @brief HAL UART Callback ID enumeration definition |
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| 218 | */ |
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| 219 | typedef enum |
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| 220 | { |
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| 221 | HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ |
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| 222 | HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ |
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| 223 | HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ |
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| 224 | HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ |
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| 225 | HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ |
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| 226 | HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ |
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| 227 | HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ |
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| 228 | HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ |
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| 229 | HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ |
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| 230 | |||
| 231 | HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ |
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| 232 | HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ |
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| 233 | |||
| 234 | } HAL_UART_CallbackIDTypeDef; |
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| 235 | |||
| 236 | /** |
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| 237 | * @brief HAL UART Callback pointer definition |
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| 238 | */ |
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| 239 | typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ |
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| 240 | typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ |
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| 241 | |||
| 242 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
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| 243 | |||
| 244 | /** |
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| 245 | * @} |
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| 246 | */ |
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| 247 | |||
| 248 | /* Exported constants --------------------------------------------------------*/ |
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| 249 | /** @defgroup UART_Exported_Constants UART Exported Constants |
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| 250 | * @{ |
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| 251 | */ |
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| 252 | |||
| 253 | /** @defgroup UART_Error_Code UART Error Code |
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| 254 | * @{ |
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| 255 | */ |
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| 256 | #define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */ |
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| 257 | #define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */ |
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| 258 | #define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */ |
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| 259 | #define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */ |
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| 260 | #define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */ |
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| 261 | #define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
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| 262 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
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| 263 | #define HAL_UART_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid Callback error */ |
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| 264 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
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| 265 | /** |
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| 266 | * @} |
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| 267 | */ |
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| 268 | |||
| 269 | /** @defgroup UART_Word_Length UART Word Length |
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| 270 | * @{ |
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| 271 | */ |
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| 272 | #define UART_WORDLENGTH_8B 0x00000000U |
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| 273 | #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
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| 274 | /** |
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| 275 | * @} |
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| 276 | */ |
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| 277 | |||
| 278 | /** @defgroup UART_Stop_Bits UART Number of Stop Bits |
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| 279 | * @{ |
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| 280 | */ |
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| 281 | #define UART_STOPBITS_1 0x00000000U |
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| 282 | #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
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| 283 | /** |
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| 284 | * @} |
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| 285 | */ |
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| 286 | |||
| 287 | /** @defgroup UART_Parity UART Parity |
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| 288 | * @{ |
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| 289 | */ |
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| 290 | #define UART_PARITY_NONE 0x00000000U |
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| 291 | #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
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| 292 | #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
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| 293 | /** |
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| 294 | * @} |
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| 295 | */ |
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| 296 | |||
| 297 | /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control |
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| 298 | * @{ |
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| 299 | */ |
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| 300 | #define UART_HWCONTROL_NONE 0x00000000U |
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| 301 | #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) |
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| 302 | #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) |
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| 303 | #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) |
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| 304 | /** |
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| 305 | * @} |
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| 306 | */ |
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| 307 | |||
| 308 | /** @defgroup UART_Mode UART Transfer Mode |
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| 309 | * @{ |
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| 310 | */ |
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| 311 | #define UART_MODE_RX ((uint32_t)USART_CR1_RE) |
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| 312 | #define UART_MODE_TX ((uint32_t)USART_CR1_TE) |
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| 313 | #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE | USART_CR1_RE)) |
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| 314 | /** |
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| 315 | * @} |
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| 316 | */ |
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| 317 | |||
| 318 | /** @defgroup UART_State UART State |
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| 319 | * @{ |
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| 320 | */ |
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| 321 | #define UART_STATE_DISABLE 0x00000000U |
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| 322 | #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) |
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| 323 | /** |
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| 324 | * @} |
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| 325 | */ |
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| 326 | |||
| 327 | /** @defgroup UART_Over_Sampling UART Over Sampling |
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| 328 | * @{ |
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| 329 | */ |
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| 330 | #define UART_OVERSAMPLING_16 0x00000000U |
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| 331 | #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) |
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| 332 | /** |
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| 333 | * @} |
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| 334 | */ |
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| 335 | |||
| 336 | /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length |
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| 337 | * @{ |
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| 338 | */ |
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| 339 | #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U |
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| 340 | #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) |
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| 341 | /** |
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| 342 | * @} |
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| 343 | */ |
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| 344 | |||
| 345 | /** @defgroup UART_WakeUp_functions UART Wakeup Functions |
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| 346 | * @{ |
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| 347 | */ |
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| 348 | #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U |
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| 349 | #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) |
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| 350 | /** |
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| 351 | * @} |
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| 352 | */ |
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| 353 | |||
| 354 | /** @defgroup UART_Flags UART FLags |
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| 355 | * Elements values convention: 0xXXXX |
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| 356 | * - 0xXXXX : Flag mask in the SR register |
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| 357 | * @{ |
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| 358 | */ |
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| 359 | #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS) |
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| 360 | #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD) |
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| 361 | #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE) |
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| 362 | #define UART_FLAG_TC ((uint32_t)USART_SR_TC) |
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| 363 | #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE) |
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| 364 | #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE) |
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| 365 | #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE) |
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| 366 | #define UART_FLAG_NE ((uint32_t)USART_SR_NE) |
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| 367 | #define UART_FLAG_FE ((uint32_t)USART_SR_FE) |
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| 368 | #define UART_FLAG_PE ((uint32_t)USART_SR_PE) |
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| 369 | /** |
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| 370 | * @} |
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| 371 | */ |
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| 372 | |||
| 373 | /** @defgroup UART_Interrupt_definition UART Interrupt Definitions |
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| 374 | * Elements values convention: 0xY000XXXX |
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| 375 | * - XXXX : Interrupt mask (16 bits) in the Y register |
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| 376 | * - Y : Interrupt source register (2bits) |
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| 377 | * - 0001: CR1 register |
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| 378 | * - 0010: CR2 register |
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| 379 | * - 0011: CR3 register |
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| 380 | * @{ |
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| 381 | */ |
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| 382 | |||
| 383 | #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE)) |
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| 384 | #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE)) |
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| 385 | #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE)) |
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| 386 | #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE)) |
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| 387 | #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE)) |
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| 388 | |||
| 389 | #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE)) |
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| 390 | |||
| 391 | #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE)) |
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| 392 | #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE)) |
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| 393 | /** |
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| 394 | * @} |
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| 395 | */ |
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| 396 | |||
| 397 | /** @defgroup UART_Reception_Type_Values UART Reception type values |
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| 398 | * @{ |
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| 399 | */ |
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| 400 | #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ |
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| 401 | #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ |
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| 402 | /** |
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| 403 | * @} |
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| 404 | */ |
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| 405 | |||
| 406 | /** @defgroup UART_RxEvent_Type_Values UART RxEvent type values |
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| 407 | * @{ |
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| 408 | */ |
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| 409 | #define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */ |
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| 410 | #define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */ |
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| 411 | #define HAL_UART_RXEVENT_IDLE (0x00000002U) |
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| 412 | /** |
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| 413 | * @} |
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| 414 | */ |
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| 415 | |||
| 416 | /** |
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| 417 | * @} |
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| 418 | */ |
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| 419 | |||
| 420 | /* Exported macro ------------------------------------------------------------*/ |
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| 421 | /** @defgroup UART_Exported_Macros UART Exported Macros |
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| 422 | * @{ |
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| 423 | */ |
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| 424 | |||
| 425 | /** @brief Reset UART handle gstate & RxState |
||
| 426 | * @param __HANDLE__ specifies the UART Handle. |
||
| 427 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 428 | * (USART,UART availability and x,y values depending on device). |
||
| 429 | * @retval None |
||
| 430 | */ |
||
| 431 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
||
| 432 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
||
| 433 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
||
| 434 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
||
| 435 | (__HANDLE__)->MspInitCallback = NULL; \ |
||
| 436 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
||
| 437 | } while(0U) |
||
| 438 | #else |
||
| 439 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
||
| 440 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
||
| 441 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
||
| 442 | } while(0U) |
||
| 443 | #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ |
||
| 444 | |||
| 445 | /** @brief Flushes the UART DR register |
||
| 446 | * @param __HANDLE__ specifies the UART Handle. |
||
| 447 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 448 | * (USART,UART availability and x,y values depending on device). |
||
| 449 | */ |
||
| 450 | #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR) |
||
| 451 | |||
| 452 | /** @brief Checks whether the specified UART flag is set or not. |
||
| 453 | * @param __HANDLE__ specifies the UART Handle. |
||
| 454 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 455 | * (USART,UART availability and x,y values depending on device). |
||
| 456 | * @param __FLAG__ specifies the flag to check. |
||
| 457 | * This parameter can be one of the following values: |
||
| 458 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) |
||
| 459 | * @arg UART_FLAG_LBD: LIN Break detection flag |
||
| 460 | * @arg UART_FLAG_TXE: Transmit data register empty flag |
||
| 461 | * @arg UART_FLAG_TC: Transmission Complete flag |
||
| 462 | * @arg UART_FLAG_RXNE: Receive data register not empty flag |
||
| 463 | * @arg UART_FLAG_IDLE: Idle Line detection flag |
||
| 464 | * @arg UART_FLAG_ORE: Overrun Error flag |
||
| 465 | * @arg UART_FLAG_NE: Noise Error flag |
||
| 466 | * @arg UART_FLAG_FE: Framing Error flag |
||
| 467 | * @arg UART_FLAG_PE: Parity Error flag |
||
| 468 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
||
| 469 | */ |
||
| 470 | #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
||
| 471 | |||
| 472 | /** @brief Clears the specified UART pending flag. |
||
| 473 | * @param __HANDLE__ specifies the UART Handle. |
||
| 474 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 475 | * (USART,UART availability and x,y values depending on device). |
||
| 476 | * @param __FLAG__ specifies the flag to check. |
||
| 477 | * This parameter can be any combination of the following values: |
||
| 478 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). |
||
| 479 | * @arg UART_FLAG_LBD: LIN Break detection flag. |
||
| 480 | * @arg UART_FLAG_TC: Transmission Complete flag. |
||
| 481 | * @arg UART_FLAG_RXNE: Receive data register not empty flag. |
||
| 482 | * |
||
| 483 | * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun |
||
| 484 | * error) and IDLE (Idle line detected) flags are cleared by software |
||
| 485 | * sequence: a read operation to USART_SR register followed by a read |
||
| 486 | * operation to USART_DR register. |
||
| 487 | * @note RXNE flag can be also cleared by a read to the USART_DR register. |
||
| 488 | * @note TC flag can be also cleared by software sequence: a read operation to |
||
| 489 | * USART_SR register followed by a write operation to USART_DR register. |
||
| 490 | * @note TXE flag is cleared only by a write to the USART_DR register. |
||
| 491 | * |
||
| 492 | * @retval None |
||
| 493 | */ |
||
| 494 | #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) |
||
| 495 | |||
| 496 | /** @brief Clears the UART PE pending flag. |
||
| 497 | * @param __HANDLE__ specifies the UART Handle. |
||
| 498 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 499 | * (USART,UART availability and x,y values depending on device). |
||
| 500 | * @retval None |
||
| 501 | */ |
||
| 502 | #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \ |
||
| 503 | do{ \ |
||
| 504 | __IO uint32_t tmpreg = 0x00U; \ |
||
| 505 | tmpreg = (__HANDLE__)->Instance->SR; \ |
||
| 506 | tmpreg = (__HANDLE__)->Instance->DR; \ |
||
| 507 | UNUSED(tmpreg); \ |
||
| 508 | } while(0U) |
||
| 509 | |||
| 510 | /** @brief Clears the UART FE pending flag. |
||
| 511 | * @param __HANDLE__ specifies the UART Handle. |
||
| 512 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 513 | * (USART,UART availability and x,y values depending on device). |
||
| 514 | * @retval None |
||
| 515 | */ |
||
| 516 | #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
| 517 | |||
| 518 | /** @brief Clears the UART NE pending flag. |
||
| 519 | * @param __HANDLE__ specifies the UART Handle. |
||
| 520 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 521 | * (USART,UART availability and x,y values depending on device). |
||
| 522 | * @retval None |
||
| 523 | */ |
||
| 524 | #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
| 525 | |||
| 526 | /** @brief Clears the UART ORE pending flag. |
||
| 527 | * @param __HANDLE__ specifies the UART Handle. |
||
| 528 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 529 | * (USART,UART availability and x,y values depending on device). |
||
| 530 | * @retval None |
||
| 531 | */ |
||
| 532 | #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
| 533 | |||
| 534 | /** @brief Clears the UART IDLE pending flag. |
||
| 535 | * @param __HANDLE__ specifies the UART Handle. |
||
| 536 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 537 | * (USART,UART availability and x,y values depending on device). |
||
| 538 | * @retval None |
||
| 539 | */ |
||
| 540 | #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
| 541 | |||
| 542 | /** @brief Enable the specified UART interrupt. |
||
| 543 | * @param __HANDLE__ specifies the UART Handle. |
||
| 544 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 545 | * (USART,UART availability and x,y values depending on device). |
||
| 546 | * @param __INTERRUPT__ specifies the UART interrupt source to enable. |
||
| 547 | * This parameter can be one of the following values: |
||
| 548 | * @arg UART_IT_CTS: CTS change interrupt |
||
| 549 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
| 550 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
| 551 | * @arg UART_IT_TC: Transmission complete interrupt |
||
| 552 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
| 553 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
| 554 | * @arg UART_IT_PE: Parity Error interrupt |
||
| 555 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
||
| 556 | * @retval None |
||
| 557 | */ |
||
| 558 | #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
||
| 559 | (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
||
| 560 | ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK))) |
||
| 561 | |||
| 562 | /** @brief Disable the specified UART interrupt. |
||
| 563 | * @param __HANDLE__ specifies the UART Handle. |
||
| 564 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 565 | * (USART,UART availability and x,y values depending on device). |
||
| 566 | * @param __INTERRUPT__ specifies the UART interrupt source to disable. |
||
| 567 | * This parameter can be one of the following values: |
||
| 568 | * @arg UART_IT_CTS: CTS change interrupt |
||
| 569 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
| 570 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
| 571 | * @arg UART_IT_TC: Transmission complete interrupt |
||
| 572 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
| 573 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
| 574 | * @arg UART_IT_PE: Parity Error interrupt |
||
| 575 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
||
| 576 | * @retval None |
||
| 577 | */ |
||
| 578 | #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
||
| 579 | (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
||
| 580 | ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK))) |
||
| 581 | |||
| 582 | /** @brief Checks whether the specified UART interrupt source is enabled or not. |
||
| 583 | * @param __HANDLE__ specifies the UART Handle. |
||
| 584 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 585 | * (USART,UART availability and x,y values depending on device). |
||
| 586 | * @param __IT__ specifies the UART interrupt source to check. |
||
| 587 | * This parameter can be one of the following values: |
||
| 588 | * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) |
||
| 589 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
| 590 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
| 591 | * @arg UART_IT_TC: Transmission complete interrupt |
||
| 592 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
| 593 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
| 594 | * @arg UART_IT_ERR: Error interrupt |
||
| 595 | * @retval The new state of __IT__ (TRUE or FALSE). |
||
| 596 | */ |
||
| 597 | #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \ |
||
| 598 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK)) |
||
| 599 | |||
| 600 | /** @brief Enable CTS flow control |
||
| 601 | * @note This macro allows to enable CTS hardware flow control for a given UART instance, |
||
| 602 | * without need to call HAL_UART_Init() function. |
||
| 603 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 604 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
||
| 605 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 606 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 607 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
| 608 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
| 609 | * @param __HANDLE__ specifies the UART Handle. |
||
| 610 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
| 611 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
| 612 | * @retval None |
||
| 613 | */ |
||
| 614 | #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ |
||
| 615 | do{ \ |
||
| 616 | ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
||
| 617 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ |
||
| 618 | } while(0U) |
||
| 619 | |||
| 620 | /** @brief Disable CTS flow control |
||
| 621 | * @note This macro allows to disable CTS hardware flow control for a given UART instance, |
||
| 622 | * without need to call HAL_UART_Init() function. |
||
| 623 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 624 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
||
| 625 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 626 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 627 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
| 628 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
| 629 | * @param __HANDLE__ specifies the UART Handle. |
||
| 630 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
| 631 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
| 632 | * @retval None |
||
| 633 | */ |
||
| 634 | #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ |
||
| 635 | do{ \ |
||
| 636 | ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
||
| 637 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ |
||
| 638 | } while(0U) |
||
| 639 | |||
| 640 | /** @brief Enable RTS flow control |
||
| 641 | * This macro allows to enable RTS hardware flow control for a given UART instance, |
||
| 642 | * without need to call HAL_UART_Init() function. |
||
| 643 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 644 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
||
| 645 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 646 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 647 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
| 648 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
| 649 | * @param __HANDLE__ specifies the UART Handle. |
||
| 650 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
| 651 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
| 652 | * @retval None |
||
| 653 | */ |
||
| 654 | #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ |
||
| 655 | do{ \ |
||
| 656 | ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ |
||
| 657 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ |
||
| 658 | } while(0U) |
||
| 659 | |||
| 660 | /** @brief Disable RTS flow control |
||
| 661 | * This macro allows to disable RTS hardware flow control for a given UART instance, |
||
| 662 | * without need to call HAL_UART_Init() function. |
||
| 663 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 664 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
||
| 665 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 666 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 667 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
| 668 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
| 669 | * @param __HANDLE__ specifies the UART Handle. |
||
| 670 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
| 671 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
| 672 | * @retval None |
||
| 673 | */ |
||
| 674 | #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ |
||
| 675 | do{ \ |
||
| 676 | ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ |
||
| 677 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ |
||
| 678 | } while(0U) |
||
| 679 | |||
| 680 | /** @brief Macro to enable the UART's one bit sample method |
||
| 681 | * @param __HANDLE__ specifies the UART Handle. |
||
| 682 | * @retval None |
||
| 683 | */ |
||
| 684 | #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
||
| 685 | |||
| 686 | /** @brief Macro to disable the UART's one bit sample method |
||
| 687 | * @param __HANDLE__ specifies the UART Handle. |
||
| 688 | * @retval None |
||
| 689 | */ |
||
| 690 | #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3\ |
||
| 691 | &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT)) |
||
| 692 | |||
| 693 | /** @brief Enable UART |
||
| 694 | * @param __HANDLE__ specifies the UART Handle. |
||
| 695 | * @retval None |
||
| 696 | */ |
||
| 697 | #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
||
| 698 | |||
| 699 | /** @brief Disable UART |
||
| 700 | * @param __HANDLE__ specifies the UART Handle. |
||
| 701 | * @retval None |
||
| 702 | */ |
||
| 703 | #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
||
| 704 | /** |
||
| 705 | * @} |
||
| 706 | */ |
||
| 707 | |||
| 708 | /* Exported functions --------------------------------------------------------*/ |
||
| 709 | /** @addtogroup UART_Exported_Functions |
||
| 710 | * @{ |
||
| 711 | */ |
||
| 712 | |||
| 713 | /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions |
||
| 714 | * @{ |
||
| 715 | */ |
||
| 716 | |||
| 717 | /* Initialization/de-initialization functions **********************************/ |
||
| 718 | HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); |
||
| 719 | HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); |
||
| 720 | HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); |
||
| 721 | HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); |
||
| 722 | HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); |
||
| 723 | void HAL_UART_MspInit(UART_HandleTypeDef *huart); |
||
| 724 | void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); |
||
| 725 | |||
| 726 | /* Callbacks Register/UnRegister functions ***********************************/ |
||
| 727 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
||
| 728 | HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, |
||
| 729 | pUART_CallbackTypeDef pCallback); |
||
| 730 | HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); |
||
| 731 | |||
| 732 | HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); |
||
| 733 | HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); |
||
| 734 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
||
| 735 | |||
| 736 | /** |
||
| 737 | * @} |
||
| 738 | */ |
||
| 739 | |||
| 740 | /** @addtogroup UART_Exported_Functions_Group2 IO operation functions |
||
| 741 | * @{ |
||
| 742 | */ |
||
| 743 | |||
| 744 | /* IO operation functions *******************************************************/ |
||
| 745 | HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
| 746 | HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
| 747 | HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); |
||
| 748 | HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 749 | HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); |
||
| 750 | HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 751 | HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); |
||
| 752 | HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); |
||
| 753 | HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); |
||
| 754 | |||
| 755 | HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, |
||
| 756 | uint32_t Timeout); |
||
| 757 | HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 758 | HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 759 | |||
| 760 | HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(UART_HandleTypeDef *huart); |
||
| 761 | |||
| 762 | /* Transfer Abort functions */ |
||
| 763 | HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); |
||
| 764 | HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); |
||
| 765 | HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); |
||
| 766 | HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); |
||
| 767 | HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); |
||
| 768 | HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); |
||
| 769 | |||
| 770 | void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); |
||
| 771 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); |
||
| 772 | void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); |
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| 773 | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); |
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| 774 | void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); |
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| 775 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); |
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| 776 | void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); |
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| 777 | void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); |
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| 778 | void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); |
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| 779 | |||
| 780 | void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); |
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| 781 | |||
| 782 | /** |
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| 783 | * @} |
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| 784 | */ |
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| 785 | |||
| 786 | /** @addtogroup UART_Exported_Functions_Group3 |
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| 787 | * @{ |
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| 788 | */ |
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| 789 | /* Peripheral Control functions ************************************************/ |
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| 790 | HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); |
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| 791 | HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); |
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| 792 | HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart); |
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| 793 | HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); |
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| 794 | HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); |
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| 795 | /** |
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| 796 | * @} |
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| 797 | */ |
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| 798 | |||
| 799 | /** @addtogroup UART_Exported_Functions_Group4 |
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| 800 | * @{ |
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| 801 | */ |
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| 802 | /* Peripheral State functions **************************************************/ |
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| 803 | HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); |
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| 804 | uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); |
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| 805 | /** |
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| 806 | * @} |
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| 807 | */ |
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| 808 | |||
| 809 | /** |
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| 810 | * @} |
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| 811 | */ |
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| 812 | /* Private types -------------------------------------------------------------*/ |
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| 813 | /* Private variables ---------------------------------------------------------*/ |
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| 814 | /* Private constants ---------------------------------------------------------*/ |
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| 815 | /** @defgroup UART_Private_Constants UART Private Constants |
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| 816 | * @{ |
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| 817 | */ |
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| 818 | /** @brief UART interruptions flag mask |
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| 819 | * |
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| 820 | */ |
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| 821 | #define UART_IT_MASK 0x0000FFFFU |
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| 822 | |||
| 823 | #define UART_CR1_REG_INDEX 1U |
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| 824 | #define UART_CR2_REG_INDEX 2U |
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| 825 | #define UART_CR3_REG_INDEX 3U |
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| 826 | /** |
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| 827 | * @} |
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| 828 | */ |
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| 829 | |||
| 830 | /* Private macros ------------------------------------------------------------*/ |
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| 831 | /** @defgroup UART_Private_Macros UART Private Macros |
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| 832 | * @{ |
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| 833 | */ |
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| 834 | #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \ |
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| 835 | ((LENGTH) == UART_WORDLENGTH_9B)) |
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| 836 | #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B)) |
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| 837 | #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \ |
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| 838 | ((STOPBITS) == UART_STOPBITS_2)) |
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| 839 | #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \ |
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| 840 | ((PARITY) == UART_PARITY_EVEN) || \ |
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| 841 | ((PARITY) == UART_PARITY_ODD)) |
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| 842 | #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ |
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| 843 | (((CONTROL) == UART_HWCONTROL_NONE) || \ |
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| 844 | ((CONTROL) == UART_HWCONTROL_RTS) || \ |
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| 845 | ((CONTROL) == UART_HWCONTROL_CTS) || \ |
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| 846 | ((CONTROL) == UART_HWCONTROL_RTS_CTS)) |
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| 847 | #define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U)) |
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| 848 | #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \ |
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| 849 | ((STATE) == UART_STATE_ENABLE)) |
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| 850 | #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \ |
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| 851 | ((SAMPLING) == UART_OVERSAMPLING_8)) |
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| 852 | #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16)) |
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| 853 | #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \ |
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| 854 | ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B)) |
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| 855 | #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \ |
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| 856 | ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK)) |
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| 857 | #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) <= 4000000U) |
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| 858 | #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU) |
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| 859 | |||
| 860 | #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_))) |
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| 861 | #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U) |
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| 862 | #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U)\ |
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| 863 | + 50U) / 100U) |
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| 864 | /* UART BRR = mantissa + overflow + fraction |
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| 865 | = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */ |
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| 866 | #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \ |
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| 867 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \ |
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| 868 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU)) |
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| 869 | |||
| 870 | #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_))) |
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| 871 | #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U) |
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| 872 | #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U)\ |
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| 873 | + 50U) / 100U) |
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| 874 | /* UART BRR = mantissa + overflow + fraction |
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| 875 | = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */ |
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| 876 | #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \ |
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| 877 | ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \ |
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| 878 | (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U)) |
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| 879 | |||
| 880 | /** |
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| 881 | * @} |
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| 882 | */ |
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| 883 | |||
| 884 | /* Private functions ---------------------------------------------------------*/ |
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| 885 | /** @defgroup UART_Private_Functions UART Private Functions |
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| 886 | * @{ |
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| 887 | */ |
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| 888 | |||
| 889 | HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
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| 890 | HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
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| 891 | |||
| 892 | /** |
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| 893 | * @} |
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| 894 | */ |
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| 895 | |||
| 896 | /** |
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| 897 | * @} |
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| 898 | */ |
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| 899 | |||
| 900 | /** |
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| 901 | * @} |
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| 902 | */ |
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| 903 | |||
| 904 | #ifdef __cplusplus |
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| 905 | } |
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| 906 | #endif |
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| 907 | |||
| 908 | #endif /* __STM32L1xx_HAL_UART_H */ |
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| 909 |