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77 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32l1xx_hal_tim_ex.h |
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4 | * @author MCD Application Team |
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5 | * @brief Header file of TIM HAL Extended module. |
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6 | ****************************************************************************** |
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7 | * @attention |
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8 | * |
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9 | * Copyright (c) 2016 STMicroelectronics. |
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10 | * All rights reserved. |
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11 | * |
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12 | * This software is licensed under terms that can be found in the LICENSE file |
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13 | * in the root directory of this software component. |
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14 | * If no LICENSE file comes with this software, it is provided AS-IS. |
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15 | * |
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16 | ****************************************************************************** |
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17 | */ |
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18 | |||
19 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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20 | #ifndef STM32L1xx_HAL_TIM_EX_H |
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21 | #define STM32L1xx_HAL_TIM_EX_H |
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22 | |||
23 | #ifdef __cplusplus |
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24 | extern "C" { |
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25 | #endif |
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26 | |||
27 | /* Includes ------------------------------------------------------------------*/ |
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28 | #include "stm32l1xx_hal_def.h" |
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29 | |||
30 | /** @addtogroup STM32L1xx_HAL_Driver |
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31 | * @{ |
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32 | */ |
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33 | |||
34 | /** @addtogroup TIMEx |
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35 | * @{ |
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36 | */ |
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37 | |||
38 | /* Exported types ------------------------------------------------------------*/ |
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39 | /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types |
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40 | * @{ |
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41 | */ |
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42 | |||
43 | /** |
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44 | * @} |
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45 | */ |
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46 | /* End of exported types -----------------------------------------------------*/ |
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47 | |||
48 | /* Exported constants --------------------------------------------------------*/ |
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49 | /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants |
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50 | * @{ |
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51 | */ |
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52 | |||
53 | /** @defgroup TIMEx_Remap TIM Extended Remapping |
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54 | * @{ |
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55 | */ |
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56 | /* @note STM32L1XX devices are organized in 6 categories: Cat.1, Cat.2, Cat.3, Cat.4, Cat.5, Cat.6. |
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57 | Remap capabilities depend on the device category. As the DMA2 controller is available only in |
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58 | Cat.3, Cat.4,Cat.5 and Cat.6 devices it is used to discriminate Cat.1 and Cat.2 devices v.s. |
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59 | Cat.3, Cat.4, Cat.5 and Cat.6 devices. */ |
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60 | #if defined(DMA2) |
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61 | #define TIM_TIM2_ITR1_TIM10_OC (0x00000000) /*!< TIM2 ITR1 input is connected to TIM10 OC */ |
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62 | #define TIM_TIM2_ITR1_TIM5_TGO TIM2_OR_ITR1_RMP /*!< TIM2 ITR1 input is connected to TIM5 TGO */ |
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63 | #endif /* DMA2 */ |
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64 | |||
65 | #if defined(DMA2) |
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66 | #define TIM_TIM3_ITR2_TIM11_OC (0x00000000) /*!< TIM3 ITR2 input is connected to TIM11 OC */ |
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67 | #define TIM_TIM3_ITR2_TIM5_TGO TIM2_OR_ITR1_RMP /*!< TIM3 ITR2 input is connected to TIM5 TGO */ |
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68 | #endif /* DMA2 */ |
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69 | |||
70 | #if defined(DMA2) |
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71 | #define TIM_TIM9_ITR1_TIM3_TGO (0x00000000) /*!< TIM9 ITR1 input is connected to TIM3 TGO */ |
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72 | #define TIM_TIM9_ITR1_TS TIM9_OR_ITR1_RMP /*!< TIM9 ITR1 input is connected to touch sensing I/O */ |
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73 | #endif /* DMA2 */ |
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74 | #define TIM_TIM9_GPIO (0x00000000) /*!< TIM9 Channel1 is connected to GPIO */ |
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75 | #define TIM_TIM9_LSE TIM_OR_TI1RMP_0 /*!< TIM9 Channel1 is connected to LSE internal clock */ |
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76 | #define TIM_TIM9_GPIO1 TIM_OR_TI1RMP_1 /*!< TIM9 Channel1 is connected to GPIO */ |
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77 | #define TIM_TIM9_GPIO2 TIM_OR_TI1RMP /*!< TIM9 Channel1 is connected to GPIO */ |
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78 | |||
79 | #if defined(DMA2) |
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80 | #define TIM_TIM10_TI1RMP (0x00000000) /*!< TIM10 Channel 1 depends on TI1_RMP */ |
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81 | #define TIM_TIM10_RI TIM_OR_TI1_RMP_RI /*!< TIM10 Channel 1 is connected to RI */ |
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82 | #define TIM_TIM10_ETR_LSE (0x00000000) /*!< TIM10 ETR input is connected to LSE clock */ |
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83 | #define TIM_TIM10_ETR_TIM9_TGO TIM_OR_ETR_RMP /*!< TIM10 ETR input is connected to TIM9 TGO */ |
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84 | #endif /* DMA2 */ |
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85 | #define TIM_TIM10_GPIO (0x00000000) /*!< TIM10 Channel1 is connected to GPIO */ |
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86 | #define TIM_TIM10_LSI TIM_OR_TI1RMP_0 /*!< TIM10 Channel1 is connected to LSI internal clock */ |
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87 | #define TIM_TIM10_LSE TIM_OR_TI1RMP_1 /*!< TIM10 Channel1 is connected to LSE internal clock */ |
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88 | #define TIM_TIM10_RTC TIM_OR_TI1RMP /*!< TIM10 Channel1 is connected to RTC wakeup interrupt */ |
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89 | |||
90 | #if defined(DMA2) |
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91 | #define TIM_TIM11_TI1RMP (0x00000000) /*!< TIM11 Channel 1 depends on TI1_RMP */ |
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92 | #define TIM_TIM11_RI TIM_OR_TI1_RMP_RI /*!< TIM11 Channel 1 is connected to RI */ |
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93 | #define TIM_TIM11_ETR_LSE (0x00000000) /*!< TIM11 ETR input is connected to LSE clock */ |
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94 | #define TIM_TIM11_ETR_TIM9_TGO TIM_OR_ETR_RMP /*!< TIM11 ETR input is connected to TIM9 TGO */ |
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95 | #endif /* DMA2 */ |
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96 | #define TIM_TIM11_GPIO (0x00000000) /*!< TIM11 Channel1 is connected to GPIO */ |
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97 | #define TIM_TIM11_MSI TIM_OR_TI1RMP_0 /*!< TIM11 Channel1 is connected to MSI internal clock */ |
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98 | #define TIM_TIM11_HSE_RTC TIM_OR_TI1RMP_1 /*!< TIM11 Channel1 is connected to HSE_RTC clock */ |
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99 | #define TIM_TIM11_GPIO1 TIM_OR_TI1RMP /*!< TIM11 Channel1 is connected to GPIO */ |
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100 | /** |
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101 | * @} |
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102 | */ |
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103 | |||
104 | /** |
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105 | * @} |
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106 | */ |
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107 | /* End of exported constants -------------------------------------------------*/ |
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108 | |||
109 | /* Exported macro ------------------------------------------------------------*/ |
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110 | /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros |
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111 | * @{ |
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112 | */ |
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113 | |||
114 | /** |
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115 | * @} |
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116 | */ |
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117 | /* End of exported macro -----------------------------------------------------*/ |
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118 | |||
119 | /* Private macro -------------------------------------------------------------*/ |
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120 | /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros |
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121 | * @{ |
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122 | */ |
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123 | #if defined(DMA2) |
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124 | #define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \ |
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125 | ( (((INSTANCE) == TIM2) && (((TIM_REMAP) == TIM_TIM2_ITR1_TIM10_OC) || ((TIM_REMAP) == TIM_TIM2_ITR1_TIM5_TGO))) || \ |
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126 | (((INSTANCE) == TIM3) && (((TIM_REMAP) == TIM_TIM3_ITR2_TIM11_OC) || ((TIM_REMAP) == TIM_TIM3_ITR2_TIM5_TGO))) || \ |
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127 | (((INSTANCE) == TIM9) && ((TIM_REMAP) <= (TIM_TIM9_ITR1_TS | TIM_TIM9_GPIO2))) || \ |
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128 | (((INSTANCE) == TIM10) && ((TIM_REMAP) <= (TIM_TIM10_RI | TIM_TIM10_ETR_TIM9_TGO | TIM_TIM10_RTC))) || \ |
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129 | (((INSTANCE) == TIM11) && ((TIM_REMAP) <= (TIM_TIM11_RI | TIM_TIM11_ETR_TIM9_TGO | TIM_TIM11_GPIO1))) \ |
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130 | ) |
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131 | #else |
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132 | #define IS_TIM_REMAP(INSTANCE, TIM_REMAP) \ |
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133 | ( (((INSTANCE) == TIM9) && (((TIM_REMAP) == TIM_TIM9_GPIO) || ((TIM_REMAP) == TIM_TIM9_LSE) || ((TIM_REMAP) == TIM_TIM9_GPIO1) || ((TIM_REMAP) == TIM_TIM9_GPIO2))) || \ |
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134 | (((INSTANCE) == TIM10) && (((TIM_REMAP) == TIM_TIM10_GPIO) || ((TIM_REMAP) == TIM_TIM10_LSI) || ((TIM_REMAP) == TIM_TIM10_LSE) || ((TIM_REMAP) == TIM_TIM10_RTC))) || \ |
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135 | (((INSTANCE) == TIM11) && (((TIM_REMAP) == TIM_TIM11_GPIO) || ((TIM_REMAP) == TIM_TIM11_MSI) || ((TIM_REMAP) == TIM_TIM11_HSE_RTC) || ((TIM_REMAP) == TIM_TIM11_GPIO1))) \ |
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136 | ) |
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137 | #endif /* DMA2 */ |
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138 | |||
139 | /** |
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140 | * @} |
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141 | */ |
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142 | /* End of private macro ------------------------------------------------------*/ |
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143 | |||
144 | /* Exported functions --------------------------------------------------------*/ |
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145 | /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions |
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146 | * @{ |
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147 | */ |
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148 | |||
149 | /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions |
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150 | * @brief Peripheral Control functions |
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151 | * @{ |
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152 | */ |
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153 | /* Extended Control functions ************************************************/ |
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154 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, |
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155 | const TIM_MasterConfigTypeDef *sMasterConfig); |
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156 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); |
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157 | /** |
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158 | * @} |
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159 | */ |
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160 | |||
161 | /** |
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162 | * @} |
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163 | */ |
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164 | /* End of exported functions -------------------------------------------------*/ |
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165 | |||
166 | /** |
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167 | * @} |
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168 | */ |
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169 | |||
170 | /** |
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171 | * @} |
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172 | */ |
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173 | |||
174 | #ifdef __cplusplus |
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175 | } |
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176 | #endif |
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177 | |||
178 | |||
179 | #endif /* STM32L1xx_HAL_TIM_EX_H */ |