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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 77 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32l1xx_hal_lcd.h |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief Header file of LCD Controller HAL module. |
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| 6 | ****************************************************************************** |
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| 7 | * @attention |
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| 8 | * |
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| 9 | * Copyright (c) 2017 STMicroelectronics. |
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| 10 | * All rights reserved. |
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| 11 | * |
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| 12 | * This software is licensed under terms that can be found in the LICENSE file |
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| 13 | * in the root directory of this software component. |
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| 14 | * If no LICENSE file comes with this software, it is provided AS-IS. |
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| 15 | * |
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| 16 | ****************************************************************************** |
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| 17 | */ |
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| 18 | |||
| 19 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 20 | #ifndef __STM32L1xx_HAL_LCD_H |
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| 21 | #define __STM32L1xx_HAL_LCD_H |
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| 22 | |||
| 23 | #ifdef __cplusplus |
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| 24 | extern "C" { |
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| 25 | #endif |
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| 26 | |||
| 27 | /** @addtogroup STM32L1xx_HAL_Driver |
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| 28 | * @{ |
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| 29 | */ |
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| 30 | |||
| 31 | #if defined (STM32L100xB) || defined (STM32L100xBA) || defined (STM32L100xC) ||\ |
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| 32 | defined (STM32L152xB) || defined (STM32L152xBA) || defined (STM32L152xC) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L152xE) || defined (STM32L152xDX) ||\ |
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| 33 | defined (STM32L162xC) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L162xE) || defined (STM32L162xDX) |
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| 34 | |||
| 35 | /* Includes ------------------------------------------------------------------*/ |
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| 36 | #include "stm32l1xx_hal_def.h" |
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| 37 | |||
| 38 | /** @addtogroup LCD |
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| 39 | * @{ |
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| 40 | */ |
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| 41 | |||
| 42 | /* Exported types ------------------------------------------------------------*/ |
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| 43 | |||
| 44 | /** @defgroup LCD_Exported_Types LCD Exported Types |
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| 45 | * @{ |
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| 46 | */ |
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| 47 | |||
| 48 | /** |
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| 49 | * @brief LCD Init structure definition |
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| 50 | */ |
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| 51 | |||
| 52 | typedef struct |
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| 53 | { |
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| 54 | uint32_t Prescaler; /*!< Configures the LCD Prescaler. |
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| 55 | This parameter can be one value of @ref LCD_Prescaler */ |
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| 56 | uint32_t Divider; /*!< Configures the LCD Divider. |
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| 57 | This parameter can be one value of @ref LCD_Divider */ |
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| 58 | uint32_t Duty; /*!< Configures the LCD Duty. |
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| 59 | This parameter can be one value of @ref LCD_Duty */ |
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| 60 | uint32_t Bias; /*!< Configures the LCD Bias. |
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| 61 | This parameter can be one value of @ref LCD_Bias */ |
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| 62 | uint32_t VoltageSource; /*!< Selects the LCD Voltage source. |
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| 63 | This parameter can be one value of @ref LCD_Voltage_Source */ |
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| 64 | uint32_t Contrast; /*!< Configures the LCD Contrast. |
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| 65 | This parameter can be one value of @ref LCD_Contrast */ |
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| 66 | uint32_t DeadTime; /*!< Configures the LCD Dead Time. |
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| 67 | This parameter can be one value of @ref LCD_DeadTime */ |
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| 68 | uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration. |
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| 69 | This parameter can be one value of @ref LCD_PulseOnDuration */ |
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| 70 | uint32_t HighDrive; /*!< Configures the LCD High Drive. |
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| 71 | This parameter can be one value of @ref LCD_HighDrive */ |
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| 72 | uint32_t BlinkMode; /*!< Configures the LCD Blink Mode. |
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| 73 | This parameter can be one value of @ref LCD_BlinkMode */ |
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| 74 | uint32_t BlinkFrequency; /*!< Configures the LCD Blink frequency. |
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| 75 | This parameter can be one value of @ref LCD_BlinkFrequency */ |
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| 76 | uint32_t MuxSegment; /*!< Enable or disable mux segment. |
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| 77 | This parameter can be set to ENABLE or DISABLE. */ |
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| 78 | }LCD_InitTypeDef; |
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| 79 | |||
| 80 | /** |
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| 81 | * @brief HAL LCD State structures definition |
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| 82 | */ |
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| 83 | typedef enum |
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| 84 | { |
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| 85 | HAL_LCD_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */ |
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| 86 | HAL_LCD_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ |
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| 87 | HAL_LCD_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ |
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| 88 | HAL_LCD_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
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| 89 | HAL_LCD_STATE_ERROR = 0x04 /*!< Error */ |
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| 90 | }HAL_LCD_StateTypeDef; |
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| 91 | |||
| 92 | /** |
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| 93 | * @brief UART handle Structure definition |
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| 94 | */ |
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| 95 | typedef struct |
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| 96 | { |
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| 97 | LCD_TypeDef *Instance; /* LCD registers base address */ |
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| 98 | |||
| 99 | LCD_InitTypeDef Init; /* LCD communication parameters */ |
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| 100 | |||
| 101 | HAL_LockTypeDef Lock; /* Locking object */ |
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| 102 | |||
| 103 | __IO HAL_LCD_StateTypeDef State; /* LCD communication state */ |
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| 104 | |||
| 105 | __IO uint32_t ErrorCode; /* LCD Error code */ |
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| 106 | |||
| 107 | }LCD_HandleTypeDef; |
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| 108 | |||
| 109 | /** |
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| 110 | * @} |
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| 111 | */ |
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| 112 | |||
| 113 | /* Exported constants --------------------------------------------------------*/ |
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| 114 | |||
| 115 | /** @defgroup LCD_Exported_Constants LCD Exported Constants |
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| 116 | * @{ |
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| 117 | */ |
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| 118 | |||
| 119 | /** @defgroup LCD_Error_Codes LCD Error Codes |
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| 120 | * @{ |
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| 121 | */ |
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| 122 | |||
| 123 | #define HAL_LCD_ERROR_NONE (0x00U) /*!< No error */ |
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| 124 | #define HAL_LCD_ERROR_FCRSF (0x01U) /*!< Synchro flag timeout error */ |
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| 125 | #define HAL_LCD_ERROR_UDR (0x02U) /*!< Update display request flag timeout error */ |
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| 126 | #define HAL_LCD_ERROR_UDD (0x04U) /*!< Update display done flag timeout error */ |
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| 127 | #define HAL_LCD_ERROR_ENS (0x08U) /*!< LCD enabled status flag timeout error */ |
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| 128 | #define HAL_LCD_ERROR_RDY (0x10U) /*!< LCD Booster ready timeout error */ |
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| 129 | |||
| 130 | /** |
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| 131 | * @} |
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| 132 | */ |
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| 133 | |||
| 134 | /** @defgroup LCD_Prescaler LCD Prescaler |
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| 135 | * @{ |
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| 136 | */ |
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| 137 | |||
| 138 | #define LCD_PRESCALER_1 (0x00000000U) /*!< CLKPS = LCDCLK */ |
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| 139 | #define LCD_PRESCALER_2 (0x00400000U) /*!< CLKPS = LCDCLK/2 */ |
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| 140 | #define LCD_PRESCALER_4 (0x00800000U) /*!< CLKPS = LCDCLK/4 */ |
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| 141 | #define LCD_PRESCALER_8 (0x00C00000U) /*!< CLKPS = LCDCLK/8 */ |
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| 142 | #define LCD_PRESCALER_16 (0x01000000U) /*!< CLKPS = LCDCLK/16 */ |
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| 143 | #define LCD_PRESCALER_32 (0x01400000U) /*!< CLKPS = LCDCLK/32 */ |
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| 144 | #define LCD_PRESCALER_64 (0x01800000U) /*!< CLKPS = LCDCLK/64 */ |
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| 145 | #define LCD_PRESCALER_128 (0x01C00000U) /*!< CLKPS = LCDCLK/128 */ |
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| 146 | #define LCD_PRESCALER_256 (0x02000000U) /*!< CLKPS = LCDCLK/256 */ |
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| 147 | #define LCD_PRESCALER_512 (0x02400000U) /*!< CLKPS = LCDCLK/512 */ |
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| 148 | #define LCD_PRESCALER_1024 (0x02800000U) /*!< CLKPS = LCDCLK/1024 */ |
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| 149 | #define LCD_PRESCALER_2048 (0x02C00000U) /*!< CLKPS = LCDCLK/2048 */ |
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| 150 | #define LCD_PRESCALER_4096 (0x03000000U) /*!< CLKPS = LCDCLK/4096 */ |
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| 151 | #define LCD_PRESCALER_8192 (0x03400000U) /*!< CLKPS = LCDCLK/8192 */ |
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| 152 | #define LCD_PRESCALER_16384 (0x03800000U) /*!< CLKPS = LCDCLK/16384 */ |
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| 153 | #define LCD_PRESCALER_32768 ((uint32_t)LCD_FCR_PS) /*!< CLKPS = LCDCLK/32768 */ |
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| 154 | |||
| 155 | #define IS_LCD_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LCD_PRESCALER_1) || \ |
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| 156 | ((__PRESCALER__) == LCD_PRESCALER_2) || \ |
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| 157 | ((__PRESCALER__) == LCD_PRESCALER_4) || \ |
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| 158 | ((__PRESCALER__) == LCD_PRESCALER_8) || \ |
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| 159 | ((__PRESCALER__) == LCD_PRESCALER_16) || \ |
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| 160 | ((__PRESCALER__) == LCD_PRESCALER_32) || \ |
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| 161 | ((__PRESCALER__) == LCD_PRESCALER_64) || \ |
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| 162 | ((__PRESCALER__) == LCD_PRESCALER_128) || \ |
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| 163 | ((__PRESCALER__) == LCD_PRESCALER_256) || \ |
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| 164 | ((__PRESCALER__) == LCD_PRESCALER_512) || \ |
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| 165 | ((__PRESCALER__) == LCD_PRESCALER_1024) || \ |
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| 166 | ((__PRESCALER__) == LCD_PRESCALER_2048) || \ |
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| 167 | ((__PRESCALER__) == LCD_PRESCALER_4096) || \ |
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| 168 | ((__PRESCALER__) == LCD_PRESCALER_8192) || \ |
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| 169 | ((__PRESCALER__) == LCD_PRESCALER_16384) || \ |
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| 170 | ((__PRESCALER__) == LCD_PRESCALER_32768)) |
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| 171 | |||
| 172 | /** |
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| 173 | * @} |
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| 174 | */ |
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| 175 | |||
| 176 | /** @defgroup LCD_Divider LCD Divider |
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| 177 | * @{ |
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| 178 | */ |
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| 179 | |||
| 180 | #define LCD_DIVIDER_16 (0x00000000U) /*!< LCD frequency = CLKPS/16 */ |
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| 181 | #define LCD_DIVIDER_17 (0x00040000U) /*!< LCD frequency = CLKPS/17 */ |
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| 182 | #define LCD_DIVIDER_18 (0x00080000U) /*!< LCD frequency = CLKPS/18 */ |
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| 183 | #define LCD_DIVIDER_19 (0x000C0000U) /*!< LCD frequency = CLKPS/19 */ |
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| 184 | #define LCD_DIVIDER_20 (0x00100000U) /*!< LCD frequency = CLKPS/20 */ |
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| 185 | #define LCD_DIVIDER_21 (0x00140000U) /*!< LCD frequency = CLKPS/21 */ |
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| 186 | #define LCD_DIVIDER_22 (0x00180000U) /*!< LCD frequency = CLKPS/22 */ |
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| 187 | #define LCD_DIVIDER_23 (0x001C0000U) /*!< LCD frequency = CLKPS/23 */ |
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| 188 | #define LCD_DIVIDER_24 (0x00200000U) /*!< LCD frequency = CLKPS/24 */ |
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| 189 | #define LCD_DIVIDER_25 (0x00240000U) /*!< LCD frequency = CLKPS/25 */ |
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| 190 | #define LCD_DIVIDER_26 (0x00280000U) /*!< LCD frequency = CLKPS/26 */ |
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| 191 | #define LCD_DIVIDER_27 (0x002C0000U) /*!< LCD frequency = CLKPS/27 */ |
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| 192 | #define LCD_DIVIDER_28 (0x00300000U) /*!< LCD frequency = CLKPS/28 */ |
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| 193 | #define LCD_DIVIDER_29 (0x00340000U) /*!< LCD frequency = CLKPS/29 */ |
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| 194 | #define LCD_DIVIDER_30 (0x00380000U) /*!< LCD frequency = CLKPS/30 */ |
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| 195 | #define LCD_DIVIDER_31 ((uint32_t)LCD_FCR_DIV) /*!< LCD frequency = CLKPS/31 */ |
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| 196 | |||
| 197 | #define IS_LCD_DIVIDER(__DIVIDER__) (((__DIVIDER__) == LCD_DIVIDER_16) || \ |
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| 198 | ((__DIVIDER__) == LCD_DIVIDER_17) || \ |
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| 199 | ((__DIVIDER__) == LCD_DIVIDER_18) || \ |
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| 200 | ((__DIVIDER__) == LCD_DIVIDER_19) || \ |
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| 201 | ((__DIVIDER__) == LCD_DIVIDER_20) || \ |
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| 202 | ((__DIVIDER__) == LCD_DIVIDER_21) || \ |
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| 203 | ((__DIVIDER__) == LCD_DIVIDER_22) || \ |
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| 204 | ((__DIVIDER__) == LCD_DIVIDER_23) || \ |
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| 205 | ((__DIVIDER__) == LCD_DIVIDER_24) || \ |
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| 206 | ((__DIVIDER__) == LCD_DIVIDER_25) || \ |
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| 207 | ((__DIVIDER__) == LCD_DIVIDER_26) || \ |
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| 208 | ((__DIVIDER__) == LCD_DIVIDER_27) || \ |
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| 209 | ((__DIVIDER__) == LCD_DIVIDER_28) || \ |
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| 210 | ((__DIVIDER__) == LCD_DIVIDER_29) || \ |
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| 211 | ((__DIVIDER__) == LCD_DIVIDER_30) || \ |
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| 212 | ((__DIVIDER__) == LCD_DIVIDER_31)) |
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| 213 | |||
| 214 | /** |
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| 215 | * @} |
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| 216 | */ |
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| 217 | |||
| 218 | |||
| 219 | /** @defgroup LCD_Duty LCD Duty |
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| 220 | * @{ |
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| 221 | */ |
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| 222 | |||
| 223 | #define LCD_DUTY_STATIC (0x00000000U) /*!< Static duty */ |
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| 224 | #define LCD_DUTY_1_2 (LCD_CR_DUTY_0) /*!< 1/2 duty */ |
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| 225 | #define LCD_DUTY_1_3 (LCD_CR_DUTY_1) /*!< 1/3 duty */ |
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| 226 | #define LCD_DUTY_1_4 ((LCD_CR_DUTY_1 | LCD_CR_DUTY_0)) /*!< 1/4 duty */ |
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| 227 | #define LCD_DUTY_1_8 (LCD_CR_DUTY_2) /*!< 1/8 duty */ |
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| 228 | |||
| 229 | #define IS_LCD_DUTY(__DUTY__) (((__DUTY__) == LCD_DUTY_STATIC) || \ |
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| 230 | ((__DUTY__) == LCD_DUTY_1_2) || \ |
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| 231 | ((__DUTY__) == LCD_DUTY_1_3) || \ |
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| 232 | ((__DUTY__) == LCD_DUTY_1_4) || \ |
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| 233 | ((__DUTY__) == LCD_DUTY_1_8)) |
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| 234 | |||
| 235 | /** |
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| 236 | * @} |
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| 237 | */ |
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| 238 | |||
| 239 | |||
| 240 | /** @defgroup LCD_Bias LCD Bias |
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| 241 | * @{ |
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| 242 | */ |
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| 243 | |||
| 244 | #define LCD_BIAS_1_4 (0x00000000U) /*!< 1/4 Bias */ |
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| 245 | #define LCD_BIAS_1_2 LCD_CR_BIAS_0 /*!< 1/2 Bias */ |
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| 246 | #define LCD_BIAS_1_3 LCD_CR_BIAS_1 /*!< 1/3 Bias */ |
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| 247 | |||
| 248 | #define IS_LCD_BIAS(__BIAS__) (((__BIAS__) == LCD_BIAS_1_4) || \ |
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| 249 | ((__BIAS__) == LCD_BIAS_1_2) || \ |
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| 250 | ((__BIAS__) == LCD_BIAS_1_3)) |
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| 251 | /** |
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| 252 | * @} |
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| 253 | */ |
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| 254 | |||
| 255 | /** @defgroup LCD_Voltage_Source LCD Voltage Source |
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| 256 | * @{ |
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| 257 | */ |
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| 258 | |||
| 259 | #define LCD_VOLTAGESOURCE_INTERNAL (0x00000000U) /*!< Internal voltage source for the LCD */ |
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| 260 | #define LCD_VOLTAGESOURCE_EXTERNAL LCD_CR_VSEL /*!< External voltage source for the LCD */ |
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| 261 | |||
| 262 | #define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VOLTAGESOURCE_INTERNAL) || \ |
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| 263 | ((SOURCE) == LCD_VOLTAGESOURCE_EXTERNAL)) |
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| 264 | |||
| 265 | /** |
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| 266 | * @} |
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| 267 | */ |
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| 268 | |||
| 269 | /** @defgroup LCD_Interrupts LCD Interrupts |
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| 270 | * @{ |
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| 271 | */ |
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| 272 | #define LCD_IT_SOF LCD_FCR_SOFIE |
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| 273 | #define LCD_IT_UDD LCD_FCR_UDDIE |
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| 274 | |||
| 275 | /** |
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| 276 | * @} |
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| 277 | */ |
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| 278 | |||
| 279 | /** @defgroup LCD_PulseOnDuration LCD Pulse On Duration |
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| 280 | * @{ |
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| 281 | */ |
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| 282 | |||
| 283 | #define LCD_PULSEONDURATION_0 (0x00000000U) /*!< Pulse ON duration = 0 pulse */ |
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| 284 | #define LCD_PULSEONDURATION_1 (LCD_FCR_PON_0) /*!< Pulse ON duration = 1/CK_PS */ |
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| 285 | #define LCD_PULSEONDURATION_2 (LCD_FCR_PON_1) /*!< Pulse ON duration = 2/CK_PS */ |
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| 286 | #define LCD_PULSEONDURATION_3 (LCD_FCR_PON_1 | LCD_FCR_PON_0) /*!< Pulse ON duration = 3/CK_PS */ |
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| 287 | #define LCD_PULSEONDURATION_4 (LCD_FCR_PON_2) /*!< Pulse ON duration = 4/CK_PS */ |
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| 288 | #define LCD_PULSEONDURATION_5 (LCD_FCR_PON_2 | LCD_FCR_PON_0) /*!< Pulse ON duration = 5/CK_PS */ |
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| 289 | #define LCD_PULSEONDURATION_6 (LCD_FCR_PON_2 | LCD_FCR_PON_1) /*!< Pulse ON duration = 6/CK_PS */ |
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| 290 | #define LCD_PULSEONDURATION_7 (LCD_FCR_PON) /*!< Pulse ON duration = 7/CK_PS */ |
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| 291 | |||
| 292 | #define IS_LCD_PULSE_ON_DURATION(__DURATION__) (((__DURATION__) == LCD_PULSEONDURATION_0) || \ |
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| 293 | ((__DURATION__) == LCD_PULSEONDURATION_1) || \ |
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| 294 | ((__DURATION__) == LCD_PULSEONDURATION_2) || \ |
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| 295 | ((__DURATION__) == LCD_PULSEONDURATION_3) || \ |
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| 296 | ((__DURATION__) == LCD_PULSEONDURATION_4) || \ |
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| 297 | ((__DURATION__) == LCD_PULSEONDURATION_5) || \ |
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| 298 | ((__DURATION__) == LCD_PULSEONDURATION_6) || \ |
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| 299 | ((__DURATION__) == LCD_PULSEONDURATION_7)) |
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| 300 | /** |
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| 301 | * @} |
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| 302 | */ |
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| 303 | |||
| 304 | /** @defgroup LCD_HighDrive LCD HighDrive |
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| 305 | * @{ |
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| 306 | */ |
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| 307 | |||
| 308 | #define LCD_HIGHDRIVE_0 (0x00000000U) /*!< Low resistance Drive */ |
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| 309 | #define LCD_HIGHDRIVE_1 (LCD_FCR_HD) /*!< High resistance Drive */ |
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| 310 | |||
| 311 | #define IS_LCD_HIGHDRIVE(__HIGHDRIVE__) (((__HIGHDRIVE__) == LCD_HIGHDRIVE_0) || \ |
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| 312 | ((__HIGHDRIVE__) == LCD_HIGHDRIVE_1)) |
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| 313 | /** |
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| 314 | * @} |
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| 315 | */ |
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| 316 | |||
| 317 | /** @defgroup LCD_DeadTime LCD Dead Time |
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| 318 | * @{ |
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| 319 | */ |
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| 320 | |||
| 321 | #define LCD_DEADTIME_0 (0x00000000U) /*!< No dead Time */ |
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| 322 | #define LCD_DEADTIME_1 (LCD_FCR_DEAD_0) /*!< One Phase between different couple of Frame */ |
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| 323 | #define LCD_DEADTIME_2 (LCD_FCR_DEAD_1) /*!< Two Phase between different couple of Frame */ |
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| 324 | #define LCD_DEADTIME_3 (LCD_FCR_DEAD_1 | LCD_FCR_DEAD_0) /*!< Three Phase between different couple of Frame */ |
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| 325 | #define LCD_DEADTIME_4 (LCD_FCR_DEAD_2) /*!< Four Phase between different couple of Frame */ |
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| 326 | #define LCD_DEADTIME_5 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_0) /*!< Five Phase between different couple of Frame */ |
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| 327 | #define LCD_DEADTIME_6 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_1) /*!< Six Phase between different couple of Frame */ |
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| 328 | #define LCD_DEADTIME_7 (LCD_FCR_DEAD) /*!< Seven Phase between different couple of Frame */ |
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| 329 | |||
| 330 | #define IS_LCD_DEAD_TIME(__TIME__) (((__TIME__) == LCD_DEADTIME_0) || \ |
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| 331 | ((__TIME__) == LCD_DEADTIME_1) || \ |
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| 332 | ((__TIME__) == LCD_DEADTIME_2) || \ |
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| 333 | ((__TIME__) == LCD_DEADTIME_3) || \ |
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| 334 | ((__TIME__) == LCD_DEADTIME_4) || \ |
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| 335 | ((__TIME__) == LCD_DEADTIME_5) || \ |
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| 336 | ((__TIME__) == LCD_DEADTIME_6) || \ |
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| 337 | ((__TIME__) == LCD_DEADTIME_7)) |
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| 338 | /** |
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| 339 | * @} |
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| 340 | */ |
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| 341 | |||
| 342 | /** @defgroup LCD_BlinkMode LCD Blink Mode |
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| 343 | * @{ |
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| 344 | */ |
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| 345 | |||
| 346 | #define LCD_BLINKMODE_OFF (0x00000000U) /*!< Blink disabled */ |
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| 347 | #define LCD_BLINKMODE_SEG0_COM0 (LCD_FCR_BLINK_0) /*!< Blink enabled on SEG[0], COM[0] (1 pixel) */ |
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| 348 | #define LCD_BLINKMODE_SEG0_ALLCOM (LCD_FCR_BLINK_1) /*!< Blink enabled on SEG[0], all COM (up to |
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| 349 | 8 pixels according to the programmed duty) */ |
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| 350 | #define LCD_BLINKMODE_ALLSEG_ALLCOM (LCD_FCR_BLINK) /*!< Blink enabled on all SEG and all COM (all pixels) */ |
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| 351 | |||
| 352 | #define IS_LCD_BLINK_MODE(__MODE__) (((__MODE__) == LCD_BLINKMODE_OFF) || \ |
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| 353 | ((__MODE__) == LCD_BLINKMODE_SEG0_COM0) || \ |
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| 354 | ((__MODE__) == LCD_BLINKMODE_SEG0_ALLCOM) || \ |
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| 355 | ((__MODE__) == LCD_BLINKMODE_ALLSEG_ALLCOM)) |
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| 356 | /** |
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| 357 | * @} |
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| 358 | */ |
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| 359 | |||
| 360 | /** @defgroup LCD_BlinkFrequency LCD Blink Frequency |
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| 361 | * @{ |
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| 362 | */ |
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| 363 | |||
| 364 | #define LCD_BLINKFREQUENCY_DIV8 (0x00000000U) /*!< The Blink frequency = fLCD/8 */ |
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| 365 | #define LCD_BLINKFREQUENCY_DIV16 (LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/16 */ |
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| 366 | #define LCD_BLINKFREQUENCY_DIV32 (LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/32 */ |
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| 367 | #define LCD_BLINKFREQUENCY_DIV64 (LCD_FCR_BLINKF_1 | LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/64 */ |
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| 368 | #define LCD_BLINKFREQUENCY_DIV128 (LCD_FCR_BLINKF_2) /*!< The Blink frequency = fLCD/128 */ |
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| 369 | #define LCD_BLINKFREQUENCY_DIV256 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/256 */ |
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| 370 | #define LCD_BLINKFREQUENCY_DIV512 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/512 */ |
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| 371 | #define LCD_BLINKFREQUENCY_DIV1024 (LCD_FCR_BLINKF) /*!< The Blink frequency = fLCD/1024 */ |
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| 372 | |||
| 373 | #define IS_LCD_BLINK_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV8) || \ |
||
| 374 | ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV16) || \ |
||
| 375 | ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV32) || \ |
||
| 376 | ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV64) || \ |
||
| 377 | ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV128) || \ |
||
| 378 | ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV256) || \ |
||
| 379 | ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV512) || \ |
||
| 380 | ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV1024)) |
||
| 381 | /** |
||
| 382 | * @} |
||
| 383 | */ |
||
| 384 | |||
| 385 | /** @defgroup LCD_Contrast LCD Contrast |
||
| 386 | * @{ |
||
| 387 | */ |
||
| 388 | |||
| 389 | #define LCD_CONTRASTLEVEL_0 (0x00000000U) /*!< Maximum Voltage = 2.60V */ |
||
| 390 | #define LCD_CONTRASTLEVEL_1 (LCD_FCR_CC_0) /*!< Maximum Voltage = 2.73V */ |
||
| 391 | #define LCD_CONTRASTLEVEL_2 (LCD_FCR_CC_1) /*!< Maximum Voltage = 2.86V */ |
||
| 392 | #define LCD_CONTRASTLEVEL_3 (LCD_FCR_CC_1 | LCD_FCR_CC_0) /*!< Maximum Voltage = 2.99V */ |
||
| 393 | #define LCD_CONTRASTLEVEL_4 (LCD_FCR_CC_2) /*!< Maximum Voltage = 3.12V */ |
||
| 394 | #define LCD_CONTRASTLEVEL_5 (LCD_FCR_CC_2 | LCD_FCR_CC_0) /*!< Maximum Voltage = 3.25V */ |
||
| 395 | #define LCD_CONTRASTLEVEL_6 (LCD_FCR_CC_2 | LCD_FCR_CC_1) /*!< Maximum Voltage = 3.38V */ |
||
| 396 | #define LCD_CONTRASTLEVEL_7 (LCD_FCR_CC) /*!< Maximum Voltage = 3.51V */ |
||
| 397 | |||
| 398 | #define IS_LCD_CONTRAST(__CONTRAST__) (((__CONTRAST__) == LCD_CONTRASTLEVEL_0) || \ |
||
| 399 | ((__CONTRAST__) == LCD_CONTRASTLEVEL_1) || \ |
||
| 400 | ((__CONTRAST__) == LCD_CONTRASTLEVEL_2) || \ |
||
| 401 | ((__CONTRAST__) == LCD_CONTRASTLEVEL_3) || \ |
||
| 402 | ((__CONTRAST__) == LCD_CONTRASTLEVEL_4) || \ |
||
| 403 | ((__CONTRAST__) == LCD_CONTRASTLEVEL_5) || \ |
||
| 404 | ((__CONTRAST__) == LCD_CONTRASTLEVEL_6) || \ |
||
| 405 | ((__CONTRAST__) == LCD_CONTRASTLEVEL_7)) |
||
| 406 | /** |
||
| 407 | * @} |
||
| 408 | */ |
||
| 409 | |||
| 410 | /** @defgroup LCD_MuxSegment LCD Mux Segment |
||
| 411 | * @{ |
||
| 412 | */ |
||
| 413 | |||
| 414 | #define LCD_MUXSEGMENT_DISABLE (0x00000000U) /*!< SEG pin multiplexing disabled */ |
||
| 415 | #define LCD_MUXSEGMENT_ENABLE (LCD_CR_MUX_SEG) /*!< SEG[31:28] are multiplexed with SEG[43:40] */ |
||
| 416 | |||
| 417 | #define IS_LCD_MUXSEGMENT(__VALUE__) (((__VALUE__) == LCD_MUXSEGMENT_ENABLE) || \ |
||
| 418 | ((__VALUE__) == LCD_MUXSEGMENT_DISABLE)) |
||
| 419 | /** |
||
| 420 | * @} |
||
| 421 | */ |
||
| 422 | |||
| 423 | /** @defgroup LCD_Flag LCD Flag |
||
| 424 | * @{ |
||
| 425 | */ |
||
| 426 | |||
| 427 | #define LCD_FLAG_ENS LCD_SR_ENS |
||
| 428 | #define LCD_FLAG_SOF LCD_SR_SOF |
||
| 429 | #define LCD_FLAG_UDR LCD_SR_UDR |
||
| 430 | #define LCD_FLAG_UDD LCD_SR_UDD |
||
| 431 | #define LCD_FLAG_RDY LCD_SR_RDY |
||
| 432 | #define LCD_FLAG_FCRSF LCD_SR_FCRSR |
||
| 433 | |||
| 434 | /** |
||
| 435 | * @} |
||
| 436 | */ |
||
| 437 | |||
| 438 | /** @defgroup LCD_RAMRegister LCD RAMRegister |
||
| 439 | * @{ |
||
| 440 | */ |
||
| 441 | |||
| 442 | #define LCD_RAM_REGISTER0 (0x00000000U) /*!< LCD RAM Register 0 */ |
||
| 443 | #define LCD_RAM_REGISTER1 (0x00000001U) /*!< LCD RAM Register 1 */ |
||
| 444 | #define LCD_RAM_REGISTER2 (0x00000002U) /*!< LCD RAM Register 2 */ |
||
| 445 | #define LCD_RAM_REGISTER3 (0x00000003U) /*!< LCD RAM Register 3 */ |
||
| 446 | #define LCD_RAM_REGISTER4 (0x00000004U) /*!< LCD RAM Register 4 */ |
||
| 447 | #define LCD_RAM_REGISTER5 (0x00000005U) /*!< LCD RAM Register 5 */ |
||
| 448 | #define LCD_RAM_REGISTER6 (0x00000006U) /*!< LCD RAM Register 6 */ |
||
| 449 | #define LCD_RAM_REGISTER7 (0x00000007U) /*!< LCD RAM Register 7 */ |
||
| 450 | #define LCD_RAM_REGISTER8 (0x00000008U) /*!< LCD RAM Register 8 */ |
||
| 451 | #define LCD_RAM_REGISTER9 (0x00000009U) /*!< LCD RAM Register 9 */ |
||
| 452 | #define LCD_RAM_REGISTER10 (0x0000000AU) /*!< LCD RAM Register 10 */ |
||
| 453 | #define LCD_RAM_REGISTER11 (0x0000000BU) /*!< LCD RAM Register 11 */ |
||
| 454 | #define LCD_RAM_REGISTER12 (0x0000000CU) /*!< LCD RAM Register 12 */ |
||
| 455 | #define LCD_RAM_REGISTER13 (0x0000000DU) /*!< LCD RAM Register 13 */ |
||
| 456 | #define LCD_RAM_REGISTER14 (0x0000000EU) /*!< LCD RAM Register 14 */ |
||
| 457 | #define LCD_RAM_REGISTER15 (0x0000000FU) /*!< LCD RAM Register 15 */ |
||
| 458 | |||
| 459 | #define IS_LCD_RAM_REGISTER(__REGISTER__) (((__REGISTER__) == LCD_RAM_REGISTER0) || \ |
||
| 460 | ((__REGISTER__) == LCD_RAM_REGISTER1) || \ |
||
| 461 | ((__REGISTER__) == LCD_RAM_REGISTER2) || \ |
||
| 462 | ((__REGISTER__) == LCD_RAM_REGISTER3) || \ |
||
| 463 | ((__REGISTER__) == LCD_RAM_REGISTER4) || \ |
||
| 464 | ((__REGISTER__) == LCD_RAM_REGISTER5) || \ |
||
| 465 | ((__REGISTER__) == LCD_RAM_REGISTER6) || \ |
||
| 466 | ((__REGISTER__) == LCD_RAM_REGISTER7) || \ |
||
| 467 | ((__REGISTER__) == LCD_RAM_REGISTER8) || \ |
||
| 468 | ((__REGISTER__) == LCD_RAM_REGISTER9) || \ |
||
| 469 | ((__REGISTER__) == LCD_RAM_REGISTER10) || \ |
||
| 470 | ((__REGISTER__) == LCD_RAM_REGISTER11) || \ |
||
| 471 | ((__REGISTER__) == LCD_RAM_REGISTER12) || \ |
||
| 472 | ((__REGISTER__) == LCD_RAM_REGISTER13) || \ |
||
| 473 | ((__REGISTER__) == LCD_RAM_REGISTER14) || \ |
||
| 474 | ((__REGISTER__) == LCD_RAM_REGISTER15)) |
||
| 475 | |||
| 476 | /** |
||
| 477 | * @} |
||
| 478 | */ |
||
| 479 | |||
| 480 | /** |
||
| 481 | * @} |
||
| 482 | */ |
||
| 483 | |||
| 484 | /* Exported macro ------------------------------------------------------------*/ |
||
| 485 | |||
| 486 | /** @defgroup LCD_Exported_Macros LCD Exported Macros |
||
| 487 | * @{ |
||
| 488 | */ |
||
| 489 | |||
| 490 | /** @brief Reset LCD handle state |
||
| 491 | * @param __HANDLE__ specifies the LCD Handle. |
||
| 492 | * @retval None |
||
| 493 | */ |
||
| 494 | #define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LCD_STATE_RESET) |
||
| 495 | |||
| 496 | /** @brief macros to enables or disables the LCD |
||
| 497 | * @param __HANDLE__ specifies the LCD Handle. |
||
| 498 | * @retval None |
||
| 499 | */ |
||
| 500 | #define __HAL_LCD_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)) |
||
| 501 | #define __HAL_LCD_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)) |
||
| 502 | |||
| 503 | /** @brief Macros to enable or disable the low resistance divider. Displays with high |
||
| 504 | * internal resistance may need a longer drive time to achieve |
||
| 505 | * satisfactory contrast. This function is useful in this case if some |
||
| 506 | * additional power consumption can be tolerated. |
||
| 507 | * @param __HANDLE__ specifies the LCD Handle. |
||
| 508 | * @note When this mode is enabled, the PulseOn Duration (PON) have to be |
||
| 509 | * programmed to 1/CK_PS (LCD_PULSEONDURATION_1). |
||
| 510 | * @retval None |
||
| 511 | */ |
||
| 512 | #define __HAL_LCD_HIGHDRIVER_ENABLE(__HANDLE__) \ |
||
| 513 | do{ \ |
||
| 514 | SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \ |
||
| 515 | LCD_WaitForSynchro(__HANDLE__); \ |
||
| 516 | }while(0) |
||
| 517 | |||
| 518 | #define __HAL_LCD_HIGHDRIVER_DISABLE(__HANDLE__) \ |
||
| 519 | do{ \ |
||
| 520 | CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \ |
||
| 521 | LCD_WaitForSynchro(__HANDLE__); \ |
||
| 522 | }while(0) |
||
| 523 | |||
| 524 | /** |
||
| 525 | * @brief Macro to configure the LCD pulses on duration. |
||
| 526 | * @param __HANDLE__ specifies the LCD Handle. |
||
| 527 | * @param __DURATION__ specifies the LCD pulse on duration in terms of |
||
| 528 | * CK_PS (prescaled LCD clock period) pulses. |
||
| 529 | * This parameter can be one of the following values: |
||
| 530 | * @arg LCD_PULSEONDURATION_0: 0 pulse |
||
| 531 | * @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS |
||
| 532 | * @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS |
||
| 533 | * @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS |
||
| 534 | * @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS |
||
| 535 | * @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS |
||
| 536 | * @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS |
||
| 537 | * @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS |
||
| 538 | * @retval None |
||
| 539 | */ |
||
| 540 | #define __HAL_LCD_PULSEONDURATION_CONFIG(__HANDLE__, __DURATION__) \ |
||
| 541 | do{ \ |
||
| 542 | MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \ |
||
| 543 | LCD_WaitForSynchro(__HANDLE__); \ |
||
| 544 | }while(0) |
||
| 545 | |||
| 546 | /** |
||
| 547 | * @brief Macro to configure the LCD dead time. |
||
| 548 | * @param __HANDLE__ specifies the LCD Handle. |
||
| 549 | * @param __DEADTIME__ specifies the LCD dead time. |
||
| 550 | * This parameter can be one of the following values: |
||
| 551 | * @arg LCD_DEADTIME_0: No dead Time |
||
| 552 | * @arg LCD_DEADTIME_1: One Phase between different couple of Frame |
||
| 553 | * @arg LCD_DEADTIME_2: Two Phase between different couple of Frame |
||
| 554 | * @arg LCD_DEADTIME_3: Three Phase between different couple of Frame |
||
| 555 | * @arg LCD_DEADTIME_4: Four Phase between different couple of Frame |
||
| 556 | * @arg LCD_DEADTIME_5: Five Phase between different couple of Frame |
||
| 557 | * @arg LCD_DEADTIME_6: Six Phase between different couple of Frame |
||
| 558 | * @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame |
||
| 559 | * @retval None |
||
| 560 | */ |
||
| 561 | #define __HAL_LCD_DEADTIME_CONFIG(__HANDLE__, __DEADTIME__) \ |
||
| 562 | do{ \ |
||
| 563 | MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \ |
||
| 564 | LCD_WaitForSynchro(__HANDLE__); \ |
||
| 565 | }while(0) |
||
| 566 | |||
| 567 | /** |
||
| 568 | * @brief Macro to configure the LCD Contrast. |
||
| 569 | * @param __HANDLE__ specifies the LCD Handle. |
||
| 570 | * @param __CONTRAST__ specifies the LCD Contrast. |
||
| 571 | * This parameter can be one of the following values: |
||
| 572 | * @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V |
||
| 573 | * @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V |
||
| 574 | * @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V |
||
| 575 | * @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V |
||
| 576 | * @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V |
||
| 577 | * @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.25V |
||
| 578 | * @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.38V |
||
| 579 | * @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.51V |
||
| 580 | * @retval None |
||
| 581 | */ |
||
| 582 | #define __HAL_LCD_CONTRAST_CONFIG(__HANDLE__, __CONTRAST__) \ |
||
| 583 | do{ \ |
||
| 584 | MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \ |
||
| 585 | LCD_WaitForSynchro(__HANDLE__); \ |
||
| 586 | } while(0) |
||
| 587 | |||
| 588 | /** |
||
| 589 | * @brief Macro to configure the LCD Blink mode and Blink frequency. |
||
| 590 | * @param __HANDLE__ specifies the LCD Handle. |
||
| 591 | * @param __BLINKMODE__ specifies the LCD blink mode. |
||
| 592 | * This parameter can be one of the following values: |
||
| 593 | * @arg LCD_BLINKMODE_OFF: Blink disabled |
||
| 594 | * @arg LCD_BLINKMODE_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel) |
||
| 595 | * @arg LCD_BLINKMODE_SEG0_ALLCOM: Blink enabled on SEG[0], all COM (up to 8 |
||
| 596 | * pixels according to the programmed duty) |
||
| 597 | * @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM |
||
| 598 | * (all pixels) |
||
| 599 | * @param __BLINKFREQUENCY__ specifies the LCD blink frequency. |
||
| 600 | * @arg LCD_BLINKFREQUENCY_DIV8: The Blink frequency = fLcd/8 |
||
| 601 | * @arg LCD_BLINKFREQUENCY_DIV16: The Blink frequency = fLcd/16 |
||
| 602 | * @arg LCD_BLINKFREQUENCY_DIV32: The Blink frequency = fLcd/32 |
||
| 603 | * @arg LCD_BLINKFREQUENCY_DIV64: The Blink frequency = fLcd/64 |
||
| 604 | * @arg LCD_BLINKFREQUENCY_DIV128: The Blink frequency = fLcd/128 |
||
| 605 | * @arg LCD_BLINKFREQUENCY_DIV256: The Blink frequency = fLcd/256 |
||
| 606 | * @arg LCD_BLINKFREQUENCY_DIV512: The Blink frequency = fLcd/512 |
||
| 607 | * @arg LCD_BLINKFREQUENCY_DIV1024: The Blink frequency = fLcd/1024 |
||
| 608 | * @retval None |
||
| 609 | */ |
||
| 610 | #define __HAL_LCD_BLINK_CONFIG(__HANDLE__, __BLINKMODE__, __BLINKFREQUENCY__) \ |
||
| 611 | do{ \ |
||
| 612 | MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BLINKFREQUENCY__))); \ |
||
| 613 | LCD_WaitForSynchro(__HANDLE__); \ |
||
| 614 | }while(0) |
||
| 615 | |||
| 616 | /** @brief Enables or disables the specified LCD interrupt. |
||
| 617 | * @param __HANDLE__ specifies the LCD Handle. |
||
| 618 | * @param __INTERRUPT__ specifies the LCD interrupt source to be enabled or disabled. |
||
| 619 | * This parameter can be one of the following values: |
||
| 620 | * @arg LCD_IT_SOF: Start of Frame Interrupt |
||
| 621 | * @arg LCD_IT_UDD: Update Display Done Interrupt |
||
| 622 | * @retval None |
||
| 623 | */ |
||
| 624 | #define __HAL_LCD_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ |
||
| 625 | do{ \ |
||
| 626 | SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \ |
||
| 627 | LCD_WaitForSynchro(__HANDLE__); \ |
||
| 628 | }while(0) |
||
| 629 | #define __HAL_LCD_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ |
||
| 630 | do{ \ |
||
| 631 | CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \ |
||
| 632 | LCD_WaitForSynchro(__HANDLE__); \ |
||
| 633 | }while(0) |
||
| 634 | |||
| 635 | /** @brief Checks whether the specified LCD interrupt is enabled or not. |
||
| 636 | * @param __HANDLE__ specifies the LCD Handle. |
||
| 637 | * @param __IT__ specifies the LCD interrupt source to check. |
||
| 638 | * This parameter can be one of the following values: |
||
| 639 | * @arg LCD_IT_SOF: Start of Frame Interrupt |
||
| 640 | * @arg LCD_IT_UDD: Update Display Done Interrupt. |
||
| 641 | * @note If the device is in STOP mode (PCLK not provided) UDD will not |
||
| 642 | * generate an interrupt even if UDDIE = 1. |
||
| 643 | * If the display is not enabled the UDD interrupt will never occur. |
||
| 644 | * @retval The state of __IT__ (TRUE or FALSE). |
||
| 645 | */ |
||
| 646 | #define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__)) |
||
| 647 | |||
| 648 | /** @brief Checks whether the specified LCD flag is set or not. |
||
| 649 | * @param __HANDLE__ specifies the LCD Handle. |
||
| 650 | * @param __FLAG__ specifies the flag to check. |
||
| 651 | * This parameter can be one of the following values: |
||
| 652 | * @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status. |
||
| 653 | * @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR |
||
| 654 | * goes from 0 to 1. On deactivation it reflects the real status of |
||
| 655 | * LCD so it becomes 0 at the end of the last displayed frame. |
||
| 656 | * @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at |
||
| 657 | * the beginning of a new frame, at the same time as the display data is |
||
| 658 | * updated. |
||
| 659 | * @arg LCD_FLAG_UDR: Update Display Request flag. |
||
| 660 | * @arg LCD_FLAG_UDD: Update Display Done flag. |
||
| 661 | * @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status |
||
| 662 | * of the step-up converter. |
||
| 663 | * @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag. |
||
| 664 | * This flag is set by hardware each time the LCD_FCR register is updated |
||
| 665 | * in the LCDCLK domain. |
||
| 666 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
||
| 667 | */ |
||
| 668 | #define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
||
| 669 | |||
| 670 | /** @brief Clears the specified LCD pending flag. |
||
| 671 | * @param __HANDLE__ specifies the LCD Handle. |
||
| 672 | * @param __FLAG__ specifies the flag to clear. |
||
| 673 | * This parameter can be any combination of the following values: |
||
| 674 | * @arg LCD_FLAG_SOF: Start of Frame Interrupt |
||
| 675 | * @arg LCD_FLAG_UDD: Update Display Done Interrupt |
||
| 676 | * @retval None |
||
| 677 | */ |
||
| 678 | #define __HAL_LCD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLR = (__FLAG__)) |
||
| 679 | |||
| 680 | /** |
||
| 681 | * @} |
||
| 682 | */ |
||
| 683 | |||
| 684 | /* Exported functions ------------------------------------------------------- */ |
||
| 685 | |||
| 686 | /** @addtogroup LCD_Exported_Functions |
||
| 687 | * @{ |
||
| 688 | */ |
||
| 689 | |||
| 690 | /** @addtogroup LCD_Exported_Functions_Group1 |
||
| 691 | * @{ |
||
| 692 | */ |
||
| 693 | |||
| 694 | /* Initialization/de-initialization methods **********************************/ |
||
| 695 | HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd); |
||
| 696 | HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd); |
||
| 697 | void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd); |
||
| 698 | void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd); |
||
| 699 | |||
| 700 | /** |
||
| 701 | * @} |
||
| 702 | */ |
||
| 703 | |||
| 704 | /** @addtogroup LCD_Exported_Functions_Group2 |
||
| 705 | * @{ |
||
| 706 | */ |
||
| 707 | |||
| 708 | /* IO operation methods *******************************************************/ |
||
| 709 | HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data); |
||
| 710 | HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd); |
||
| 711 | HAL_StatusTypeDef HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd); |
||
| 712 | |||
| 713 | /** |
||
| 714 | * @} |
||
| 715 | */ |
||
| 716 | |||
| 717 | /** @addtogroup LCD_Exported_Functions_Group3 |
||
| 718 | * @{ |
||
| 719 | */ |
||
| 720 | |||
| 721 | /* Peripheral State methods **************************************************/ |
||
| 722 | HAL_LCD_StateTypeDef HAL_LCD_GetState(LCD_HandleTypeDef *hlcd); |
||
| 723 | uint32_t HAL_LCD_GetError(LCD_HandleTypeDef *hlcd); |
||
| 724 | |||
| 725 | /** |
||
| 726 | * @} |
||
| 727 | */ |
||
| 728 | |||
| 729 | /** |
||
| 730 | * @} |
||
| 731 | */ |
||
| 732 | |||
| 733 | /** @addtogroup LCD_Private_Functions |
||
| 734 | * @{ |
||
| 735 | */ |
||
| 736 | |||
| 737 | /* Private functions ---------------------------------------------------------*/ |
||
| 738 | HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd); |
||
| 739 | |||
| 740 | /** |
||
| 741 | * @} |
||
| 742 | */ |
||
| 743 | |||
| 744 | /** |
||
| 745 | * @} |
||
| 746 | */ |
||
| 747 | |||
| 748 | #endif /* STM32L100xB || STM32L100xBA || STM32L100xC ||... || STM32L162xD || STM32L162xE || STM32L162xDX */ |
||
| 749 | |||
| 750 | /** |
||
| 751 | * @} |
||
| 752 | */ |
||
| 753 | |||
| 754 | #ifdef __cplusplus |
||
| 755 | } |
||
| 756 | #endif |
||
| 757 | |||
| 758 | #endif /* __STM32L1xx_HAL_LCD_H */ |