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77 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32l1xx_hal_i2s.h |
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4 | * @author MCD Application Team |
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5 | * @brief Header file of I2S HAL module. |
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6 | ****************************************************************************** |
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7 | * @attention |
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8 | * |
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9 | * Copyright (c) 2016 STMicroelectronics. |
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10 | * All rights reserved. |
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11 | * |
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12 | * This software is licensed under terms that can be found in the LICENSE file |
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13 | * in the root directory of this software component. |
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14 | * If no LICENSE file comes with this software, it is provided AS-IS. |
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15 | * |
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16 | ****************************************************************************** |
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17 | */ |
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18 | |||
19 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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20 | #ifndef STM32L1xx_HAL_I2S_H |
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21 | #define STM32L1xx_HAL_I2S_H |
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22 | |||
23 | #ifdef __cplusplus |
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24 | extern "C" { |
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25 | #endif |
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26 | |||
27 | /* Includes ------------------------------------------------------------------*/ |
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28 | #include "stm32l1xx_hal_def.h" |
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29 | |||
30 | #if defined(SPI_I2S_SUPPORT) |
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31 | /** @addtogroup STM32L1xx_HAL_Driver |
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32 | * @{ |
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33 | */ |
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34 | |||
35 | /** @addtogroup I2S |
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36 | * @{ |
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37 | */ |
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38 | |||
39 | /* Exported types ------------------------------------------------------------*/ |
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40 | /** @defgroup I2S_Exported_Types I2S Exported Types |
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41 | * @{ |
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42 | */ |
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43 | |||
44 | /** |
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45 | * @brief I2S Init structure definition |
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46 | */ |
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47 | typedef struct |
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48 | { |
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49 | uint32_t Mode; /*!< Specifies the I2S operating mode. |
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50 | This parameter can be a value of @ref I2S_Mode */ |
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51 | |||
52 | uint32_t Standard; /*!< Specifies the standard used for the I2S communication. |
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53 | This parameter can be a value of @ref I2S_Standard */ |
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54 | |||
55 | uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. |
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56 | This parameter can be a value of @ref I2S_Data_Format */ |
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57 | |||
58 | uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. |
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59 | This parameter can be a value of @ref I2S_MCLK_Output */ |
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60 | |||
61 | uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. |
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62 | This parameter can be a value of @ref I2S_Audio_Frequency */ |
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63 | |||
64 | uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. |
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65 | This parameter can be a value of @ref I2S_Clock_Polarity */ |
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66 | } I2S_InitTypeDef; |
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67 | |||
68 | /** |
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69 | * @brief HAL State structures definition |
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70 | */ |
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71 | typedef enum |
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72 | { |
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73 | HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */ |
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74 | HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */ |
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75 | HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */ |
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76 | HAL_I2S_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ |
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77 | HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ |
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78 | HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */ |
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79 | HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */ |
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80 | } HAL_I2S_StateTypeDef; |
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81 | |||
82 | /** |
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83 | * @brief I2S handle Structure definition |
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84 | */ |
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85 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1) |
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86 | typedef struct __I2S_HandleTypeDef |
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87 | #else |
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88 | typedef struct |
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89 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ |
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90 | { |
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91 | SPI_TypeDef *Instance; /*!< I2S registers base address */ |
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92 | |||
93 | I2S_InitTypeDef Init; /*!< I2S communication parameters */ |
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94 | |||
95 | uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */ |
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96 | |||
97 | __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */ |
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98 | |||
99 | __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */ |
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100 | |||
101 | uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */ |
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102 | |||
103 | __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */ |
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104 | |||
105 | __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter |
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106 | (This field is initialized at the |
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107 | same value as transfer size at the |
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108 | beginning of the transfer and |
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109 | decremented when a sample is received |
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110 | NbSamplesReceived = RxBufferSize-RxBufferCount) */ |
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111 | DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */ |
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112 | |||
113 | DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */ |
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114 | |||
115 | __IO HAL_LockTypeDef Lock; /*!< I2S locking object */ |
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116 | |||
117 | __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */ |
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118 | |||
119 | __IO uint32_t ErrorCode; /*!< I2S Error code |
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120 | This parameter can be a value of @ref I2S_Error */ |
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121 | |||
122 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) |
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123 | void (* TxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Completed callback */ |
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124 | void (* RxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Completed callback */ |
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125 | void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Half Completed callback */ |
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126 | void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Half Completed callback */ |
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127 | void (* ErrorCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Error callback */ |
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128 | void (* MspInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp Init callback */ |
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129 | void (* MspDeInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp DeInit callback */ |
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130 | |||
131 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ |
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132 | } I2S_HandleTypeDef; |
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133 | |||
134 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) |
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135 | /** |
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136 | * @brief HAL I2S Callback ID enumeration definition |
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137 | */ |
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138 | typedef enum |
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139 | { |
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140 | HAL_I2S_TX_COMPLETE_CB_ID = 0x00U, /*!< I2S Tx Completed callback ID */ |
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141 | HAL_I2S_RX_COMPLETE_CB_ID = 0x01U, /*!< I2S Rx Completed callback ID */ |
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142 | HAL_I2S_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< I2S Tx Half Completed callback ID */ |
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143 | HAL_I2S_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< I2S Rx Half Completed callback ID */ |
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144 | HAL_I2S_ERROR_CB_ID = 0x06U, /*!< I2S Error callback ID */ |
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145 | HAL_I2S_MSPINIT_CB_ID = 0x07U, /*!< I2S Msp Init callback ID */ |
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146 | HAL_I2S_MSPDEINIT_CB_ID = 0x08U /*!< I2S Msp DeInit callback ID */ |
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147 | |||
148 | } HAL_I2S_CallbackIDTypeDef; |
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149 | |||
150 | /** |
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151 | * @brief HAL I2S Callback pointer definition |
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152 | */ |
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153 | typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to an I2S callback function */ |
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154 | |||
155 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ |
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156 | /** |
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157 | * @} |
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158 | */ |
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159 | |||
160 | /* Exported constants --------------------------------------------------------*/ |
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161 | /** @defgroup I2S_Exported_Constants I2S Exported Constants |
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162 | * @{ |
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163 | */ |
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164 | /** @defgroup I2S_Error I2S Error |
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165 | * @{ |
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166 | */ |
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167 | #define HAL_I2S_ERROR_NONE (0x00000000U) /*!< No error */ |
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168 | #define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */ |
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169 | #define HAL_I2S_ERROR_OVR (0x00000002U) /*!< OVR error */ |
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170 | #define HAL_I2S_ERROR_UDR (0x00000004U) /*!< UDR error */ |
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171 | #define HAL_I2S_ERROR_DMA (0x00000008U) /*!< DMA transfer error */ |
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172 | #define HAL_I2S_ERROR_PRESCALER (0x00000010U) /*!< Prescaler Calculation error */ |
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173 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) |
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174 | #define HAL_I2S_ERROR_INVALID_CALLBACK (0x00000020U) /*!< Invalid Callback error */ |
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175 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ |
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176 | #define HAL_I2S_ERROR_BUSY_LINE_RX (0x00000040U) /*!< Busy Rx Line error */ |
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177 | /** |
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178 | * @} |
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179 | */ |
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180 | |||
181 | /** @defgroup I2S_Mode I2S Mode |
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182 | * @{ |
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183 | */ |
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184 | #define I2S_MODE_SLAVE_TX (0x00000000U) |
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185 | #define I2S_MODE_SLAVE_RX (SPI_I2SCFGR_I2SCFG_0) |
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186 | #define I2S_MODE_MASTER_TX (SPI_I2SCFGR_I2SCFG_1) |
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187 | #define I2S_MODE_MASTER_RX ((SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1)) |
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188 | /** |
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189 | * @} |
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190 | */ |
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191 | |||
192 | /** @defgroup I2S_Standard I2S Standard |
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193 | * @{ |
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194 | */ |
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195 | #define I2S_STANDARD_PHILIPS (0x00000000U) |
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196 | #define I2S_STANDARD_MSB (SPI_I2SCFGR_I2SSTD_0) |
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197 | #define I2S_STANDARD_LSB (SPI_I2SCFGR_I2SSTD_1) |
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198 | #define I2S_STANDARD_PCM_SHORT ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1)) |
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199 | #define I2S_STANDARD_PCM_LONG ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC)) |
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200 | /** |
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201 | * @} |
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202 | */ |
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203 | |||
204 | /** @defgroup I2S_Data_Format I2S Data Format |
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205 | * @{ |
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206 | */ |
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207 | #define I2S_DATAFORMAT_16B (0x00000000U) |
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208 | #define I2S_DATAFORMAT_16B_EXTENDED (SPI_I2SCFGR_CHLEN) |
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209 | #define I2S_DATAFORMAT_24B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0)) |
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210 | #define I2S_DATAFORMAT_32B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1)) |
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211 | /** |
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212 | * @} |
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213 | */ |
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214 | |||
215 | /** @defgroup I2S_MCLK_Output I2S MCLK Output |
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216 | * @{ |
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217 | */ |
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218 | #define I2S_MCLKOUTPUT_ENABLE (SPI_I2SPR_MCKOE) |
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219 | #define I2S_MCLKOUTPUT_DISABLE (0x00000000U) |
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220 | /** |
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221 | * @} |
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222 | */ |
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223 | |||
224 | /** @defgroup I2S_Audio_Frequency I2S Audio Frequency |
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225 | * @{ |
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226 | */ |
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227 | #define I2S_AUDIOFREQ_192K (192000U) |
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228 | #define I2S_AUDIOFREQ_96K (96000U) |
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229 | #define I2S_AUDIOFREQ_48K (48000U) |
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230 | #define I2S_AUDIOFREQ_44K (44100U) |
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231 | #define I2S_AUDIOFREQ_32K (32000U) |
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232 | #define I2S_AUDIOFREQ_22K (22050U) |
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233 | #define I2S_AUDIOFREQ_16K (16000U) |
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234 | #define I2S_AUDIOFREQ_11K (11025U) |
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235 | #define I2S_AUDIOFREQ_8K (8000U) |
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236 | #define I2S_AUDIOFREQ_DEFAULT (2U) |
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237 | /** |
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238 | * @} |
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239 | */ |
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240 | |||
241 | /** @defgroup I2S_Clock_Polarity I2S Clock Polarity |
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242 | * @{ |
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243 | */ |
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244 | #define I2S_CPOL_LOW (0x00000000U) |
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245 | #define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL) |
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246 | /** |
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247 | * @} |
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248 | */ |
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249 | |||
250 | /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition |
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251 | * @{ |
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252 | */ |
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253 | #define I2S_IT_TXE SPI_CR2_TXEIE |
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254 | #define I2S_IT_RXNE SPI_CR2_RXNEIE |
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255 | #define I2S_IT_ERR SPI_CR2_ERRIE |
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256 | /** |
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257 | * @} |
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258 | */ |
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259 | |||
260 | /** @defgroup I2S_Flags_Definition I2S Flags Definition |
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261 | * @{ |
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262 | */ |
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263 | #define I2S_FLAG_TXE SPI_SR_TXE |
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264 | #define I2S_FLAG_RXNE SPI_SR_RXNE |
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265 | |||
266 | #define I2S_FLAG_UDR SPI_SR_UDR |
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267 | #define I2S_FLAG_OVR SPI_SR_OVR |
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268 | #define I2S_FLAG_FRE SPI_SR_FRE |
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269 | |||
270 | #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE |
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271 | #define I2S_FLAG_BSY SPI_SR_BSY |
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272 | |||
273 | #if defined(SPI_CR2_FRF) |
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274 | #define I2S_FLAG_MASK (SPI_SR_RXNE\ |
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275 | | SPI_SR_TXE | SPI_SR_UDR | SPI_SR_OVR | SPI_SR_FRE | SPI_SR_CHSIDE | SPI_SR_BSY) |
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276 | #else |
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277 | #define I2S_FLAG_MASK (SPI_SR_RXNE\ |
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278 | | SPI_SR_TXE | SPI_SR_UDR | SPI_SR_OVR | SPI_SR_CHSIDE | SPI_SR_BSY) |
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279 | #endif |
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280 | /** |
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281 | * @} |
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282 | */ |
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283 | |||
284 | /** |
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285 | * @} |
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286 | */ |
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287 | |||
288 | /* Exported macros -----------------------------------------------------------*/ |
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289 | /** @defgroup I2S_Exported_macros I2S Exported Macros |
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290 | * @{ |
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291 | */ |
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292 | |||
293 | /** @brief Reset I2S handle state |
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294 | * @param __HANDLE__ specifies the I2S Handle. |
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295 | * @retval None |
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296 | */ |
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297 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) |
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298 | #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
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299 | (__HANDLE__)->State = HAL_I2S_STATE_RESET; \ |
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300 | (__HANDLE__)->MspInitCallback = NULL; \ |
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301 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
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302 | } while(0) |
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303 | #else |
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304 | #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) |
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305 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ |
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306 | |||
307 | /** @brief Enable the specified SPI peripheral (in I2S mode). |
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308 | * @param __HANDLE__ specifies the I2S Handle. |
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309 | * @retval None |
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310 | */ |
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311 | #define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) |
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312 | |||
313 | /** @brief Disable the specified SPI peripheral (in I2S mode). |
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314 | * @param __HANDLE__ specifies the I2S Handle. |
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315 | * @retval None |
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316 | */ |
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317 | #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE)) |
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318 | |||
319 | /** @brief Enable the specified I2S interrupts. |
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320 | * @param __HANDLE__ specifies the I2S Handle. |
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321 | * @param __INTERRUPT__ specifies the interrupt source to enable or disable. |
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322 | * This parameter can be one of the following values: |
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323 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
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324 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
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325 | * @arg I2S_IT_ERR: Error interrupt enable |
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326 | * @retval None |
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327 | */ |
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328 | #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) |
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329 | |||
330 | /** @brief Disable the specified I2S interrupts. |
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331 | * @param __HANDLE__ specifies the I2S Handle. |
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332 | * @param __INTERRUPT__ specifies the interrupt source to enable or disable. |
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333 | * This parameter can be one of the following values: |
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334 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
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335 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
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336 | * @arg I2S_IT_ERR: Error interrupt enable |
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337 | * @retval None |
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338 | */ |
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339 | #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))) |
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340 | |||
341 | /** @brief Checks if the specified I2S interrupt source is enabled or disabled. |
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342 | * @param __HANDLE__ specifies the I2S Handle. |
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343 | * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. |
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344 | * @param __INTERRUPT__ specifies the I2S interrupt source to check. |
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345 | * This parameter can be one of the following values: |
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346 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
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347 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
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348 | * @arg I2S_IT_ERR: Error interrupt enable |
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349 | * @retval The new state of __IT__ (TRUE or FALSE). |
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350 | */ |
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351 | #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\ |
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352 | & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
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353 | |||
354 | /** @brief Checks whether the specified I2S flag is set or not. |
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355 | * @param __HANDLE__ specifies the I2S Handle. |
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356 | * @param __FLAG__ specifies the flag to check. |
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357 | * This parameter can be one of the following values: |
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358 | * @arg I2S_FLAG_RXNE: Receive buffer not empty flag |
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359 | * @arg I2S_FLAG_TXE: Transmit buffer empty flag |
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360 | * @arg I2S_FLAG_UDR: Underrun flag |
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361 | * @arg I2S_FLAG_OVR: Overrun flag |
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362 | * @arg I2S_FLAG_FRE: Frame error flag |
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363 | * @arg I2S_FLAG_CHSIDE: Channel Side flag |
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364 | * @arg I2S_FLAG_BSY: Busy flag |
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365 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
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366 | */ |
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367 | #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
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368 | |||
369 | /** @brief Clears the I2S OVR pending flag. |
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370 | * @param __HANDLE__ specifies the I2S Handle. |
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371 | * @retval None |
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372 | */ |
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373 | #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{ \ |
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374 | __IO uint32_t tmpreg_ovr = 0x00U; \ |
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375 | tmpreg_ovr = (__HANDLE__)->Instance->DR; \ |
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376 | tmpreg_ovr = (__HANDLE__)->Instance->SR; \ |
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377 | UNUSED(tmpreg_ovr); \ |
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378 | }while(0U) |
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379 | /** @brief Clears the I2S UDR pending flag. |
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380 | * @param __HANDLE__ specifies the I2S Handle. |
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381 | * @retval None |
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382 | */ |
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383 | #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) do{\ |
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384 | __IO uint32_t tmpreg_udr = 0x00U;\ |
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385 | tmpreg_udr = ((__HANDLE__)->Instance->SR);\ |
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386 | UNUSED(tmpreg_udr); \ |
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387 | }while(0U) |
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388 | /** @brief Flush the I2S DR Register. |
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389 | * @param __HANDLE__ specifies the I2S Handle. |
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390 | * @retval None |
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391 | */ |
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392 | #define __HAL_I2S_FLUSH_RX_DR(__HANDLE__) do{\ |
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393 | __IO uint32_t tmpreg_dr = 0x00U;\ |
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394 | tmpreg_dr = ((__HANDLE__)->Instance->DR);\ |
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395 | UNUSED(tmpreg_dr); \ |
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396 | }while(0U) |
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397 | /** |
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398 | * @} |
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399 | */ |
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400 | |||
401 | /* Exported functions --------------------------------------------------------*/ |
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402 | /** @addtogroup I2S_Exported_Functions |
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403 | * @{ |
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404 | */ |
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405 | |||
406 | /** @addtogroup I2S_Exported_Functions_Group1 |
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407 | * @{ |
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408 | */ |
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409 | /* Initialization/de-initialization functions ********************************/ |
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410 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); |
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411 | HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s); |
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412 | void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); |
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413 | void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); |
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414 | |||
415 | /* Callbacks Register/UnRegister functions ***********************************/ |
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416 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) |
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417 | HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID, |
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418 | pI2S_CallbackTypeDef pCallback); |
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419 | HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID); |
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420 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ |
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421 | /** |
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422 | * @} |
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423 | */ |
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424 | |||
425 | /** @addtogroup I2S_Exported_Functions_Group2 |
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426 | * @{ |
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427 | */ |
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428 | /* I/O operation functions ***************************************************/ |
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429 | /* Blocking mode: Polling */ |
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430 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
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431 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
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432 | |||
433 | /* Non-Blocking mode: Interrupt */ |
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434 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
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435 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
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436 | void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); |
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437 | |||
438 | /* Non-Blocking mode: DMA */ |
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439 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
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440 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
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441 | |||
442 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); |
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443 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); |
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444 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); |
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445 | |||
446 | /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ |
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447 | void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
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448 | void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); |
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449 | void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
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450 | void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); |
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451 | void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); |
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452 | /** |
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453 | * @} |
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454 | */ |
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455 | |||
456 | /** @addtogroup I2S_Exported_Functions_Group3 |
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457 | * @{ |
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458 | */ |
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459 | /* Peripheral Control and State functions ************************************/ |
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460 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); |
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461 | uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); |
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462 | /** |
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463 | * @} |
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464 | */ |
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465 | |||
466 | /** |
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467 | * @} |
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468 | */ |
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469 | |||
470 | /* Private types -------------------------------------------------------------*/ |
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471 | /* Private variables ---------------------------------------------------------*/ |
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472 | /* Private constants ---------------------------------------------------------*/ |
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473 | /* Private macros ------------------------------------------------------------*/ |
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474 | /** @defgroup I2S_Private_Macros I2S Private Macros |
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475 | * @{ |
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476 | */ |
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477 | |||
478 | /** @brief Check whether the specified SPI flag is set or not. |
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479 | * @param __SR__ copy of I2S SR register. |
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480 | * @param __FLAG__ specifies the flag to check. |
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481 | * This parameter can be one of the following values: |
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482 | * @arg I2S_FLAG_RXNE: Receive buffer not empty flag |
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483 | * @arg I2S_FLAG_TXE: Transmit buffer empty flag |
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484 | * @arg I2S_FLAG_UDR: Underrun error flag |
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485 | * @arg I2S_FLAG_OVR: Overrun flag |
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486 | * @arg I2S_FLAG_CHSIDE: Channel side flag |
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487 | * @arg I2S_FLAG_BSY: Busy flag |
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488 | * @retval SET or RESET. |
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489 | */ |
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490 | #define I2S_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__)\ |
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491 | & ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK)) ? SET : RESET) |
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492 | |||
493 | /** @brief Check whether the specified SPI Interrupt is set or not. |
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494 | * @param __CR2__ copy of I2S CR2 register. |
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495 | * @param __INTERRUPT__ specifies the SPI interrupt source to check. |
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496 | * This parameter can be one of the following values: |
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497 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
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498 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
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499 | * @arg I2S_IT_ERR: Error interrupt enable |
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500 | * @retval SET or RESET. |
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501 | */ |
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502 | #define I2S_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__)\ |
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503 | & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
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504 | |||
505 | /** @brief Checks if I2S Mode parameter is in allowed range. |
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506 | * @param __MODE__ specifies the I2S Mode. |
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507 | * This parameter can be a value of @ref I2S_Mode |
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508 | * @retval None |
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509 | */ |
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510 | #define IS_I2S_MODE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) || \ |
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511 | ((__MODE__) == I2S_MODE_SLAVE_RX) || \ |
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512 | ((__MODE__) == I2S_MODE_MASTER_TX) || \ |
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513 | ((__MODE__) == I2S_MODE_MASTER_RX)) |
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514 | |||
515 | #define IS_I2S_STANDARD(__STANDARD__) (((__STANDARD__) == I2S_STANDARD_PHILIPS) || \ |
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516 | ((__STANDARD__) == I2S_STANDARD_MSB) || \ |
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517 | ((__STANDARD__) == I2S_STANDARD_LSB) || \ |
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518 | ((__STANDARD__) == I2S_STANDARD_PCM_SHORT) || \ |
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519 | ((__STANDARD__) == I2S_STANDARD_PCM_LONG)) |
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520 | |||
521 | #define IS_I2S_DATA_FORMAT(__FORMAT__) (((__FORMAT__) == I2S_DATAFORMAT_16B) || \ |
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522 | ((__FORMAT__) == I2S_DATAFORMAT_16B_EXTENDED) || \ |
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523 | ((__FORMAT__) == I2S_DATAFORMAT_24B) || \ |
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524 | ((__FORMAT__) == I2S_DATAFORMAT_32B)) |
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525 | |||
526 | #define IS_I2S_MCLK_OUTPUT(__OUTPUT__) (((__OUTPUT__) == I2S_MCLKOUTPUT_ENABLE) || \ |
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527 | ((__OUTPUT__) == I2S_MCLKOUTPUT_DISABLE)) |
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528 | |||
529 | #define IS_I2S_AUDIO_FREQ(__FREQ__) ((((__FREQ__) >= I2S_AUDIOFREQ_8K) && \ |
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530 | ((__FREQ__) <= I2S_AUDIOFREQ_192K)) || \ |
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531 | ((__FREQ__) == I2S_AUDIOFREQ_DEFAULT)) |
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532 | |||
533 | /** @brief Checks if I2S Serial clock steady state parameter is in allowed range. |
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534 | * @param __CPOL__ specifies the I2S serial clock steady state. |
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535 | * This parameter can be a value of @ref I2S_Clock_Polarity |
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536 | * @retval None |
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537 | */ |
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538 | #define IS_I2S_CPOL(__CPOL__) (((__CPOL__) == I2S_CPOL_LOW) || \ |
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539 | ((__CPOL__) == I2S_CPOL_HIGH)) |
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540 | |||
541 | /** |
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542 | * @} |
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543 | */ |
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544 | |||
545 | /** |
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546 | * @} |
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547 | */ |
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548 | |||
549 | /** |
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550 | * @} |
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551 | */ |
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552 | #endif /* SPI_I2S_SUPPORT */ |
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553 | |||
554 | #ifdef __cplusplus |
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555 | } |
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556 | #endif |
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557 | |||
558 | #endif /* STM32L1xx_HAL_I2S_H */ |
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559 |