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56 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32l1xx_hal_dac.h |
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4 | * @author MCD Application Team |
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5 | * @brief Header file of DAC HAL module. |
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6 | ****************************************************************************** |
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7 | * @attention |
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8 | * |
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9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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10 | * All rights reserved.</center></h2> |
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11 | * |
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12 | * This software component is licensed by ST under BSD 3-Clause license, |
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13 | * the "License"; You may not use this file except in compliance with the |
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14 | * License. You may obtain a copy of the License at: |
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15 | * opensource.org/licenses/BSD-3-Clause |
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16 | * |
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17 | ****************************************************************************** |
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18 | */ |
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19 | |||
20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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21 | #ifndef STM32L1xx_HAL_DAC_H |
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22 | #define STM32L1xx_HAL_DAC_H |
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23 | |||
24 | #ifdef __cplusplus |
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25 | extern "C" { |
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26 | #endif |
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27 | |||
28 | /** @addtogroup STM32L1xx_HAL_Driver |
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29 | * @{ |
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30 | */ |
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31 | |||
32 | /* Includes ------------------------------------------------------------------*/ |
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33 | #include "stm32l1xx_hal_def.h" |
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34 | |||
35 | #if defined(DAC1) |
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36 | |||
37 | /** @addtogroup DAC |
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38 | * @{ |
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39 | */ |
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40 | |||
41 | /* Exported types ------------------------------------------------------------*/ |
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42 | |||
43 | /** @defgroup DAC_Exported_Types DAC Exported Types |
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44 | * @{ |
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45 | */ |
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46 | |||
47 | /** |
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48 | * @brief HAL State structures definition |
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49 | */ |
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50 | typedef enum |
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51 | { |
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52 | HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */ |
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53 | HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */ |
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54 | HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */ |
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55 | HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */ |
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56 | HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */ |
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57 | |||
58 | } HAL_DAC_StateTypeDef; |
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59 | |||
60 | /** |
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61 | * @brief DAC handle Structure definition |
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62 | */ |
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63 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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64 | typedef struct __DAC_HandleTypeDef |
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65 | #else |
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66 | typedef struct |
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61 | mjames | 67 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
56 | mjames | 68 | { |
69 | DAC_TypeDef *Instance; /*!< Register base address */ |
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70 | |||
71 | __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ |
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72 | |||
73 | HAL_LockTypeDef Lock; /*!< DAC locking object */ |
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74 | |||
75 | DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ |
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76 | |||
77 | DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ |
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78 | |||
79 | __IO uint32_t ErrorCode; /*!< DAC Error code */ |
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80 | |||
81 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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61 | mjames | 82 | void (* ConvCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac); |
83 | void (* ConvHalfCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac); |
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84 | void (* ErrorCallbackCh1) (struct __DAC_HandleTypeDef *hdac); |
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85 | void (* DMAUnderrunCallbackCh1) (struct __DAC_HandleTypeDef *hdac); |
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56 | mjames | 86 | |
61 | mjames | 87 | void (* ConvCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac); |
88 | void (* ConvHalfCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac); |
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89 | void (* ErrorCallbackCh2) (struct __DAC_HandleTypeDef *hdac); |
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90 | void (* DMAUnderrunCallbackCh2) (struct __DAC_HandleTypeDef *hdac); |
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91 | |||
92 | |||
93 | void (* MspInitCallback) (struct __DAC_HandleTypeDef *hdac); |
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94 | void (* MspDeInitCallback) (struct __DAC_HandleTypeDef *hdac); |
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56 | mjames | 95 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
96 | |||
97 | } DAC_HandleTypeDef; |
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98 | |||
99 | /** |
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100 | * @brief DAC Configuration regular Channel structure definition |
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101 | */ |
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102 | typedef struct |
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103 | { |
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104 | uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. |
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105 | This parameter can be a value of @ref DAC_trigger_selection */ |
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106 | |||
107 | uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. |
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108 | This parameter can be a value of @ref DAC_output_buffer */ |
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109 | |||
110 | } DAC_ChannelConfTypeDef; |
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111 | |||
112 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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113 | /** |
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114 | * @brief HAL DAC Callback ID enumeration definition |
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115 | */ |
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116 | typedef enum |
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117 | { |
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118 | HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */ |
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119 | HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */ |
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120 | HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */ |
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121 | HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */ |
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61 | mjames | 122 | |
56 | mjames | 123 | HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */ |
124 | HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */ |
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125 | HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */ |
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126 | HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */ |
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61 | mjames | 127 | |
56 | mjames | 128 | HAL_DAC_MSPINIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */ |
129 | HAL_DAC_MSPDEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */ |
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130 | HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */ |
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131 | } HAL_DAC_CallbackIDTypeDef; |
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132 | |||
133 | /** |
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134 | * @brief HAL DAC Callback pointer definition |
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135 | */ |
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136 | typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac); |
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137 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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138 | |||
139 | /** |
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140 | * @} |
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141 | */ |
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142 | |||
143 | /* Exported constants --------------------------------------------------------*/ |
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144 | |||
145 | /** @defgroup DAC_Exported_Constants DAC Exported Constants |
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146 | * @{ |
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147 | */ |
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148 | |||
149 | /** @defgroup DAC_Error_Code DAC Error Code |
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150 | * @{ |
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151 | */ |
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152 | #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ |
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153 | #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */ |
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154 | #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */ |
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155 | #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ |
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156 | #define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */ |
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157 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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158 | #define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */ |
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159 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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160 | |||
161 | /** |
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162 | * @} |
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163 | */ |
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164 | |||
165 | /** @defgroup DAC_trigger_selection DAC trigger selection |
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166 | * @{ |
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167 | */ |
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61 | mjames | 168 | #define DAC_TRIGGER_NONE 0x00000000UL /*!< Conversion is automatic once the DAC1_DHRxxxx register has been loaded, and not by external trigger */ |
56 | mjames | 169 | #define DAC_TRIGGER_T6_TRGO (DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */ |
170 | #define DAC_TRIGGER_T7_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ |
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171 | #define DAC_TRIGGER_T9_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM9 TRGO selected as external conversion trigger for DAC channel */ |
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172 | #define DAC_TRIGGER_T2_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ |
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173 | #define DAC_TRIGGER_T4_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ |
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174 | #define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ |
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175 | #define DAC_TRIGGER_SOFTWARE (DAC_CR_TSEL1 | DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */ |
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176 | |||
177 | /** |
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178 | * @} |
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179 | */ |
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180 | |||
181 | /** @defgroup DAC_output_buffer DAC output buffer |
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182 | * @{ |
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183 | */ |
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184 | #define DAC_OUTPUTBUFFER_ENABLE 0x00000000U |
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185 | #define DAC_OUTPUTBUFFER_DISABLE (DAC_CR_BOFF1) |
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186 | |||
187 | /** |
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188 | * @} |
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189 | */ |
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190 | |||
191 | /** @defgroup DAC_Channel_selection DAC Channel selection |
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192 | * @{ |
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193 | */ |
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194 | #define DAC_CHANNEL_1 0x00000000U |
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61 | mjames | 195 | |
56 | mjames | 196 | #define DAC_CHANNEL_2 0x00000010U |
61 | mjames | 197 | |
56 | mjames | 198 | /** |
199 | * @} |
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200 | */ |
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201 | |||
202 | /** @defgroup DAC_data_alignment DAC data alignment |
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203 | * @{ |
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204 | */ |
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205 | #define DAC_ALIGN_12B_R 0x00000000U |
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206 | #define DAC_ALIGN_12B_L 0x00000004U |
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207 | #define DAC_ALIGN_8B_R 0x00000008U |
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208 | |||
209 | /** |
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210 | * @} |
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211 | */ |
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212 | |||
213 | /** @defgroup DAC_flags_definition DAC flags definition |
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214 | * @{ |
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215 | */ |
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216 | #define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1) |
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61 | mjames | 217 | |
56 | mjames | 218 | #define DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2) |
219 | |||
61 | mjames | 220 | |
56 | mjames | 221 | /** |
222 | * @} |
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223 | */ |
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224 | |||
225 | /** @defgroup DAC_IT_definition DAC IT definition |
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226 | * @{ |
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227 | */ |
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228 | #define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1) |
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61 | mjames | 229 | |
56 | mjames | 230 | #define DAC_IT_DMAUDR2 (DAC_SR_DMAUDR2) |
231 | |||
61 | mjames | 232 | |
56 | mjames | 233 | /** |
234 | * @} |
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235 | */ |
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236 | |||
237 | /** |
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238 | * @} |
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239 | */ |
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240 | |||
241 | /* Exported macro ------------------------------------------------------------*/ |
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242 | |||
243 | /** @defgroup DAC_Exported_Macros DAC Exported Macros |
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244 | * @{ |
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245 | */ |
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246 | |||
247 | /** @brief Reset DAC handle state. |
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248 | * @param __HANDLE__ specifies the DAC handle. |
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249 | * @retval None |
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250 | */ |
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251 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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252 | #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \ |
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253 | (__HANDLE__)->State = HAL_DAC_STATE_RESET; \ |
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61 | mjames | 254 | (__HANDLE__)->MspInitCallback = NULL; \ |
255 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
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56 | mjames | 256 | } while(0) |
257 | #else |
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258 | #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) |
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259 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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260 | |||
261 | /** @brief Enable the DAC channel. |
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262 | * @param __HANDLE__ specifies the DAC handle. |
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263 | * @param __DAC_Channel__ specifies the DAC channel |
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264 | * @retval None |
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265 | */ |
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266 | #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ |
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267 | ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) |
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268 | |||
269 | /** @brief Disable the DAC channel. |
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270 | * @param __HANDLE__ specifies the DAC handle |
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271 | * @param __DAC_Channel__ specifies the DAC channel. |
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272 | * @retval None |
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273 | */ |
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274 | #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ |
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275 | ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) |
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276 | |||
277 | /** @brief Set DHR12R1 alignment. |
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278 | * @param __ALIGNMENT__ specifies the DAC alignment |
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279 | * @retval None |
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280 | */ |
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61 | mjames | 281 | #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008UL + (__ALIGNMENT__)) |
56 | mjames | 282 | |
61 | mjames | 283 | |
56 | mjames | 284 | /** @brief Set DHR12R2 alignment. |
285 | * @param __ALIGNMENT__ specifies the DAC alignment |
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286 | * @retval None |
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287 | */ |
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61 | mjames | 288 | #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014UL + (__ALIGNMENT__)) |
56 | mjames | 289 | |
61 | mjames | 290 | |
56 | mjames | 291 | /** @brief Set DHR12RD alignment. |
292 | * @param __ALIGNMENT__ specifies the DAC alignment |
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293 | * @retval None |
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294 | */ |
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61 | mjames | 295 | #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020UL + (__ALIGNMENT__)) |
56 | mjames | 296 | |
297 | /** @brief Enable the DAC interrupt. |
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298 | * @param __HANDLE__ specifies the DAC handle |
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299 | * @param __INTERRUPT__ specifies the DAC interrupt. |
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300 | * This parameter can be any combination of the following values: |
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61 | mjames | 301 | * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt |
302 | * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt |
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56 | mjames | 303 | * @retval None |
304 | */ |
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305 | #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) |
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306 | |||
307 | /** @brief Disable the DAC interrupt. |
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308 | * @param __HANDLE__ specifies the DAC handle |
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309 | * @param __INTERRUPT__ specifies the DAC interrupt. |
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310 | * This parameter can be any combination of the following values: |
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61 | mjames | 311 | * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt |
312 | * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt |
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56 | mjames | 313 | * @retval None |
314 | */ |
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315 | #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) |
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316 | |||
317 | /** @brief Check whether the specified DAC interrupt source is enabled or not. |
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318 | * @param __HANDLE__ DAC handle |
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319 | * @param __INTERRUPT__ DAC interrupt source to check |
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320 | * This parameter can be any combination of the following values: |
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61 | mjames | 321 | * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt |
322 | * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt |
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56 | mjames | 323 | * @retval State of interruption (SET or RESET) |
324 | */ |
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61 | mjames | 325 | #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR\ |
326 | & (__INTERRUPT__)) == (__INTERRUPT__)) |
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56 | mjames | 327 | |
328 | /** @brief Get the selected DAC's flag status. |
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329 | * @param __HANDLE__ specifies the DAC handle. |
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330 | * @param __FLAG__ specifies the DAC flag to get. |
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331 | * This parameter can be any combination of the following values: |
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61 | mjames | 332 | * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag |
333 | * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag |
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56 | mjames | 334 | * @retval None |
335 | */ |
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336 | #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
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337 | |||
338 | /** @brief Clear the DAC's flag. |
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339 | * @param __HANDLE__ specifies the DAC handle. |
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340 | * @param __FLAG__ specifies the DAC flag to clear. |
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341 | * This parameter can be any combination of the following values: |
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61 | mjames | 342 | * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag |
343 | * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag |
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56 | mjames | 344 | * @retval None |
345 | */ |
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346 | #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) |
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347 | |||
348 | /** |
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349 | * @} |
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350 | */ |
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351 | |||
352 | /* Private macro -------------------------------------------------------------*/ |
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353 | |||
354 | /** @defgroup DAC_Private_Macros DAC Private Macros |
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355 | * @{ |
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356 | */ |
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357 | #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ |
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358 | ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) |
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359 | |||
360 | #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ |
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361 | ((CHANNEL) == DAC_CHANNEL_2)) |
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362 | |||
363 | #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ |
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364 | ((ALIGN) == DAC_ALIGN_12B_L) || \ |
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365 | ((ALIGN) == DAC_ALIGN_8B_R)) |
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366 | |||
61 | mjames | 367 | #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0UL) |
56 | mjames | 368 | |
369 | /** |
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370 | * @} |
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371 | */ |
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372 | |||
373 | /* Include DAC HAL Extended module */ |
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374 | #include "stm32l1xx_hal_dac_ex.h" |
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375 | |||
376 | /* Exported functions --------------------------------------------------------*/ |
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377 | |||
378 | /** @addtogroup DAC_Exported_Functions |
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379 | * @{ |
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380 | */ |
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381 | |||
382 | /** @addtogroup DAC_Exported_Functions_Group1 |
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383 | * @{ |
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384 | */ |
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385 | /* Initialization and de-initialization functions *****************************/ |
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386 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac); |
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387 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac); |
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388 | void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac); |
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389 | void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac); |
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390 | |||
391 | /** |
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392 | * @} |
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393 | */ |
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394 | |||
395 | /** @addtogroup DAC_Exported_Functions_Group2 |
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396 | * @{ |
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397 | */ |
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398 | /* IO operation functions *****************************************************/ |
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399 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel); |
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400 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel); |
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401 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length, |
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402 | uint32_t Alignment); |
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403 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel); |
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404 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac); |
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405 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); |
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406 | |||
407 | void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac); |
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408 | void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac); |
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409 | void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); |
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410 | void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); |
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411 | |||
412 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
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413 | /* DAC callback registering/unregistering */ |
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414 | HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID, |
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415 | pDAC_CallbackTypeDef pCallback); |
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416 | HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID); |
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417 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
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418 | |||
419 | /** |
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420 | * @} |
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421 | */ |
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422 | |||
423 | /** @addtogroup DAC_Exported_Functions_Group3 |
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424 | * @{ |
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425 | */ |
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426 | /* Peripheral Control functions ***********************************************/ |
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427 | uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel); |
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428 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel); |
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429 | /** |
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430 | * @} |
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431 | */ |
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432 | |||
433 | /** @addtogroup DAC_Exported_Functions_Group4 |
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434 | * @{ |
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435 | */ |
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436 | /* Peripheral State and Error functions ***************************************/ |
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437 | HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac); |
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438 | uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); |
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439 | |||
440 | /** |
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441 | * @} |
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442 | */ |
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443 | |||
444 | /** |
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445 | * @} |
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446 | */ |
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447 | |||
448 | /** @defgroup DAC_Private_Functions DAC Private Functions |
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449 | * @{ |
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450 | */ |
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451 | void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma); |
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452 | void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma); |
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453 | void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); |
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454 | /** |
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455 | * @} |
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456 | */ |
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457 | |||
458 | /** |
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459 | * @} |
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460 | */ |
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461 | |||
462 | #endif /* DAC1 */ |
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463 | |||
464 | /** |
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465 | * @} |
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466 | */ |
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467 | |||
468 | #ifdef __cplusplus |
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469 | } |
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470 | #endif |
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471 | |||
472 | |||
61 | mjames | 473 | #endif /* STM32L1xx_HAL_DAC_H */ |
56 | mjames | 474 | |
475 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |