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77 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32l1xx.h |
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4 | * @author MCD Application Team |
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5 | * @brief CMSIS STM32L1xx Device Peripheral Access Layer Header File. |
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6 | * |
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7 | * The file is the unique include file that the application programmer |
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8 | * is using in the C source code, usually in main.c. This file contains: |
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9 | * - Configuration section that allows to select: |
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10 | * - The STM32L1xx device used in the target application |
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11 | * - To use or not the peripheral's drivers in application code(i.e. |
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12 | * code will be based on direct access to peripheral's registers |
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13 | * rather than drivers API), this option is controlled by |
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14 | * "#define USE_HAL_DRIVER" |
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15 | * |
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16 | ****************************************************************************** |
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17 | * @attention |
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18 | * |
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19 | * Copyright (c) 2017-2021 STMicroelectronics. |
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20 | * All rights reserved. |
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21 | * |
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22 | * This software is licensed under terms that can be found in the LICENSE file |
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23 | * in the root directory of this software component. |
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24 | * If no LICENSE file comes with this software, it is provided AS-IS. |
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25 | * |
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26 | ****************************************************************************** |
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27 | */ |
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28 | |||
29 | /** @addtogroup CMSIS |
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30 | * @{ |
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31 | */ |
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32 | |||
33 | /** @addtogroup stm32l1xx |
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34 | * @{ |
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35 | */ |
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36 | |||
37 | #ifndef __STM32L1XX_H |
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38 | #define __STM32L1XX_H |
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39 | |||
40 | #ifdef __cplusplus |
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41 | extern "C" { |
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42 | #endif /* __cplusplus */ |
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43 | |||
44 | /** @addtogroup Library_configuration_section |
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45 | * @{ |
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46 | */ |
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47 | |||
48 | /** |
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49 | * @brief STM32 Family |
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50 | */ |
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51 | #if !defined (STM32L1) |
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52 | #define STM32L1 |
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53 | #endif /* STM32L1 */ |
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54 | |||
55 | |||
56 | /* Uncomment the line below according to the target STM32L device used in your |
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57 | application |
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58 | */ |
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59 | |||
60 | #if !defined (STM32L100xB) && !defined (STM32L100xBA) && !defined (STM32L100xC) && \ |
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61 | !defined (STM32L151xB) && !defined (STM32L151xBA) && !defined (STM32L151xC) && !defined (STM32L151xCA) && !defined (STM32L151xD) && !defined (STM32L151xDX) && !defined (STM32L151xE) && \ |
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62 | !defined (STM32L152xB) && !defined (STM32L152xBA) && !defined (STM32L152xC) && !defined (STM32L152xCA) && !defined (STM32L152xD) && !defined (STM32L152xDX) && !defined (STM32L152xE) && \ |
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63 | !defined (STM32L162xC) && !defined (STM32L162xCA) && !defined (STM32L162xD) && !defined (STM32L162xDX) && !defined (STM32L162xE) |
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64 | /* #define STM32L100xB */ /*!< STM32L100C6, STM32L100R and STM32L100RB Devices */ |
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65 | /* #define STM32L100xBA */ /*!< STM32L100C6-A, STM32L100R8-A and STM32L100RB-A Devices */ |
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66 | /* #define STM32L100xC */ /*!< STM32L100RC Devices */ |
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67 | /* #define STM32L151xB */ /*!< STM32L151C6, STM32L151R6, STM32L151C8, STM32L151R8, STM32L151V8, STM32L151CB, STM32L151RB and STM32L151VB */ |
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68 | /* #define STM32L151xBA */ /*!< STM32L151C6-A, STM32L151R6-A, STM32L151C8-A, STM32L151R8-A, STM32L151V8-A, STM32L151CB-A, STM32L151RB-A and STM32L151VB-A */ |
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69 | /* #define STM32L151xC */ /*!< STM32L151CC, STM32L151UC, STM32L151RC and STM32L151VC */ |
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70 | /* #define STM32L151xCA */ /*!< STM32L151RC-A, STM32L151VC-A, STM32L151QC and STM32L151ZC */ |
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71 | /* #define STM32L151xD */ /*!< STM32L151QD, STM32L151RD, STM32L151VD & STM32L151ZD */ |
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72 | /* #define STM32L151xDX */ /*!< STM32L151VD-X Devices */ |
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73 | /* #define STM32L151xE */ /*!< STM32L151QE, STM32L151RE, STM32L151VE and STM32L151ZE */ |
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74 | /* #define STM32L152xB */ /*!< STM32L152C6, STM32L152R6, STM32L152C8, STM32L152R8, STM32L152V8, STM32L152CB, STM32L152RB and STM32L152VB */ |
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75 | /* #define STM32L152xBA */ /*!< STM32L152C6-A, STM32L152R6-A, STM32L152C8-A, STM32L152R8-A, STM32L152V8-A, STM32L152CB-A, STM32L152RB-A and STM32L152VB-A */ |
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76 | /* #define STM32L152xC */ /*!< STM32L152CC, STM32L152UC, STM32L152RC and STM32L152VC */ |
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77 | /* #define STM32L152xCA */ /*!< STM32L152RC-A, STM32L152VC-A, STM32L152QC and STM32L152ZC */ |
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78 | /* #define STM32L152xD */ /*!< STM32L152QD, STM32L152RD, STM32L152VD and STM32L152ZD */ |
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79 | /* #define STM32L152xDX */ /*!< STM32L152VD-X Devices */ |
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80 | /* #define STM32L152xE */ /*!< STM32L152QE, STM32L152RE, STM32L152VE and STM32L152ZE */ |
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81 | /* #define STM32L162xC */ /*!< STM32L162RC and STM32L162VC */ |
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82 | /* #define STM32L162xCA */ /*!< STM32L162RC-A, STM32L162VC-A, STM32L162QC and STM32L162ZC */ |
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83 | /* #define STM32L162xD */ /*!< STM32L162QD, STM32L162RD, STM32L162VD and STM32L162ZD */ |
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84 | /* #define STM32L162xDX */ /*!< STM32L162VD-X Devices */ |
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85 | /* #define STM32L162xE */ /*!< STM32L162RE, STM32L162VE and STM32L162ZE */ |
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86 | #endif |
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87 | |||
88 | /* Tip: To avoid modifying this file each time you need to switch between these |
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89 | devices, you can define the device in your toolchain compiler preprocessor. |
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90 | */ |
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91 | |||
92 | #if !defined (USE_HAL_DRIVER) |
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93 | /** |
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94 | * @brief Comment the line below if you will not use the peripherals drivers. |
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95 | In this case, these drivers will not be included and the application code will |
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96 | be based on direct access to peripherals registers |
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97 | */ |
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98 | /*#define USE_HAL_DRIVER */ |
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99 | #endif /* USE_HAL_DRIVER */ |
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100 | |||
101 | /** |
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102 | * @brief CMSIS Device version number |
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103 | */ |
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104 | #define __STM32L1xx_CMSIS_VERSION_MAIN (0x02) /*!< [31:24] main version */ |
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105 | #define __STM32L1xx_CMSIS_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */ |
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106 | #define __STM32L1xx_CMSIS_VERSION_SUB2 (0x03) /*!< [15:8] sub2 version */ |
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107 | #define __STM32L1xx_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */ |
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108 | #define __STM32L1xx_CMSIS_VERSION ((__STM32L1xx_CMSIS_VERSION_MAIN << 24)\ |
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109 | |(__STM32L1xx_CMSIS_VERSION_SUB1 << 16)\ |
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110 | |(__STM32L1xx_CMSIS_VERSION_SUB2 << 8 )\ |
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111 | |(__STM32L1xx_CMSIS_VERSION_RC)) |
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112 | |||
113 | /** |
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114 | * @} |
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115 | */ |
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116 | |||
117 | /** @addtogroup Device_Included |
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118 | * @{ |
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119 | */ |
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120 | |||
121 | #if defined(STM32L100xB) |
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122 | #include "stm32l100xb.h" |
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123 | #elif defined(STM32L100xBA) |
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124 | #include "stm32l100xba.h" |
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125 | #elif defined(STM32L100xC) |
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126 | #include "stm32l100xc.h" |
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127 | #elif defined(STM32L151xB) |
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128 | #include "stm32l151xb.h" |
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129 | #elif defined(STM32L151xBA) |
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130 | #include "stm32l151xba.h" |
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131 | #elif defined(STM32L151xC) |
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132 | #include "stm32l151xc.h" |
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133 | #elif defined(STM32L151xCA) |
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134 | #include "stm32l151xca.h" |
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135 | #elif defined(STM32L151xD) |
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136 | #include "stm32l151xd.h" |
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137 | #elif defined(STM32L151xDX) |
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138 | #include "stm32l151xdx.h" |
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139 | #elif defined(STM32L151xE) |
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140 | #include "stm32l151xe.h" |
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141 | #elif defined(STM32L152xB) |
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142 | #include "stm32l152xb.h" |
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143 | #elif defined(STM32L152xBA) |
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144 | #include "stm32l152xba.h" |
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145 | #elif defined(STM32L152xC) |
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146 | #include "stm32l152xc.h" |
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147 | #elif defined(STM32L152xCA) |
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148 | #include "stm32l152xca.h" |
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149 | #elif defined(STM32L152xD) |
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150 | #include "stm32l152xd.h" |
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151 | #elif defined(STM32L152xDX) |
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152 | #include "stm32l152xdx.h" |
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153 | #elif defined(STM32L152xE) |
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154 | #include "stm32l152xe.h" |
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155 | #elif defined(STM32L162xC) |
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156 | #include "stm32l162xc.h" |
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157 | #elif defined(STM32L162xCA) |
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158 | #include "stm32l162xca.h" |
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159 | #elif defined(STM32L162xD) |
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160 | #include "stm32l162xd.h" |
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161 | #elif defined(STM32L162xDX) |
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162 | #include "stm32l162xdx.h" |
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163 | #elif defined(STM32L162xE) |
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164 | #include "stm32l162xe.h" |
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165 | #else |
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166 | #error "Please select first the target STM32L1xx device used in your application (in stm32l1xx.h file)" |
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167 | #endif |
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168 | |||
169 | /** |
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170 | * @} |
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171 | */ |
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172 | |||
173 | /** @addtogroup Exported_types |
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174 | * @{ |
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175 | */ |
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176 | typedef enum |
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177 | { |
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178 | RESET = 0, |
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179 | SET = !RESET |
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180 | } FlagStatus, ITStatus; |
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181 | |||
182 | typedef enum |
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183 | { |
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184 | DISABLE = 0, |
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185 | ENABLE = !DISABLE |
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186 | } FunctionalState; |
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187 | #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) |
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188 | |||
189 | typedef enum |
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190 | { |
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191 | SUCCESS = 0, |
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192 | ERROR = !SUCCESS |
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193 | } ErrorStatus; |
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194 | |||
195 | /** |
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196 | * @} |
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197 | */ |
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198 | |||
199 | |||
200 | /** @addtogroup Exported_macros |
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201 | * @{ |
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202 | */ |
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203 | #define SET_BIT(REG, BIT) ((REG) |= (BIT)) |
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204 | |||
205 | #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) |
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206 | |||
207 | #define READ_BIT(REG, BIT) ((REG) & (BIT)) |
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208 | |||
209 | #define CLEAR_REG(REG) ((REG) = (0x0)) |
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210 | |||
211 | #define WRITE_REG(REG, VAL) ((REG) = (VAL)) |
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212 | |||
213 | #define READ_REG(REG) ((REG)) |
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214 | |||
215 | #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) |
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216 | |||
217 | /* Use of CMSIS compiler intrinsics for register exclusive access */ |
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218 | /* Atomic 32-bit register access macro to set one or several bits */ |
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219 | #define ATOMIC_SET_BIT(REG, BIT) \ |
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220 | do { \ |
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221 | uint32_t val; \ |
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222 | do { \ |
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223 | val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \ |
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224 | } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ |
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225 | } while(0) |
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226 | |||
227 | /* Atomic 32-bit register access macro to clear one or several bits */ |
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228 | #define ATOMIC_CLEAR_BIT(REG, BIT) \ |
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229 | do { \ |
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230 | uint32_t val; \ |
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231 | do { \ |
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232 | val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \ |
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233 | } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ |
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234 | } while(0) |
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235 | |||
236 | /* Atomic 32-bit register access macro to clear and set one or several bits */ |
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237 | #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ |
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238 | do { \ |
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239 | uint32_t val; \ |
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240 | do { \ |
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241 | val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \ |
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242 | } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ |
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243 | } while(0) |
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244 | |||
245 | /* Atomic 16-bit register access macro to set one or several bits */ |
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246 | #define ATOMIC_SETH_BIT(REG, BIT) \ |
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247 | do { \ |
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248 | uint16_t val; \ |
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249 | do { \ |
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250 | val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \ |
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251 | } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ |
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252 | } while(0) |
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253 | |||
254 | /* Atomic 16-bit register access macro to clear one or several bits */ |
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255 | #define ATOMIC_CLEARH_BIT(REG, BIT) \ |
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256 | do { \ |
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257 | uint16_t val; \ |
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258 | do { \ |
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259 | val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \ |
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260 | } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ |
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261 | } while(0) |
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262 | |||
263 | /* Atomic 16-bit register access macro to clear and set one or several bits */ |
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264 | #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \ |
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265 | do { \ |
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266 | uint16_t val; \ |
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267 | do { \ |
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268 | val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \ |
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269 | } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ |
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270 | } while(0) |
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271 | |||
272 | #define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL))) |
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273 | |||
274 | |||
275 | /** |
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276 | * @} |
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277 | */ |
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278 | |||
279 | #if defined (USE_HAL_DRIVER) |
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280 | #include "stm32l1xx_hal.h" |
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281 | #endif /* USE_HAL_DRIVER */ |
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282 | |||
283 | |||
284 | #ifdef __cplusplus |
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285 | } |
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286 | #endif /* __cplusplus */ |
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287 | |||
288 | #endif /* __STM32L1xx_H */ |
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289 | /** |
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290 | * @} |
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291 | */ |
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292 | |||
293 | /** |
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294 | * @} |
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295 | */ |
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296 | |||
297 | |||
298 | |||
299 |