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2 | mjames | 1 | /* ---------------------------------------------------------------------- |
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. |
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3 | * |
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5 | mjames | 4 | * $Date: 19. October 2015 |
5 | * $Revision: V.1.4.5 a |
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2 | mjames | 6 | * |
7 | * Project: CMSIS DSP Library |
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8 | * Title: arm_mult_q15.c |
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9 | * |
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10 | * Description: Q15 vector multiplication. |
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11 | * |
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12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
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13 | * |
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14 | * Redistribution and use in source and binary forms, with or without |
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15 | * modification, are permitted provided that the following conditions |
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16 | * are met: |
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17 | * - Redistributions of source code must retain the above copyright |
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18 | * notice, this list of conditions and the following disclaimer. |
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19 | * - Redistributions in binary form must reproduce the above copyright |
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20 | * notice, this list of conditions and the following disclaimer in |
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21 | * the documentation and/or other materials provided with the |
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22 | * distribution. |
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23 | * - Neither the name of ARM LIMITED nor the names of its contributors |
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24 | * may be used to endorse or promote products derived from this |
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25 | * software without specific prior written permission. |
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26 | * |
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27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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38 | * POSSIBILITY OF SUCH DAMAGE. |
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39 | * -------------------------------------------------------------------- */ |
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40 | |||
41 | #include "arm_math.h" |
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42 | |||
43 | /** |
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44 | * @ingroup groupMath |
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45 | */ |
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46 | |||
47 | /** |
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48 | * @addtogroup BasicMult |
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49 | * @{ |
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50 | */ |
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51 | |||
52 | |||
53 | /** |
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54 | * @brief Q15 vector multiplication |
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55 | * @param[in] *pSrcA points to the first input vector |
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56 | * @param[in] *pSrcB points to the second input vector |
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57 | * @param[out] *pDst points to the output vector |
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58 | * @param[in] blockSize number of samples in each vector |
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59 | * @return none. |
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60 | * |
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61 | * <b>Scaling and Overflow Behavior:</b> |
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62 | * \par |
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63 | * The function uses saturating arithmetic. |
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64 | * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated. |
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65 | */ |
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66 | |||
67 | void arm_mult_q15( |
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68 | q15_t * pSrcA, |
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69 | q15_t * pSrcB, |
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70 | q15_t * pDst, |
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71 | uint32_t blockSize) |
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72 | { |
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73 | uint32_t blkCnt; /* loop counters */ |
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74 | |||
75 | #ifndef ARM_MATH_CM0_FAMILY |
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76 | |||
77 | /* Run the below code for Cortex-M4 and Cortex-M3 */ |
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78 | q31_t inA1, inA2, inB1, inB2; /* temporary input variables */ |
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79 | q15_t out1, out2, out3, out4; /* temporary output variables */ |
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80 | q31_t mul1, mul2, mul3, mul4; /* temporary variables */ |
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81 | |||
82 | /* loop Unrolling */ |
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83 | blkCnt = blockSize >> 2u; |
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84 | |||
85 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. |
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86 | ** a second loop below computes the remaining 1 to 3 samples. */ |
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87 | while(blkCnt > 0u) |
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88 | { |
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89 | /* read two samples at a time from sourceA */ |
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90 | inA1 = *__SIMD32(pSrcA)++; |
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91 | /* read two samples at a time from sourceB */ |
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92 | inB1 = *__SIMD32(pSrcB)++; |
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93 | /* read two samples at a time from sourceA */ |
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94 | inA2 = *__SIMD32(pSrcA)++; |
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95 | /* read two samples at a time from sourceB */ |
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96 | inB2 = *__SIMD32(pSrcB)++; |
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97 | |||
98 | /* multiply mul = sourceA * sourceB */ |
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99 | mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16)); |
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100 | mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1); |
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101 | mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16)); |
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102 | mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2); |
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103 | |||
104 | /* saturate result to 16 bit */ |
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105 | out1 = (q15_t) __SSAT(mul1 >> 15, 16); |
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106 | out2 = (q15_t) __SSAT(mul2 >> 15, 16); |
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107 | out3 = (q15_t) __SSAT(mul3 >> 15, 16); |
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108 | out4 = (q15_t) __SSAT(mul4 >> 15, 16); |
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109 | |||
110 | /* store the result */ |
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111 | #ifndef ARM_MATH_BIG_ENDIAN |
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112 | |||
113 | *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16); |
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114 | *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16); |
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115 | |||
116 | #else |
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117 | |||
118 | *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16); |
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119 | *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16); |
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120 | |||
5 | mjames | 121 | #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
2 | mjames | 122 | |
123 | /* Decrement the blockSize loop counter */ |
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124 | blkCnt--; |
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125 | } |
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126 | |||
127 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here. |
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128 | ** No loop unrolling is used. */ |
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129 | blkCnt = blockSize % 0x4u; |
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130 | |||
131 | #else |
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132 | |||
133 | /* Run the below code for Cortex-M0 */ |
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134 | |||
135 | /* Initialize blkCnt with number of samples */ |
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136 | blkCnt = blockSize; |
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137 | |||
138 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
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139 | |||
140 | |||
141 | while(blkCnt > 0u) |
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142 | { |
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143 | /* C = A * B */ |
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144 | /* Multiply the inputs and store the result in the destination buffer */ |
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145 | *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16); |
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146 | |||
147 | /* Decrement the blockSize loop counter */ |
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148 | blkCnt--; |
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149 | } |
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150 | } |
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151 | |||
152 | /** |
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153 | * @} end of BasicMult group |
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154 | */ |