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| 56 | mjames | 1 | /* ---------------------------------------------------------------------- |
| 2 | * Project: CMSIS DSP Library |
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| 3 | * Title: arm_cfft_q15.c |
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| 4 | * Description: Combined Radix Decimation in Q15 Frequency CFFT processing function |
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| 5 | * |
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| 6 | * $Date: 27. January 2017 |
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| 7 | * $Revision: V.1.5.1 |
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| 8 | * |
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| 9 | * Target Processor: Cortex-M cores |
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| 10 | * -------------------------------------------------------------------- */ |
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| 11 | /* |
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| 12 | * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved. |
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| 13 | * |
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| 14 | * SPDX-License-Identifier: Apache-2.0 |
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| 15 | * |
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| 16 | * Licensed under the Apache License, Version 2.0 (the License); you may |
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| 17 | * not use this file except in compliance with the License. |
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| 18 | * You may obtain a copy of the License at |
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| 19 | * |
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| 20 | * www.apache.org/licenses/LICENSE-2.0 |
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| 21 | * |
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| 22 | * Unless required by applicable law or agreed to in writing, software |
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| 23 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT |
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| 24 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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| 25 | * See the License for the specific language governing permissions and |
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| 26 | * limitations under the License. |
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| 27 | */ |
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| 28 | |||
| 29 | #include "arm_math.h" |
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| 30 | |||
| 31 | extern void arm_radix4_butterfly_q15( |
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| 32 | q15_t * pSrc, |
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| 33 | uint32_t fftLen, |
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| 34 | q15_t * pCoef, |
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| 35 | uint32_t twidCoefModifier); |
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| 36 | |||
| 37 | extern void arm_radix4_butterfly_inverse_q15( |
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| 38 | q15_t * pSrc, |
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| 39 | uint32_t fftLen, |
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| 40 | q15_t * pCoef, |
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| 41 | uint32_t twidCoefModifier); |
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| 42 | |||
| 43 | extern void arm_bitreversal_16( |
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| 44 | uint16_t * pSrc, |
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| 45 | const uint16_t bitRevLen, |
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| 46 | const uint16_t * pBitRevTable); |
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| 47 | |||
| 48 | void arm_cfft_radix4by2_q15( |
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| 49 | q15_t * pSrc, |
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| 50 | uint32_t fftLen, |
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| 51 | const q15_t * pCoef); |
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| 52 | |||
| 53 | void arm_cfft_radix4by2_inverse_q15( |
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| 54 | q15_t * pSrc, |
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| 55 | uint32_t fftLen, |
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| 56 | const q15_t * pCoef); |
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| 57 | |||
| 58 | /** |
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| 59 | * @ingroup groupTransforms |
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| 60 | */ |
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| 61 | |||
| 62 | /** |
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| 63 | * @addtogroup ComplexFFT |
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| 64 | * @{ |
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| 65 | */ |
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| 66 | |||
| 67 | /** |
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| 68 | * @details |
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| 69 | * @brief Processing function for the Q15 complex FFT. |
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| 70 | * @param[in] *S points to an instance of the Q15 CFFT structure. |
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| 71 | * @param[in, out] *p1 points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place. |
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| 72 | * @param[in] ifftFlag flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. |
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| 73 | * @param[in] bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. |
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| 74 | * @return none. |
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| 75 | */ |
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| 76 | |||
| 77 | void arm_cfft_q15( |
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| 78 | const arm_cfft_instance_q15 * S, |
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| 79 | q15_t * p1, |
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| 80 | uint8_t ifftFlag, |
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| 81 | uint8_t bitReverseFlag) |
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| 82 | { |
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| 83 | uint32_t L = S->fftLen; |
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| 84 | |||
| 85 | if (ifftFlag == 1U) |
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| 86 | { |
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| 87 | switch (L) |
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| 88 | { |
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| 89 | case 16: |
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| 90 | case 64: |
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| 91 | case 256: |
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| 92 | case 1024: |
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| 93 | case 4096: |
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| 94 | arm_radix4_butterfly_inverse_q15 ( p1, L, (q15_t*)S->pTwiddle, 1 ); |
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| 95 | break; |
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| 96 | |||
| 97 | case 32: |
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| 98 | case 128: |
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| 99 | case 512: |
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| 100 | case 2048: |
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| 101 | arm_cfft_radix4by2_inverse_q15 ( p1, L, S->pTwiddle ); |
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| 102 | break; |
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| 103 | } |
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| 104 | } |
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| 105 | else |
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| 106 | { |
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| 107 | switch (L) |
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| 108 | { |
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| 109 | case 16: |
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| 110 | case 64: |
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| 111 | case 256: |
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| 112 | case 1024: |
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| 113 | case 4096: |
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| 114 | arm_radix4_butterfly_q15 ( p1, L, (q15_t*)S->pTwiddle, 1 ); |
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| 115 | break; |
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| 116 | |||
| 117 | case 32: |
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| 118 | case 128: |
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| 119 | case 512: |
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| 120 | case 2048: |
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| 121 | arm_cfft_radix4by2_q15 ( p1, L, S->pTwiddle ); |
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| 122 | break; |
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| 123 | } |
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| 124 | } |
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| 125 | |||
| 126 | if ( bitReverseFlag ) |
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| 127 | arm_bitreversal_16((uint16_t*)p1,S->bitRevLength,S->pBitRevTable); |
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| 128 | } |
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| 129 | |||
| 130 | /** |
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| 131 | * @} end of ComplexFFT group |
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| 132 | */ |
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| 133 | |||
| 134 | void arm_cfft_radix4by2_q15( |
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| 135 | q15_t * pSrc, |
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| 136 | uint32_t fftLen, |
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| 137 | const q15_t * pCoef) |
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| 138 | { |
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| 139 | uint32_t i; |
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| 140 | uint32_t n2; |
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| 141 | q15_t p0, p1, p2, p3; |
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| 142 | #if defined (ARM_MATH_DSP) |
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| 143 | q31_t T, S, R; |
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| 144 | q31_t coeff, out1, out2; |
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| 145 | const q15_t *pC = pCoef; |
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| 146 | q15_t *pSi = pSrc; |
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| 147 | q15_t *pSl = pSrc + fftLen; |
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| 148 | #else |
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| 149 | uint32_t ia, l; |
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| 150 | q15_t xt, yt, cosVal, sinVal; |
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| 151 | #endif |
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| 152 | |||
| 153 | n2 = fftLen >> 1; |
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| 154 | |||
| 155 | #if defined (ARM_MATH_DSP) |
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| 156 | |||
| 157 | for (i = n2; i > 0; i--) |
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| 158 | { |
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| 159 | coeff = _SIMD32_OFFSET(pC); |
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| 160 | pC += 2; |
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| 161 | |||
| 162 | T = _SIMD32_OFFSET(pSi); |
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| 163 | T = __SHADD16(T, 0); // this is just a SIMD arithmetic shift right by 1 |
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| 164 | |||
| 165 | S = _SIMD32_OFFSET(pSl); |
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| 166 | S = __SHADD16(S, 0); // this is just a SIMD arithmetic shift right by 1 |
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| 167 | |||
| 168 | R = __QSUB16(T, S); |
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| 169 | |||
| 170 | _SIMD32_OFFSET(pSi) = __SHADD16(T, S); |
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| 171 | pSi += 2; |
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| 172 | |||
| 173 | #ifndef ARM_MATH_BIG_ENDIAN |
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| 174 | |||
| 175 | out1 = __SMUAD(coeff, R) >> 16; |
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| 176 | out2 = __SMUSDX(coeff, R); |
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| 177 | |||
| 178 | #else |
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| 179 | |||
| 180 | out1 = __SMUSDX(R, coeff) >> 16U; |
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| 181 | out2 = __SMUAD(coeff, R); |
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| 182 | |||
| 183 | #endif // #ifndef ARM_MATH_BIG_ENDIAN |
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| 184 | |||
| 185 | _SIMD32_OFFSET(pSl) = |
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| 186 | (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); |
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| 187 | pSl += 2; |
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| 188 | } |
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| 189 | |||
| 190 | #else // #if defined (ARM_MATH_DSP) |
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| 191 | |||
| 192 | ia = 0; |
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| 193 | for (i = 0; i < n2; i++) |
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| 194 | { |
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| 195 | cosVal = pCoef[ia * 2]; |
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| 196 | sinVal = pCoef[(ia * 2) + 1]; |
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| 197 | ia++; |
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| 198 | |||
| 199 | l = i + n2; |
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| 200 | |||
| 201 | xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U); |
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| 202 | pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; |
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| 203 | |||
| 204 | yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U); |
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| 205 | pSrc[2 * i + 1] = |
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| 206 | ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U; |
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| 207 | |||
| 208 | pSrc[2U * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) + |
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| 209 | ((int16_t) (((q31_t) yt * sinVal) >> 16))); |
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| 210 | |||
| 211 | pSrc[2U * l + 1U] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) - |
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| 212 | ((int16_t) (((q31_t) xt * sinVal) >> 16))); |
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| 213 | } |
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| 214 | |||
| 215 | #endif // #if defined (ARM_MATH_DSP) |
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| 216 | |||
| 217 | // first col |
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| 218 | arm_radix4_butterfly_q15( pSrc, n2, (q15_t*)pCoef, 2U); |
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| 219 | // second col |
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| 220 | arm_radix4_butterfly_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U); |
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| 221 | |||
| 222 | for (i = 0; i < fftLen >> 1; i++) |
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| 223 | { |
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| 224 | p0 = pSrc[4*i+0]; |
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| 225 | p1 = pSrc[4*i+1]; |
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| 226 | p2 = pSrc[4*i+2]; |
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| 227 | p3 = pSrc[4*i+3]; |
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| 228 | |||
| 229 | p0 <<= 1; |
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| 230 | p1 <<= 1; |
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| 231 | p2 <<= 1; |
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| 232 | p3 <<= 1; |
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| 233 | |||
| 234 | pSrc[4*i+0] = p0; |
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| 235 | pSrc[4*i+1] = p1; |
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| 236 | pSrc[4*i+2] = p2; |
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| 237 | pSrc[4*i+3] = p3; |
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| 238 | } |
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| 239 | } |
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| 240 | |||
| 241 | void arm_cfft_radix4by2_inverse_q15( |
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| 242 | q15_t * pSrc, |
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| 243 | uint32_t fftLen, |
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| 244 | const q15_t * pCoef) |
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| 245 | { |
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| 246 | uint32_t i; |
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| 247 | uint32_t n2; |
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| 248 | q15_t p0, p1, p2, p3; |
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| 249 | #if defined (ARM_MATH_DSP) |
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| 250 | q31_t T, S, R; |
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| 251 | q31_t coeff, out1, out2; |
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| 252 | const q15_t *pC = pCoef; |
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| 253 | q15_t *pSi = pSrc; |
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| 254 | q15_t *pSl = pSrc + fftLen; |
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| 255 | #else |
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| 256 | uint32_t ia, l; |
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| 257 | q15_t xt, yt, cosVal, sinVal; |
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| 258 | #endif |
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| 259 | |||
| 260 | n2 = fftLen >> 1; |
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| 261 | |||
| 262 | #if defined (ARM_MATH_DSP) |
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| 263 | |||
| 264 | for (i = n2; i > 0; i--) |
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| 265 | { |
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| 266 | coeff = _SIMD32_OFFSET(pC); |
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| 267 | pC += 2; |
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| 268 | |||
| 269 | T = _SIMD32_OFFSET(pSi); |
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| 270 | T = __SHADD16(T, 0); // this is just a SIMD arithmetic shift right by 1 |
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| 271 | |||
| 272 | S = _SIMD32_OFFSET(pSl); |
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| 273 | S = __SHADD16(S, 0); // this is just a SIMD arithmetic shift right by 1 |
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| 274 | |||
| 275 | R = __QSUB16(T, S); |
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| 276 | |||
| 277 | _SIMD32_OFFSET(pSi) = __SHADD16(T, S); |
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| 278 | pSi += 2; |
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| 279 | |||
| 280 | #ifndef ARM_MATH_BIG_ENDIAN |
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| 281 | |||
| 282 | out1 = __SMUSD(coeff, R) >> 16; |
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| 283 | out2 = __SMUADX(coeff, R); |
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| 284 | #else |
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| 285 | |||
| 286 | out1 = __SMUADX(R, coeff) >> 16U; |
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| 287 | out2 = __SMUSD(__QSUB(0, coeff), R); |
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| 288 | |||
| 289 | #endif // #ifndef ARM_MATH_BIG_ENDIAN |
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| 290 | |||
| 291 | _SIMD32_OFFSET(pSl) = |
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| 292 | (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF); |
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| 293 | pSl += 2; |
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| 294 | } |
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| 295 | |||
| 296 | #else // #if defined (ARM_MATH_DSP) |
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| 297 | |||
| 298 | ia = 0; |
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| 299 | for (i = 0; i < n2; i++) |
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| 300 | { |
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| 301 | cosVal = pCoef[ia * 2]; |
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| 302 | sinVal = pCoef[(ia * 2) + 1]; |
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| 303 | ia++; |
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| 304 | |||
| 305 | l = i + n2; |
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| 306 | xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U); |
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| 307 | pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U; |
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| 308 | |||
| 309 | yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U); |
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| 310 | pSrc[2 * i + 1] = |
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| 311 | ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U; |
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| 312 | |||
| 313 | pSrc[2U * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) - |
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| 314 | ((int16_t) (((q31_t) yt * sinVal) >> 16))); |
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| 315 | |||
| 316 | pSrc[2U * l + 1U] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) + |
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| 317 | ((int16_t) (((q31_t) xt * sinVal) >> 16))); |
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| 318 | } |
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| 319 | |||
| 320 | #endif // #if defined (ARM_MATH_DSP) |
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| 321 | |||
| 322 | // first col |
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| 323 | arm_radix4_butterfly_inverse_q15( pSrc, n2, (q15_t*)pCoef, 2U); |
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| 324 | // second col |
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| 325 | arm_radix4_butterfly_inverse_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U); |
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| 326 | |||
| 327 | for (i = 0; i < fftLen >> 1; i++) |
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| 328 | { |
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| 329 | p0 = pSrc[4*i+0]; |
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| 330 | p1 = pSrc[4*i+1]; |
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| 331 | p2 = pSrc[4*i+2]; |
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| 332 | p3 = pSrc[4*i+3]; |
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| 333 | |||
| 334 | p0 <<= 1; |
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| 335 | p1 <<= 1; |
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| 336 | p2 <<= 1; |
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| 337 | p3 <<= 1; |
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| 338 | |||
| 339 | pSrc[4*i+0] = p0; |
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| 340 | pSrc[4*i+1] = p1; |
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| 341 | pSrc[4*i+2] = p2; |
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| 342 | pSrc[4*i+3] = p3; |
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| 343 | } |
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| 344 | } |
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| 345 |