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51 mjames 1
/**
2
  ******************************************************************************
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  * @file      startup_stm32l152xe.s
4
  * @author    MCD Application Team
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  * @brief     STM32L152XE Devices vector table for GCC toolchain.
6
  *            This module performs:
7
  *                - Set the initial SP
8
  *                - Set the initial PC == Reset_Handler,
9
  *                - Set the vector table entries with the exceptions ISR address
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  *                - Configure the clock system
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  *                - Branches to main in the C library (which eventually
12
  *                  calls main()).
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  *            After Reset the Cortex-M3 processor is in Thread mode,
14
  *            priority is Privileged, and the Stack is set to Main.
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  ******************************************************************************
16
  *
17
  * @attention
18
  *
19
  * Copyright (c) 2017 STMicroelectronics. All rights reserved.
20
  *
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  * This software component is licensed by ST under BSD 3-Clause license,
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  * the "License"; You may not use this file except in compliance with the 
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  * License. You may obtain a copy of the License at:
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  *                        opensource.org/licenses/BSD-3-Clause
25
  *
26
  ******************************************************************************
27
  */
28
 
29
  .syntax unified
30
  .cpu cortex-m3
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  .fpu softvfp
32
  .thumb
33
 
34
.global g_pfnVectors
35
.global Default_Handler
36
 
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/* start address for the initialization values of the .data section.
38
defined in linker script */
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.word _sidata
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/* start address for the .data section. defined in linker script */
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.word _sdata
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/* end address for the .data section. defined in linker script */
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.word _edata
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/* start address for the .bss section. defined in linker script */
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.word _sbss
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/* end address for the .bss section. defined in linker script */
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.word _ebss
48
 
49
.equ  BootRAM, 0xF108F85F
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/**
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 * @brief  This is the code that gets called when the processor first
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 *          starts execution following a reset event. Only the absolutely
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 *          necessary set is performed, after which the application
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 *          supplied main() routine is called.
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 * @param  None
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 * @retval : None
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*/
58
 
59
  .section .text.Reset_Handler
60
  .weak Reset_Handler
61
  .type Reset_Handler, %function
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Reset_Handler:
63
 
64
/* Copy the data segment initializers from flash to SRAM */
61 mjames 65
  ldr r0, =_sdata
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  ldr r1, =_edata
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  ldr r2, =_sidata
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  movs r3, #0
51 mjames 69
  b LoopCopyDataInit
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CopyDataInit:
61 mjames 72
  ldr r4, [r2, r3]
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  str r4, [r0, r3]
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  adds r3, r3, #4
51 mjames 75
 
76
LoopCopyDataInit:
61 mjames 77
  adds r4, r0, r3
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  cmp r4, r1
51 mjames 79
  bcc CopyDataInit
61 mjames 80
 
81
/* Zero fill the bss segment. */
51 mjames 82
  ldr r2, =_sbss
61 mjames 83
  ldr r4, =_ebss
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  movs r3, #0
51 mjames 85
  b LoopFillZerobss
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51 mjames 87
FillZerobss:
61 mjames 88
  str  r3, [r2]
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  adds r2, r2, #4
51 mjames 90
 
91
LoopFillZerobss:
61 mjames 92
  cmp r2, r4
51 mjames 93
  bcc FillZerobss
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95
/* Call the clock system intitialization function.*/
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    bl  SystemInit
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/* Call static constructors */
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    bl __libc_init_array
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/* Call the application's entry point.*/
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  bl main
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  bx lr
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.size Reset_Handler, .-Reset_Handler
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104
/**
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 * @brief  This is the code that gets called when the processor receives an
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 *         unexpected interrupt.  This simply enters an infinite loop, preserving
107
 *         the system state for examination by a debugger.
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 *
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 * @param  None
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 * @retval : None
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*/
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    .section .text.Default_Handler,"ax",%progbits
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Default_Handler:
114
Infinite_Loop:
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  b Infinite_Loop
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  .size Default_Handler, .-Default_Handler
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/******************************************************************************
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*
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* The minimal vector table for a Cortex M3.  Note that the proper constructs
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* must be placed on this to ensure that it ends up at physical address
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* 0x0000.0000.
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*
123
******************************************************************************/
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   .section .isr_vector,"a",%progbits
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  .type g_pfnVectors, %object
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  .size g_pfnVectors, .-g_pfnVectors
127
 
128
 
129
g_pfnVectors:
130
  .word _estack
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  .word Reset_Handler
132
  .word NMI_Handler
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  .word HardFault_Handler
134
  .word MemManage_Handler
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  .word BusFault_Handler
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  .word UsageFault_Handler
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  .word 0
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  .word 0
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  .word 0
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  .word 0
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  .word SVC_Handler
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  .word DebugMon_Handler
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  .word 0
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  .word PendSV_Handler
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  .word SysTick_Handler
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  .word WWDG_IRQHandler
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  .word PVD_IRQHandler
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  .word TAMPER_STAMP_IRQHandler
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  .word RTC_WKUP_IRQHandler
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  .word FLASH_IRQHandler
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  .word RCC_IRQHandler
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  .word EXTI0_IRQHandler
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  .word EXTI1_IRQHandler
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  .word EXTI2_IRQHandler
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  .word EXTI3_IRQHandler
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  .word EXTI4_IRQHandler
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  .word DMA1_Channel1_IRQHandler
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  .word DMA1_Channel2_IRQHandler
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  .word DMA1_Channel3_IRQHandler
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  .word DMA1_Channel4_IRQHandler
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  .word DMA1_Channel5_IRQHandler
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  .word DMA1_Channel6_IRQHandler
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  .word DMA1_Channel7_IRQHandler
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  .word ADC1_IRQHandler
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  .word USB_HP_IRQHandler
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  .word USB_LP_IRQHandler
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  .word DAC_IRQHandler
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  .word COMP_IRQHandler
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  .word EXTI9_5_IRQHandler
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  .word LCD_IRQHandler  
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  .word TIM9_IRQHandler
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  .word TIM10_IRQHandler
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  .word TIM11_IRQHandler
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  .word TIM2_IRQHandler
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  .word TIM3_IRQHandler
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  .word TIM4_IRQHandler
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  .word I2C1_EV_IRQHandler
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  .word I2C1_ER_IRQHandler
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  .word I2C2_EV_IRQHandler
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  .word I2C2_ER_IRQHandler
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  .word SPI1_IRQHandler
182
  .word SPI2_IRQHandler
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  .word USART1_IRQHandler
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  .word USART2_IRQHandler
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  .word USART3_IRQHandler
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  .word EXTI15_10_IRQHandler
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  .word RTC_Alarm_IRQHandler
188
  .word USB_FS_WKUP_IRQHandler
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  .word TIM6_IRQHandler
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  .word TIM7_IRQHandler
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  .word 0
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  .word TIM5_IRQHandler
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  .word SPI3_IRQHandler
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  .word UART4_IRQHandler
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  .word UART5_IRQHandler
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  .word DMA2_Channel1_IRQHandler
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  .word DMA2_Channel2_IRQHandler
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  .word DMA2_Channel3_IRQHandler
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  .word DMA2_Channel4_IRQHandler
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  .word DMA2_Channel5_IRQHandler
201
  .word 0
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  .word COMP_ACQ_IRQHandler
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  .word 0
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  .word 0
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  .word 0
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  .word 0
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  .word 0
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  .word BootRAM          /* @0x108. This is for boot in RAM mode for 
209
                            STM32L152XE devices. */
210
 
211
/*******************************************************************************
212
*
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* Provide weak aliases for each Exception handler to the Default_Handler.
214
* As they are weak aliases, any function with the same name will override
215
* this definition.
216
*
217
*******************************************************************************/
218
 
219
  .weak NMI_Handler
220
  .thumb_set NMI_Handler,Default_Handler
221
 
222
  .weak HardFault_Handler
223
  .thumb_set HardFault_Handler,Default_Handler
224
 
225
  .weak MemManage_Handler
226
  .thumb_set MemManage_Handler,Default_Handler
227
 
228
  .weak BusFault_Handler
229
  .thumb_set BusFault_Handler,Default_Handler
230
 
231
  .weak UsageFault_Handler
232
  .thumb_set UsageFault_Handler,Default_Handler
233
 
234
  .weak SVC_Handler
235
  .thumb_set SVC_Handler,Default_Handler
236
 
237
  .weak DebugMon_Handler
238
  .thumb_set DebugMon_Handler,Default_Handler
239
 
240
  .weak PendSV_Handler
241
  .thumb_set PendSV_Handler,Default_Handler
242
 
243
  .weak SysTick_Handler
244
  .thumb_set SysTick_Handler,Default_Handler
245
 
246
  .weak WWDG_IRQHandler
247
  .thumb_set WWDG_IRQHandler,Default_Handler
248
 
249
  .weak PVD_IRQHandler
250
  .thumb_set PVD_IRQHandler,Default_Handler
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252
  .weak TAMPER_STAMP_IRQHandler
253
  .thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
254
 
255
  .weak RTC_WKUP_IRQHandler
256
  .thumb_set RTC_WKUP_IRQHandler,Default_Handler
257
 
258
  .weak FLASH_IRQHandler
259
  .thumb_set FLASH_IRQHandler,Default_Handler
260
 
261
  .weak RCC_IRQHandler
262
  .thumb_set RCC_IRQHandler,Default_Handler
263
 
264
  .weak EXTI0_IRQHandler
265
  .thumb_set EXTI0_IRQHandler,Default_Handler
266
 
267
  .weak EXTI1_IRQHandler
268
  .thumb_set EXTI1_IRQHandler,Default_Handler
269
 
270
  .weak EXTI2_IRQHandler
271
  .thumb_set EXTI2_IRQHandler,Default_Handler
272
 
273
  .weak EXTI3_IRQHandler
274
  .thumb_set EXTI3_IRQHandler,Default_Handler
275
 
276
  .weak EXTI4_IRQHandler
277
  .thumb_set EXTI4_IRQHandler,Default_Handler
278
 
279
  .weak DMA1_Channel1_IRQHandler
280
  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
281
 
282
  .weak DMA1_Channel2_IRQHandler
283
  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
284
 
285
  .weak DMA1_Channel3_IRQHandler
286
  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
287
 
288
  .weak DMA1_Channel4_IRQHandler
289
  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
290
 
291
  .weak DMA1_Channel5_IRQHandler
292
  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
293
 
294
  .weak DMA1_Channel6_IRQHandler
295
  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
296
 
297
  .weak DMA1_Channel7_IRQHandler
298
  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
299
 
300
  .weak ADC1_IRQHandler
301
  .thumb_set ADC1_IRQHandler,Default_Handler
302
 
303
  .weak USB_HP_IRQHandler
304
  .thumb_set USB_HP_IRQHandler,Default_Handler
305
 
306
  .weak USB_LP_IRQHandler
307
  .thumb_set USB_LP_IRQHandler,Default_Handler
308
 
309
  .weak DAC_IRQHandler
310
  .thumb_set DAC_IRQHandler,Default_Handler
311
 
312
  .weak COMP_IRQHandler
313
  .thumb_set COMP_IRQHandler,Default_Handler
314
 
315
  .weak EXTI9_5_IRQHandler
316
  .thumb_set EXTI9_5_IRQHandler,Default_Handler
317
 
318
  .weak LCD_IRQHandler
319
  .thumb_set LCD_IRQHandler,Default_Handler  
320
 
321
  .weak TIM9_IRQHandler
322
  .thumb_set TIM9_IRQHandler,Default_Handler
323
 
324
  .weak TIM10_IRQHandler
325
  .thumb_set TIM10_IRQHandler,Default_Handler
326
 
327
  .weak TIM11_IRQHandler
328
  .thumb_set TIM11_IRQHandler,Default_Handler
329
 
330
  .weak TIM2_IRQHandler
331
  .thumb_set TIM2_IRQHandler,Default_Handler
332
 
333
  .weak TIM3_IRQHandler
334
  .thumb_set TIM3_IRQHandler,Default_Handler
335
 
336
  .weak TIM4_IRQHandler
337
  .thumb_set TIM4_IRQHandler,Default_Handler
338
 
339
  .weak I2C1_EV_IRQHandler
340
  .thumb_set I2C1_EV_IRQHandler,Default_Handler
341
 
342
  .weak I2C1_ER_IRQHandler
343
  .thumb_set I2C1_ER_IRQHandler,Default_Handler
344
 
345
  .weak I2C2_EV_IRQHandler
346
  .thumb_set I2C2_EV_IRQHandler,Default_Handler
347
 
348
  .weak I2C2_ER_IRQHandler
349
  .thumb_set I2C2_ER_IRQHandler,Default_Handler
350
 
351
  .weak SPI1_IRQHandler
352
  .thumb_set SPI1_IRQHandler,Default_Handler
353
 
354
  .weak SPI2_IRQHandler
355
  .thumb_set SPI2_IRQHandler,Default_Handler
356
 
357
  .weak USART1_IRQHandler
358
  .thumb_set USART1_IRQHandler,Default_Handler
359
 
360
  .weak USART2_IRQHandler
361
  .thumb_set USART2_IRQHandler,Default_Handler
362
 
363
  .weak USART3_IRQHandler
364
  .thumb_set USART3_IRQHandler,Default_Handler
365
 
366
  .weak EXTI15_10_IRQHandler
367
  .thumb_set EXTI15_10_IRQHandler,Default_Handler
368
 
369
  .weak RTC_Alarm_IRQHandler
370
  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
371
 
372
  .weak USB_FS_WKUP_IRQHandler
373
  .thumb_set USB_FS_WKUP_IRQHandler,Default_Handler
374
 
375
  .weak TIM6_IRQHandler
376
  .thumb_set TIM6_IRQHandler,Default_Handler
377
 
378
  .weak TIM7_IRQHandler
379
  .thumb_set TIM7_IRQHandler,Default_Handler
380
 
381
  .weak TIM5_IRQHandler
382
  .thumb_set TIM5_IRQHandler,Default_Handler
383
 
384
  .weak SPI3_IRQHandler
385
  .thumb_set SPI3_IRQHandler,Default_Handler
386
 
387
  .weak UART4_IRQHandler
388
  .thumb_set UART4_IRQHandler,Default_Handler
389
 
390
  .weak UART5_IRQHandler
391
  .thumb_set UART5_IRQHandler,Default_Handler
392
 
393
  .weak DMA2_Channel1_IRQHandler
394
  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
395
 
396
  .weak DMA2_Channel2_IRQHandler
397
  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
398
 
399
  .weak DMA2_Channel3_IRQHandler
400
  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
401
 
402
  .weak DMA2_Channel4_IRQHandler
403
  .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
404
 
405
  .weak DMA2_Channel5_IRQHandler
406
  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
407
 
408
  .weak COMP_ACQ_IRQHandler
409
   .thumb_set COMP_ACQ_IRQHandler,Default_Handler
410
 
411
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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