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30 | mjames | 1 | /** |
2 | ****************************************************************************** |
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3 | * @file stm32l1xx_hal_uart.h |
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4 | * @author MCD Application Team |
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50 | mjames | 5 | * @brief Header file of UART HAL module. |
30 | mjames | 6 | ****************************************************************************** |
7 | * @attention |
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8 | * |
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50 | mjames | 9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
10 | * All rights reserved.</center></h2> |
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30 | mjames | 11 | * |
50 | mjames | 12 | * This software component is licensed by ST under BSD 3-Clause license, |
13 | * the "License"; You may not use this file except in compliance with the |
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14 | * License. You may obtain a copy of the License at: |
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15 | * opensource.org/licenses/BSD-3-Clause |
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30 | mjames | 16 | * |
17 | ****************************************************************************** |
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50 | mjames | 18 | */ |
30 | mjames | 19 | |
20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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21 | #ifndef __STM32L1xx_HAL_UART_H |
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22 | #define __STM32L1xx_HAL_UART_H |
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23 | |||
24 | #ifdef __cplusplus |
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50 | mjames | 25 | extern "C" { |
30 | mjames | 26 | #endif |
27 | |||
28 | /* Includes ------------------------------------------------------------------*/ |
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29 | #include "stm32l1xx_hal_def.h" |
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30 | |||
31 | /** @addtogroup STM32L1xx_HAL_Driver |
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32 | * @{ |
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33 | */ |
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34 | |||
35 | /** @addtogroup UART |
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36 | * @{ |
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50 | mjames | 37 | */ |
30 | mjames | 38 | |
50 | mjames | 39 | /* Exported types ------------------------------------------------------------*/ |
30 | mjames | 40 | /** @defgroup UART_Exported_Types UART Exported Types |
41 | * @{ |
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50 | mjames | 42 | */ |
30 | mjames | 43 | |
50 | mjames | 44 | /** |
30 | mjames | 45 | * @brief UART Init Structure definition |
50 | mjames | 46 | */ |
30 | mjames | 47 | typedef struct |
48 | { |
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49 | uint32_t BaudRate; /*!< This member configures the UART communication baud rate. |
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50 | The baud rate is computed using the following formula: |
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51 | - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate))) |
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50 | mjames | 52 | - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5 |
30 | mjames | 53 | Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */ |
54 | |||
55 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
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56 | This parameter can be a value of @ref UART_Word_Length */ |
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57 | |||
58 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
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59 | This parameter can be a value of @ref UART_Stop_Bits */ |
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60 | |||
61 | uint32_t Parity; /*!< Specifies the parity mode. |
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62 | This parameter can be a value of @ref UART_Parity |
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63 | @note When parity is enabled, the computed parity is inserted |
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64 | at the MSB position of the transmitted data (9th bit when |
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65 | the word length is set to 9 data bits; 8th bit when the |
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66 | word length is set to 8 data bits). */ |
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50 | mjames | 67 | |
68 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
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30 | mjames | 69 | This parameter can be a value of @ref UART_Mode */ |
70 | |||
50 | mjames | 71 | uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled. |
30 | mjames | 72 | This parameter can be a value of @ref UART_Hardware_Flow_Control */ |
73 | |||
50 | mjames | 74 | uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8). |
75 | This parameter can be a value of @ref UART_Over_Sampling */ |
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76 | } UART_InitTypeDef; |
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77 | |||
78 | /** |
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79 | * @brief HAL UART State structures definition |
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80 | * @note HAL UART State value is a combination of 2 different substates: gState and RxState. |
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81 | * - gState contains UART state information related to global Handle management |
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82 | * and also information related to Tx operations. |
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83 | * gState value coding follow below described bitmap : |
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84 | * b7-b6 Error information |
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85 | * 00 : No Error |
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86 | * 01 : (Not Used) |
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87 | * 10 : Timeout |
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88 | * 11 : Error |
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89 | * b5 Peripheral initialization status |
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90 | * 0 : Reset (Peripheral not initialized) |
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61 | mjames | 91 | * 1 : Init done (Peripheral initialized. HAL UART Init function already called) |
50 | mjames | 92 | * b4-b3 (not used) |
93 | * xx : Should be set to 00 |
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94 | * b2 Intrinsic process state |
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95 | * 0 : Ready |
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96 | * 1 : Busy (Peripheral busy with some configuration or internal operations) |
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97 | * b1 (not used) |
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98 | * x : Should be set to 0 |
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99 | * b0 Tx state |
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100 | * 0 : Ready (no Tx operation ongoing) |
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101 | * 1 : Busy (Tx operation ongoing) |
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102 | * - RxState contains information related to Rx operations. |
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103 | * RxState value coding follow below described bitmap : |
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104 | * b7-b6 (not used) |
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105 | * xx : Should be set to 00 |
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106 | * b5 Peripheral initialization status |
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107 | * 0 : Reset (Peripheral not initialized) |
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61 | mjames | 108 | * 1 : Init done (Peripheral initialized) |
50 | mjames | 109 | * b4-b2 (not used) |
110 | * xxx : Should be set to 000 |
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111 | * b1 Rx state |
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112 | * 0 : Ready (no Rx operation ongoing) |
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113 | * 1 : Busy (Rx operation ongoing) |
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114 | * b0 (not used) |
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115 | * x : Should be set to 0. |
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116 | */ |
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30 | mjames | 117 | typedef enum |
118 | { |
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50 | mjames | 119 | HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized |
120 | Value is allowed for gState and RxState */ |
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121 | HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use |
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122 | Value is allowed for gState and RxState */ |
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123 | HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing |
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124 | Value is allowed for gState only */ |
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125 | HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing |
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126 | Value is allowed for gState only */ |
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127 | HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing |
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128 | Value is allowed for RxState only */ |
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129 | HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing |
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130 | Not to be used for neither gState nor RxState. |
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131 | Value is result of combination (Or) between gState and RxState values */ |
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132 | HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state |
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133 | Value is allowed for gState only */ |
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134 | HAL_UART_STATE_ERROR = 0xE0U /*!< Error |
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135 | Value is allowed for gState only */ |
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136 | } HAL_UART_StateTypeDef; |
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30 | mjames | 137 | |
50 | mjames | 138 | /** |
61 | mjames | 139 | * @brief HAL UART Reception type definition |
140 | * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. |
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141 | * It is expected to admit following values : |
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142 | * HAL_UART_RECEPTION_STANDARD = 0x00U, |
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143 | * HAL_UART_RECEPTION_TOIDLE = 0x01U, |
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144 | */ |
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145 | typedef uint32_t HAL_UART_RxTypeTypeDef; |
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146 | |||
147 | /** |
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50 | mjames | 148 | * @brief UART handle Structure definition |
149 | */ |
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150 | typedef struct __UART_HandleTypeDef |
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30 | mjames | 151 | { |
152 | USART_TypeDef *Instance; /*!< UART registers base address */ |
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153 | |||
154 | UART_InitTypeDef Init; /*!< UART communication parameters */ |
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155 | |||
156 | uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ |
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157 | |||
158 | uint16_t TxXferSize; /*!< UART Tx Transfer size */ |
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159 | |||
50 | mjames | 160 | __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ |
30 | mjames | 161 | |
162 | uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ |
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163 | |||
164 | uint16_t RxXferSize; /*!< UART Rx Transfer size */ |
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165 | |||
50 | mjames | 166 | __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ |
30 | mjames | 167 | |
61 | mjames | 168 | __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ |
169 | |||
30 | mjames | 170 | DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ |
171 | |||
172 | DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ |
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173 | |||
174 | HAL_LockTypeDef Lock; /*!< Locking object */ |
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175 | |||
50 | mjames | 176 | __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management |
177 | and also related to Tx operations. |
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178 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
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179 | |||
180 | __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. |
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181 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
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182 | |||
30 | mjames | 183 | __IO uint32_t ErrorCode; /*!< UART Error code */ |
184 | |||
50 | mjames | 185 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
186 | void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ |
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187 | void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ |
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188 | void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ |
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189 | void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ |
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190 | void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ |
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191 | void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ |
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192 | void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ |
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193 | void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ |
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194 | void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ |
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61 | mjames | 195 | void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ |
30 | mjames | 196 | |
50 | mjames | 197 | void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ |
198 | void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ |
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199 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
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200 | |||
201 | } UART_HandleTypeDef; |
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202 | |||
203 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
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30 | mjames | 204 | /** |
50 | mjames | 205 | * @brief HAL UART Callback ID enumeration definition |
206 | */ |
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207 | typedef enum |
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208 | { |
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209 | HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ |
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210 | HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ |
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211 | HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ |
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212 | HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ |
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213 | HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ |
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214 | HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ |
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215 | HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ |
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216 | HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ |
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217 | HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ |
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218 | |||
219 | HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ |
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220 | HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ |
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221 | |||
222 | } HAL_UART_CallbackIDTypeDef; |
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223 | |||
224 | /** |
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225 | * @brief HAL UART Callback pointer definition |
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226 | */ |
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227 | typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ |
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61 | mjames | 228 | typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ |
50 | mjames | 229 | |
230 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
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231 | |||
232 | /** |
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30 | mjames | 233 | * @} |
234 | */ |
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235 | |||
236 | /* Exported constants --------------------------------------------------------*/ |
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50 | mjames | 237 | /** @defgroup UART_Exported_Constants UART Exported Constants |
30 | mjames | 238 | * @{ |
239 | */ |
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240 | |||
50 | mjames | 241 | /** @defgroup UART_Error_Code UART Error Code |
30 | mjames | 242 | * @{ |
243 | */ |
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50 | mjames | 244 | #define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */ |
245 | #define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */ |
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246 | #define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */ |
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247 | #define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */ |
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248 | #define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */ |
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249 | #define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
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250 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
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251 | #define HAL_UART_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid Callback error */ |
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252 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
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30 | mjames | 253 | /** |
254 | * @} |
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255 | */ |
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256 | |||
50 | mjames | 257 | /** @defgroup UART_Word_Length UART Word Length |
30 | mjames | 258 | * @{ |
259 | */ |
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50 | mjames | 260 | #define UART_WORDLENGTH_8B 0x00000000U |
30 | mjames | 261 | #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
262 | /** |
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263 | * @} |
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264 | */ |
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265 | |||
50 | mjames | 266 | /** @defgroup UART_Stop_Bits UART Number of Stop Bits |
30 | mjames | 267 | * @{ |
268 | */ |
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50 | mjames | 269 | #define UART_STOPBITS_1 0x00000000U |
30 | mjames | 270 | #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
271 | /** |
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272 | * @} |
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50 | mjames | 273 | */ |
30 | mjames | 274 | |
50 | mjames | 275 | /** @defgroup UART_Parity UART Parity |
30 | mjames | 276 | * @{ |
50 | mjames | 277 | */ |
278 | #define UART_PARITY_NONE 0x00000000U |
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30 | mjames | 279 | #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
50 | mjames | 280 | #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
30 | mjames | 281 | /** |
282 | * @} |
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50 | mjames | 283 | */ |
30 | mjames | 284 | |
285 | /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control |
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286 | * @{ |
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50 | mjames | 287 | */ |
288 | #define UART_HWCONTROL_NONE 0x00000000U |
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30 | mjames | 289 | #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) |
290 | #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) |
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291 | #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) |
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292 | /** |
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293 | * @} |
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294 | */ |
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295 | |||
296 | /** @defgroup UART_Mode UART Transfer Mode |
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297 | * @{ |
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50 | mjames | 298 | */ |
30 | mjames | 299 | #define UART_MODE_RX ((uint32_t)USART_CR1_RE) |
300 | #define UART_MODE_TX ((uint32_t)USART_CR1_TE) |
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50 | mjames | 301 | #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE | USART_CR1_RE)) |
30 | mjames | 302 | /** |
303 | * @} |
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304 | */ |
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50 | mjames | 305 | |
306 | /** @defgroup UART_State UART State |
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30 | mjames | 307 | * @{ |
50 | mjames | 308 | */ |
309 | #define UART_STATE_DISABLE 0x00000000U |
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30 | mjames | 310 | #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) |
311 | /** |
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312 | * @} |
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313 | */ |
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314 | |||
315 | /** @defgroup UART_Over_Sampling UART Over Sampling |
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316 | * @{ |
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317 | */ |
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50 | mjames | 318 | #define UART_OVERSAMPLING_16 0x00000000U |
30 | mjames | 319 | #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) |
320 | /** |
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321 | * @} |
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322 | */ |
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323 | |||
324 | /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length |
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325 | * @{ |
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50 | mjames | 326 | */ |
327 | #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U |
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30 | mjames | 328 | #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) |
329 | /** |
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330 | * @} |
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331 | */ |
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332 | |||
50 | mjames | 333 | /** @defgroup UART_WakeUp_functions UART Wakeup Functions |
30 | mjames | 334 | * @{ |
335 | */ |
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50 | mjames | 336 | #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U |
30 | mjames | 337 | #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) |
338 | /** |
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339 | * @} |
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340 | */ |
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341 | |||
342 | /** @defgroup UART_Flags UART FLags |
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343 | * Elements values convention: 0xXXXX |
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344 | * - 0xXXXX : Flag mask in the SR register |
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345 | * @{ |
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346 | */ |
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347 | #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS) |
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348 | #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD) |
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349 | #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE) |
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350 | #define UART_FLAG_TC ((uint32_t)USART_SR_TC) |
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351 | #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE) |
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352 | #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE) |
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353 | #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE) |
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354 | #define UART_FLAG_NE ((uint32_t)USART_SR_NE) |
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355 | #define UART_FLAG_FE ((uint32_t)USART_SR_FE) |
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356 | #define UART_FLAG_PE ((uint32_t)USART_SR_PE) |
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357 | /** |
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358 | * @} |
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359 | */ |
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360 | |||
361 | /** @defgroup UART_Interrupt_definition UART Interrupt Definitions |
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362 | * Elements values convention: 0xY000XXXX |
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363 | * - XXXX : Interrupt mask (16 bits) in the Y register |
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364 | * - Y : Interrupt source register (2bits) |
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50 | mjames | 365 | * - 0001: CR1 register |
366 | * - 0010: CR2 register |
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367 | * - 0011: CR3 register |
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30 | mjames | 368 | * @{ |
50 | mjames | 369 | */ |
30 | mjames | 370 | |
50 | mjames | 371 | #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE)) |
372 | #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE)) |
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373 | #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE)) |
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374 | #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE)) |
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375 | #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE)) |
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30 | mjames | 376 | |
50 | mjames | 377 | #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE)) |
30 | mjames | 378 | |
50 | mjames | 379 | #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE)) |
380 | #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE)) |
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30 | mjames | 381 | /** |
382 | * @} |
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383 | */ |
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384 | |||
61 | mjames | 385 | /** @defgroup UART_RECEPTION_TYPE_Values UART Reception type values |
386 | * @{ |
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387 | */ |
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388 | #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ |
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389 | #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ |
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30 | mjames | 390 | /** |
391 | * @} |
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392 | */ |
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393 | |||
61 | mjames | 394 | /** |
395 | * @} |
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396 | */ |
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397 | |||
30 | mjames | 398 | /* Exported macro ------------------------------------------------------------*/ |
399 | /** @defgroup UART_Exported_Macros UART Exported Macros |
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400 | * @{ |
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401 | */ |
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402 | |||
50 | mjames | 403 | /** @brief Reset UART handle gstate & RxState |
404 | * @param __HANDLE__ specifies the UART Handle. |
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405 | * UART Handle selects the USARTx or UARTy peripheral |
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30 | mjames | 406 | * (USART,UART availability and x,y values depending on device). |
407 | * @retval None |
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408 | */ |
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50 | mjames | 409 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
410 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
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411 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
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412 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
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413 | (__HANDLE__)->MspInitCallback = NULL; \ |
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414 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
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415 | } while(0U) |
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416 | #else |
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417 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
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418 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
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419 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
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420 | } while(0U) |
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421 | #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ |
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30 | mjames | 422 | |
50 | mjames | 423 | /** @brief Flushes the UART DR register |
424 | * @param __HANDLE__ specifies the UART Handle. |
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425 | * UART Handle selects the USARTx or UARTy peripheral |
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30 | mjames | 426 | * (USART,UART availability and x,y values depending on device). |
427 | */ |
||
428 | #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR) |
||
429 | |||
50 | mjames | 430 | /** @brief Checks whether the specified UART flag is set or not. |
431 | * @param __HANDLE__ specifies the UART Handle. |
||
432 | * UART Handle selects the USARTx or UARTy peripheral |
||
30 | mjames | 433 | * (USART,UART availability and x,y values depending on device). |
50 | mjames | 434 | * @param __FLAG__ specifies the flag to check. |
30 | mjames | 435 | * This parameter can be one of the following values: |
436 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) |
||
437 | * @arg UART_FLAG_LBD: LIN Break detection flag |
||
438 | * @arg UART_FLAG_TXE: Transmit data register empty flag |
||
439 | * @arg UART_FLAG_TC: Transmission Complete flag |
||
440 | * @arg UART_FLAG_RXNE: Receive data register not empty flag |
||
441 | * @arg UART_FLAG_IDLE: Idle Line detection flag |
||
50 | mjames | 442 | * @arg UART_FLAG_ORE: Overrun Error flag |
30 | mjames | 443 | * @arg UART_FLAG_NE: Noise Error flag |
444 | * @arg UART_FLAG_FE: Framing Error flag |
||
445 | * @arg UART_FLAG_PE: Parity Error flag |
||
446 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
||
447 | */ |
||
50 | mjames | 448 | #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
30 | mjames | 449 | |
50 | mjames | 450 | /** @brief Clears the specified UART pending flag. |
451 | * @param __HANDLE__ specifies the UART Handle. |
||
452 | * UART Handle selects the USARTx or UARTy peripheral |
||
30 | mjames | 453 | * (USART,UART availability and x,y values depending on device). |
50 | mjames | 454 | * @param __FLAG__ specifies the flag to check. |
30 | mjames | 455 | * This parameter can be any combination of the following values: |
456 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). |
||
457 | * @arg UART_FLAG_LBD: LIN Break detection flag. |
||
458 | * @arg UART_FLAG_TC: Transmission Complete flag. |
||
459 | * @arg UART_FLAG_RXNE: Receive data register not empty flag. |
||
50 | mjames | 460 | * |
461 | * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun |
||
462 | * error) and IDLE (Idle line detected) flags are cleared by software |
||
30 | mjames | 463 | * sequence: a read operation to USART_SR register followed by a read |
464 | * operation to USART_DR register. |
||
465 | * @note RXNE flag can be also cleared by a read to the USART_DR register. |
||
50 | mjames | 466 | * @note TC flag can be also cleared by software sequence: a read operation to |
30 | mjames | 467 | * USART_SR register followed by a write operation to USART_DR register. |
468 | * @note TXE flag is cleared only by a write to the USART_DR register. |
||
50 | mjames | 469 | * |
30 | mjames | 470 | * @retval None |
471 | */ |
||
472 | #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) |
||
473 | |||
50 | mjames | 474 | /** @brief Clears the UART PE pending flag. |
475 | * @param __HANDLE__ specifies the UART Handle. |
||
476 | * UART Handle selects the USARTx or UARTy peripheral |
||
30 | mjames | 477 | * (USART,UART availability and x,y values depending on device). |
478 | * @retval None |
||
479 | */ |
||
50 | mjames | 480 | #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \ |
481 | do{ \ |
||
482 | __IO uint32_t tmpreg = 0x00U; \ |
||
483 | tmpreg = (__HANDLE__)->Instance->SR; \ |
||
484 | tmpreg = (__HANDLE__)->Instance->DR; \ |
||
485 | UNUSED(tmpreg); \ |
||
486 | } while(0U) |
||
30 | mjames | 487 | |
50 | mjames | 488 | /** @brief Clears the UART FE pending flag. |
489 | * @param __HANDLE__ specifies the UART Handle. |
||
490 | * UART Handle selects the USARTx or UARTy peripheral |
||
30 | mjames | 491 | * (USART,UART availability and x,y values depending on device). |
492 | * @retval None |
||
493 | */ |
||
494 | #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
495 | |||
50 | mjames | 496 | /** @brief Clears the UART NE pending flag. |
497 | * @param __HANDLE__ specifies the UART Handle. |
||
498 | * UART Handle selects the USARTx or UARTy peripheral |
||
30 | mjames | 499 | * (USART,UART availability and x,y values depending on device). |
500 | * @retval None |
||
501 | */ |
||
502 | #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
503 | |||
50 | mjames | 504 | /** @brief Clears the UART ORE pending flag. |
505 | * @param __HANDLE__ specifies the UART Handle. |
||
506 | * UART Handle selects the USARTx or UARTy peripheral |
||
30 | mjames | 507 | * (USART,UART availability and x,y values depending on device). |
508 | * @retval None |
||
509 | */ |
||
510 | #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
511 | |||
50 | mjames | 512 | /** @brief Clears the UART IDLE pending flag. |
513 | * @param __HANDLE__ specifies the UART Handle. |
||
514 | * UART Handle selects the USARTx or UARTy peripheral |
||
30 | mjames | 515 | * (USART,UART availability and x,y values depending on device). |
516 | * @retval None |
||
517 | */ |
||
518 | #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
||
50 | mjames | 519 | |
30 | mjames | 520 | /** @brief Enable the specified UART interrupt. |
50 | mjames | 521 | * @param __HANDLE__ specifies the UART Handle. |
522 | * UART Handle selects the USARTx or UARTy peripheral |
||
30 | mjames | 523 | * (USART,UART availability and x,y values depending on device). |
50 | mjames | 524 | * @param __INTERRUPT__ specifies the UART interrupt source to enable. |
30 | mjames | 525 | * This parameter can be one of the following values: |
526 | * @arg UART_IT_CTS: CTS change interrupt |
||
527 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
528 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
529 | * @arg UART_IT_TC: Transmission complete interrupt |
||
530 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
531 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
532 | * @arg UART_IT_PE: Parity Error interrupt |
||
533 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
||
534 | * @retval None |
||
535 | */ |
||
50 | mjames | 536 | #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
537 | (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
||
30 | mjames | 538 | ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK))) |
539 | |||
540 | /** @brief Disable the specified UART interrupt. |
||
50 | mjames | 541 | * @param __HANDLE__ specifies the UART Handle. |
542 | * UART Handle selects the USARTx or UARTy peripheral |
||
30 | mjames | 543 | * (USART,UART availability and x,y values depending on device). |
50 | mjames | 544 | * @param __INTERRUPT__ specifies the UART interrupt source to disable. |
30 | mjames | 545 | * This parameter can be one of the following values: |
546 | * @arg UART_IT_CTS: CTS change interrupt |
||
547 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
548 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
549 | * @arg UART_IT_TC: Transmission complete interrupt |
||
550 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
551 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
552 | * @arg UART_IT_PE: Parity Error interrupt |
||
553 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
||
554 | * @retval None |
||
555 | */ |
||
50 | mjames | 556 | #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
557 | (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
||
30 | mjames | 558 | ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK))) |
50 | mjames | 559 | |
560 | /** @brief Checks whether the specified UART interrupt source is enabled or not. |
||
561 | * @param __HANDLE__ specifies the UART Handle. |
||
562 | * UART Handle selects the USARTx or UARTy peripheral |
||
30 | mjames | 563 | * (USART,UART availability and x,y values depending on device). |
50 | mjames | 564 | * @param __IT__ specifies the UART interrupt source to check. |
30 | mjames | 565 | * This parameter can be one of the following values: |
566 | * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) |
||
567 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
568 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
569 | * @arg UART_IT_TC: Transmission complete interrupt |
||
570 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
571 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
572 | * @arg UART_IT_ERR: Error interrupt |
||
573 | * @retval The new state of __IT__ (TRUE or FALSE). |
||
574 | */ |
||
50 | mjames | 575 | #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \ |
30 | mjames | 576 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK)) |
577 | |||
50 | mjames | 578 | /** @brief Enable CTS flow control |
579 | * @note This macro allows to enable CTS hardware flow control for a given UART instance, |
||
30 | mjames | 580 | * without need to call HAL_UART_Init() function. |
581 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
582 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
||
583 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
584 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
585 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
50 | mjames | 586 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
587 | * @param __HANDLE__ specifies the UART Handle. |
||
588 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
30 | mjames | 589 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
590 | * @retval None |
||
591 | */ |
||
592 | #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ |
||
593 | do{ \ |
||
594 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
||
595 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ |
||
50 | mjames | 596 | } while(0U) |
30 | mjames | 597 | |
50 | mjames | 598 | /** @brief Disable CTS flow control |
599 | * @note This macro allows to disable CTS hardware flow control for a given UART instance, |
||
30 | mjames | 600 | * without need to call HAL_UART_Init() function. |
601 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
602 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
||
603 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
604 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
605 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
50 | mjames | 606 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
607 | * @param __HANDLE__ specifies the UART Handle. |
||
608 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
30 | mjames | 609 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
610 | * @retval None |
||
611 | */ |
||
612 | #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ |
||
613 | do{ \ |
||
614 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
||
615 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ |
||
50 | mjames | 616 | } while(0U) |
30 | mjames | 617 | |
50 | mjames | 618 | /** @brief Enable RTS flow control |
619 | * This macro allows to enable RTS hardware flow control for a given UART instance, |
||
30 | mjames | 620 | * without need to call HAL_UART_Init() function. |
621 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
622 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
||
623 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
624 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
625 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
50 | mjames | 626 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
627 | * @param __HANDLE__ specifies the UART Handle. |
||
628 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
30 | mjames | 629 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
630 | * @retval None |
||
631 | */ |
||
632 | #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ |
||
633 | do{ \ |
||
634 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ |
||
635 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ |
||
50 | mjames | 636 | } while(0U) |
30 | mjames | 637 | |
50 | mjames | 638 | /** @brief Disable RTS flow control |
639 | * This macro allows to disable RTS hardware flow control for a given UART instance, |
||
30 | mjames | 640 | * without need to call HAL_UART_Init() function. |
641 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
642 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
||
643 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
644 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
645 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
50 | mjames | 646 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
647 | * @param __HANDLE__ specifies the UART Handle. |
||
648 | * The Handle Instance can be any USARTx (supporting the HW Flow control feature). |
||
30 | mjames | 649 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
650 | * @retval None |
||
651 | */ |
||
652 | #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ |
||
653 | do{ \ |
||
654 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ |
||
655 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ |
||
50 | mjames | 656 | } while(0U) |
30 | mjames | 657 | |
50 | mjames | 658 | /** @brief Macro to enable the UART's one bit sample method |
659 | * @param __HANDLE__ specifies the UART Handle. |
||
660 | * @retval None |
||
661 | */ |
||
662 | #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
||
30 | mjames | 663 | |
50 | mjames | 664 | /** @brief Macro to disable the UART's one bit sample method |
665 | * @param __HANDLE__ specifies the UART Handle. |
||
666 | * @retval None |
||
667 | */ |
||
668 | #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT)) |
||
669 | |||
30 | mjames | 670 | /** @brief Enable UART |
50 | mjames | 671 | * @param __HANDLE__ specifies the UART Handle. |
30 | mjames | 672 | * @retval None |
50 | mjames | 673 | */ |
30 | mjames | 674 | #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
675 | |||
676 | /** @brief Disable UART |
||
50 | mjames | 677 | * @param __HANDLE__ specifies the UART Handle. |
30 | mjames | 678 | * @retval None |
679 | */ |
||
680 | #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
||
681 | /** |
||
682 | * @} |
||
683 | */ |
||
684 | |||
50 | mjames | 685 | /* Exported functions --------------------------------------------------------*/ |
686 | /** @addtogroup UART_Exported_Functions |
||
30 | mjames | 687 | * @{ |
688 | */ |
||
689 | |||
50 | mjames | 690 | /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions |
30 | mjames | 691 | * @{ |
692 | */ |
||
693 | |||
50 | mjames | 694 | /* Initialization/de-initialization functions **********************************/ |
30 | mjames | 695 | HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); |
696 | HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); |
||
697 | HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); |
||
698 | HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); |
||
50 | mjames | 699 | HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); |
30 | mjames | 700 | void HAL_UART_MspInit(UART_HandleTypeDef *huart); |
701 | void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); |
||
702 | |||
50 | mjames | 703 | /* Callbacks Register/UnRegister functions ***********************************/ |
704 | #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) |
||
705 | HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, pUART_CallbackTypeDef pCallback); |
||
706 | HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); |
||
61 | mjames | 707 | |
708 | HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); |
||
709 | HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); |
||
50 | mjames | 710 | #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ |
711 | |||
30 | mjames | 712 | /** |
713 | * @} |
||
714 | */ |
||
715 | |||
50 | mjames | 716 | /** @addtogroup UART_Exported_Functions_Group2 IO operation functions |
30 | mjames | 717 | * @{ |
718 | */ |
||
719 | |||
50 | mjames | 720 | /* IO operation functions *******************************************************/ |
30 | mjames | 721 | HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
722 | HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
723 | HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
724 | HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
725 | HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
726 | HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
727 | HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); |
||
728 | HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); |
||
729 | HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); |
||
61 | mjames | 730 | |
731 | HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, uint32_t Timeout); |
||
732 | HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
733 | HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
734 | |||
50 | mjames | 735 | /* Transfer Abort functions */ |
736 | HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); |
||
737 | HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); |
||
738 | HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); |
||
739 | HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); |
||
740 | HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); |
||
741 | HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); |
||
742 | |||
30 | mjames | 743 | void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); |
744 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); |
||
745 | void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); |
||
746 | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); |
||
747 | void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); |
||
748 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); |
||
50 | mjames | 749 | void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); |
750 | void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); |
||
751 | void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); |
||
30 | mjames | 752 | |
61 | mjames | 753 | void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); |
754 | |||
30 | mjames | 755 | /** |
756 | * @} |
||
757 | */ |
||
758 | |||
50 | mjames | 759 | /** @addtogroup UART_Exported_Functions_Group3 |
30 | mjames | 760 | * @{ |
761 | */ |
||
762 | /* Peripheral Control functions ************************************************/ |
||
763 | HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); |
||
764 | HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); |
||
765 | HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart); |
||
766 | HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); |
||
767 | HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); |
||
768 | /** |
||
769 | * @} |
||
770 | */ |
||
771 | |||
50 | mjames | 772 | /** @addtogroup UART_Exported_Functions_Group4 |
30 | mjames | 773 | * @{ |
774 | */ |
||
50 | mjames | 775 | /* Peripheral State functions **************************************************/ |
30 | mjames | 776 | HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); |
777 | uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); |
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50 | mjames | 778 | /** |
779 | * @} |
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780 | */ |
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30 | mjames | 781 | |
782 | /** |
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783 | * @} |
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784 | */ |
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50 | mjames | 785 | /* Private types -------------------------------------------------------------*/ |
786 | /* Private variables ---------------------------------------------------------*/ |
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787 | /* Private constants ---------------------------------------------------------*/ |
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788 | /** @defgroup UART_Private_Constants UART Private Constants |
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789 | * @{ |
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790 | */ |
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791 | /** @brief UART interruptions flag mask |
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792 | * |
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793 | */ |
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794 | #define UART_IT_MASK 0x0000FFFFU |
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30 | mjames | 795 | |
50 | mjames | 796 | #define UART_CR1_REG_INDEX 1U |
797 | #define UART_CR2_REG_INDEX 2U |
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798 | #define UART_CR3_REG_INDEX 3U |
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30 | mjames | 799 | /** |
800 | * @} |
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801 | */ |
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802 | |||
50 | mjames | 803 | /* Private macros ------------------------------------------------------------*/ |
804 | /** @defgroup UART_Private_Macros UART Private Macros |
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805 | * @{ |
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806 | */ |
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807 | #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \ |
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808 | ((LENGTH) == UART_WORDLENGTH_9B)) |
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809 | #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B)) |
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810 | #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \ |
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811 | ((STOPBITS) == UART_STOPBITS_2)) |
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812 | #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \ |
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813 | ((PARITY) == UART_PARITY_EVEN) || \ |
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814 | ((PARITY) == UART_PARITY_ODD)) |
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815 | #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ |
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816 | (((CONTROL) == UART_HWCONTROL_NONE) || \ |
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817 | ((CONTROL) == UART_HWCONTROL_RTS) || \ |
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818 | ((CONTROL) == UART_HWCONTROL_CTS) || \ |
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819 | ((CONTROL) == UART_HWCONTROL_RTS_CTS)) |
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820 | #define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U)) |
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821 | #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \ |
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822 | ((STATE) == UART_STATE_ENABLE)) |
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823 | #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \ |
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824 | ((SAMPLING) == UART_OVERSAMPLING_8)) |
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825 | #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16)) |
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826 | #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \ |
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827 | ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B)) |
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828 | #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \ |
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829 | ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK)) |
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830 | #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) <= 4000000U) |
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831 | #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU) |
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832 | |||
833 | #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_))) |
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834 | #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U) |
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835 | #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U) + 50U) / 100U) |
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836 | /* UART BRR = mantissa + overflow + fraction |
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837 | = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */ |
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838 | #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \ |
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839 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \ |
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840 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU)) |
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841 | |||
842 | #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_))) |
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843 | #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U) |
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844 | #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U) + 50U) / 100U) |
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845 | /* UART BRR = mantissa + overflow + fraction |
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846 | = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */ |
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847 | #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \ |
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848 | ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \ |
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849 | (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U)) |
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850 | |||
30 | mjames | 851 | /** |
852 | * @} |
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50 | mjames | 853 | */ |
30 | mjames | 854 | |
50 | mjames | 855 | /* Private functions ---------------------------------------------------------*/ |
856 | /** @defgroup UART_Private_Functions UART Private Functions |
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857 | * @{ |
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858 | */ |
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859 | |||
61 | mjames | 860 | HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
861 | HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
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862 | |||
30 | mjames | 863 | /** |
864 | * @} |
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865 | */ |
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866 | |||
50 | mjames | 867 | /** |
868 | * @} |
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869 | */ |
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870 | |||
871 | /** |
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872 | * @} |
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873 | */ |
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874 | |||
30 | mjames | 875 | #ifdef __cplusplus |
876 | } |
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877 | #endif |
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878 | |||
879 | #endif /* __STM32L1xx_HAL_UART_H */ |
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880 | |||
881 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |