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| 30 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32l1xx_hal_uart.h |
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| 4 | * @author MCD Application Team |
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| 5 | * @version V1.2.0 |
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| 6 | * @date 01-July-2016 |
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| 7 | * @brief This file contains all the functions prototypes for the UART |
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| 8 | * firmware library. |
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| 9 | ****************************************************************************** |
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| 10 | * @attention |
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| 11 | * |
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| 12 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
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| 13 | * |
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| 14 | * Redistribution and use in source and binary forms, with or without modification, |
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| 15 | * are permitted provided that the following conditions are met: |
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| 16 | * 1. Redistributions of source code must retain the above copyright notice, |
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| 17 | * this list of conditions and the following disclaimer. |
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| 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
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| 19 | * this list of conditions and the following disclaimer in the documentation |
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| 20 | * and/or other materials provided with the distribution. |
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| 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
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| 22 | * may be used to endorse or promote products derived from this software |
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| 23 | * without specific prior written permission. |
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| 24 | * |
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| 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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| 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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| 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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| 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
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| 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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| 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
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| 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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| 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
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| 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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| 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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| 35 | * |
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| 36 | ****************************************************************************** |
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| 37 | */ |
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| 38 | |||
| 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 40 | #ifndef __STM32L1xx_HAL_UART_H |
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| 41 | #define __STM32L1xx_HAL_UART_H |
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| 42 | |||
| 43 | #ifdef __cplusplus |
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| 44 | extern "C" { |
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| 45 | #endif |
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| 46 | |||
| 47 | /* Includes ------------------------------------------------------------------*/ |
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| 48 | #include "stm32l1xx_hal_def.h" |
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| 49 | |||
| 50 | /** @addtogroup STM32L1xx_HAL_Driver |
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| 51 | * @{ |
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| 52 | */ |
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| 53 | |||
| 54 | /** @addtogroup UART |
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| 55 | * @{ |
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| 56 | */ |
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| 57 | |||
| 58 | /* Exported types ------------------------------------------------------------*/ |
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| 59 | /** @defgroup UART_Exported_Types UART Exported Types |
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| 60 | * @{ |
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| 61 | */ |
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| 62 | |||
| 63 | |||
| 64 | /** |
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| 65 | * @brief UART Init Structure definition |
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| 66 | */ |
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| 67 | typedef struct |
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| 68 | { |
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| 69 | uint32_t BaudRate; /*!< This member configures the UART communication baud rate. |
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| 70 | The baud rate is computed using the following formula: |
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| 71 | - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate))) |
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| 72 | - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5 |
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| 73 | Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */ |
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| 74 | |||
| 75 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
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| 76 | This parameter can be a value of @ref UART_Word_Length */ |
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| 77 | |||
| 78 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
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| 79 | This parameter can be a value of @ref UART_Stop_Bits */ |
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| 80 | |||
| 81 | uint32_t Parity; /*!< Specifies the parity mode. |
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| 82 | This parameter can be a value of @ref UART_Parity |
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| 83 | @note When parity is enabled, the computed parity is inserted |
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| 84 | at the MSB position of the transmitted data (9th bit when |
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| 85 | the word length is set to 9 data bits; 8th bit when the |
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| 86 | word length is set to 8 data bits). */ |
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| 87 | |||
| 88 | uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled. |
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| 89 | This parameter can be a value of @ref UART_Mode */ |
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| 90 | |||
| 91 | uint32_t HwFlowCtl; /*!< Specifies wether the hardware flow control mode is enabled |
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| 92 | or disabled. |
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| 93 | This parameter can be a value of @ref UART_Hardware_Flow_Control */ |
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| 94 | |||
| 95 | uint32_t OverSampling; /*!< Specifies wether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8). |
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| 96 | This parameter can be a value of @ref UART_Over_Sampling */ |
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| 97 | }UART_InitTypeDef; |
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| 98 | |||
| 99 | /** |
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| 100 | * @brief HAL UART State structures definition |
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| 101 | */ |
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| 102 | typedef enum |
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| 103 | { |
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| 104 | HAL_UART_STATE_RESET = 0x00, /*!< Peripheral is not initialized */ |
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| 105 | HAL_UART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ |
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| 106 | HAL_UART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ |
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| 107 | HAL_UART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ |
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| 108 | HAL_UART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ |
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| 109 | HAL_UART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */ |
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| 110 | HAL_UART_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
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| 111 | HAL_UART_STATE_ERROR = 0x04 /*!< Error */ |
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| 112 | }HAL_UART_StateTypeDef; |
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| 113 | |||
| 114 | /** |
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| 115 | * @brief UART handle Structure definition |
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| 116 | */ |
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| 117 | typedef struct |
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| 118 | { |
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| 119 | USART_TypeDef *Instance; /*!< UART registers base address */ |
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| 120 | |||
| 121 | UART_InitTypeDef Init; /*!< UART communication parameters */ |
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| 122 | |||
| 123 | uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ |
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| 124 | |||
| 125 | uint16_t TxXferSize; /*!< UART Tx Transfer size */ |
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| 126 | |||
| 127 | uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ |
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| 128 | |||
| 129 | uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ |
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| 130 | |||
| 131 | uint16_t RxXferSize; /*!< UART Rx Transfer size */ |
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| 132 | |||
| 133 | uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ |
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| 134 | |||
| 135 | DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ |
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| 136 | |||
| 137 | DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ |
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| 138 | |||
| 139 | HAL_LockTypeDef Lock; /*!< Locking object */ |
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| 140 | |||
| 141 | __IO HAL_UART_StateTypeDef State; /*!< UART communication state */ |
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| 142 | |||
| 143 | __IO uint32_t ErrorCode; /*!< UART Error code */ |
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| 144 | |||
| 145 | }UART_HandleTypeDef; |
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| 146 | |||
| 147 | /** |
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| 148 | * @} |
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| 149 | */ |
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| 150 | |||
| 151 | /* Exported constants --------------------------------------------------------*/ |
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| 152 | /** @defgroup UART_Exported_Constants UART Exported constants |
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| 153 | * @{ |
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| 154 | */ |
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| 155 | |||
| 156 | /** @defgroup UART_Error_Codes UART Error Codes |
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| 157 | * @{ |
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| 158 | */ |
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| 159 | |||
| 160 | #define HAL_UART_ERROR_NONE ((uint32_t)0x00) /*!< No error */ |
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| 161 | #define HAL_UART_ERROR_PE ((uint32_t)0x01) /*!< Parity error */ |
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| 162 | #define HAL_UART_ERROR_NE ((uint32_t)0x02) /*!< Noise error */ |
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| 163 | #define HAL_UART_ERROR_FE ((uint32_t)0x04) /*!< frame error */ |
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| 164 | #define HAL_UART_ERROR_ORE ((uint32_t)0x08) /*!< Overrun error */ |
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| 165 | #define HAL_UART_ERROR_DMA ((uint32_t)0x10) /*!< DMA transfer error */ |
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| 166 | |||
| 167 | /** |
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| 168 | * @} |
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| 169 | */ |
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| 170 | |||
| 171 | /** @defgroup UART_Word_Length UART Word Length |
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| 172 | * @{ |
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| 173 | */ |
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| 174 | #define UART_WORDLENGTH_8B ((uint32_t)0x00000000) |
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| 175 | #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
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| 176 | /** |
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| 177 | * @} |
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| 178 | */ |
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| 179 | |||
| 180 | /** @defgroup UART_Stop_Bits UART Number of Stop Bits |
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| 181 | * @{ |
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| 182 | */ |
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| 183 | #define UART_STOPBITS_1 ((uint32_t)0x00000000) |
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| 184 | #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
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| 185 | /** |
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| 186 | * @} |
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| 187 | */ |
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| 188 | |||
| 189 | /** @defgroup UART_Parity UART Parity |
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| 190 | * @{ |
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| 191 | */ |
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| 192 | #define UART_PARITY_NONE ((uint32_t)0x00000000) |
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| 193 | #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
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| 194 | #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
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| 195 | /** |
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| 196 | * @} |
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| 197 | */ |
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| 198 | |||
| 199 | /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control |
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| 200 | * @{ |
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| 201 | */ |
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| 202 | #define UART_HWCONTROL_NONE ((uint32_t)0x00000000) |
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| 203 | #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) |
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| 204 | #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) |
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| 205 | #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) |
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| 206 | /** |
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| 207 | * @} |
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| 208 | */ |
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| 209 | |||
| 210 | /** @defgroup UART_Mode UART Transfer Mode |
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| 211 | * @{ |
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| 212 | */ |
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| 213 | #define UART_MODE_RX ((uint32_t)USART_CR1_RE) |
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| 214 | #define UART_MODE_TX ((uint32_t)USART_CR1_TE) |
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| 215 | #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) |
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| 216 | |||
| 217 | /** |
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| 218 | * @} |
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| 219 | */ |
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| 220 | |||
| 221 | /** @defgroup UART_State UART State |
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| 222 | * @{ |
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| 223 | */ |
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| 224 | #define UART_STATE_DISABLE ((uint32_t)0x00000000) |
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| 225 | #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) |
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| 226 | /** |
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| 227 | * @} |
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| 228 | */ |
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| 229 | |||
| 230 | /** @defgroup UART_Over_Sampling UART Over Sampling |
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| 231 | * @{ |
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| 232 | */ |
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| 233 | #define UART_OVERSAMPLING_16 ((uint32_t)0x00000000) |
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| 234 | #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) |
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| 235 | /** |
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| 236 | * @} |
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| 237 | */ |
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| 238 | |||
| 239 | /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length |
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| 240 | * @{ |
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| 241 | */ |
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| 242 | #define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000) |
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| 243 | #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) |
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| 244 | /** |
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| 245 | * @} |
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| 246 | */ |
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| 247 | |||
| 248 | /** @defgroup UART_WakeUp_functions UART Wakeup Functions |
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| 249 | * @{ |
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| 250 | */ |
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| 251 | #define UART_WAKEUPMETHOD_IDLELINE ((uint32_t)0x00000000) |
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| 252 | #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) |
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| 253 | /** |
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| 254 | * @} |
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| 255 | */ |
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| 256 | |||
| 257 | /** @defgroup UART_Flags UART FLags |
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| 258 | * Elements values convention: 0xXXXX |
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| 259 | * - 0xXXXX : Flag mask in the SR register |
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| 260 | * @{ |
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| 261 | */ |
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| 262 | #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS) |
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| 263 | #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD) |
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| 264 | #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE) |
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| 265 | #define UART_FLAG_TC ((uint32_t)USART_SR_TC) |
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| 266 | #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE) |
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| 267 | #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE) |
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| 268 | #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE) |
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| 269 | #define UART_FLAG_NE ((uint32_t)USART_SR_NE) |
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| 270 | #define UART_FLAG_FE ((uint32_t)USART_SR_FE) |
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| 271 | #define UART_FLAG_PE ((uint32_t)USART_SR_PE) |
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| 272 | /** |
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| 273 | * @} |
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| 274 | */ |
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| 275 | |||
| 276 | /** @defgroup UART_Interrupt_definition UART Interrupt Definitions |
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| 277 | * Elements values convention: 0xY000XXXX |
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| 278 | * - XXXX : Interrupt mask (16 bits) in the Y register |
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| 279 | * - Y : Interrupt source register (2bits) |
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| 280 | * - 0001: CR1 register |
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| 281 | * - 0010: CR2 register |
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| 282 | * - 0011: CR3 register |
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| 283 | * |
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| 284 | * @{ |
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| 285 | */ |
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| 286 | |||
| 287 | #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_PEIE)) |
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| 288 | #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_TXEIE)) |
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| 289 | #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_TCIE)) |
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| 290 | #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_RXNEIE)) |
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| 291 | #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_IDLEIE)) |
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| 292 | |||
| 293 | #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28 | USART_CR2_LBDIE)) |
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| 294 | |||
| 295 | #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28 | USART_CR3_CTSIE)) |
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| 296 | #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28 | USART_CR3_EIE)) |
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| 297 | |||
| 298 | /** |
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| 299 | * @} |
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| 300 | */ |
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| 301 | |||
| 302 | /** |
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| 303 | * @} |
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| 304 | */ |
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| 305 | |||
| 306 | |||
| 307 | /* Exported macro ------------------------------------------------------------*/ |
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| 308 | /** @defgroup UART_Exported_Macros UART Exported Macros |
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| 309 | * @{ |
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| 310 | */ |
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| 311 | |||
| 312 | |||
| 313 | /** @brief Reset UART handle state |
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| 314 | * @param __HANDLE__: specifies the UART Handle. |
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| 315 | * UART Handle selects the USARTx or UARTy peripheral |
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| 316 | * (USART,UART availability and x,y values depending on device). |
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| 317 | * @retval None |
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| 318 | */ |
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| 319 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_UART_STATE_RESET) |
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| 320 | |||
| 321 | /** @brief Flush the UART DR register |
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| 322 | * @param __HANDLE__: specifies the UART Handle. |
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| 323 | * UART Handle selects the USARTx or UARTy peripheral |
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| 324 | * (USART,UART availability and x,y values depending on device). |
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| 325 | */ |
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| 326 | #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR) |
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| 327 | |||
| 328 | /** @brief Check whether the specified UART flag is set or not. |
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| 329 | * @param __HANDLE__: specifies the UART Handle. |
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| 330 | * UART Handle selects the USARTx or UARTy peripheral |
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| 331 | * (USART,UART availability and x,y values depending on device). |
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| 332 | * @param __FLAG__: specifies the flag to check. |
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| 333 | * This parameter can be one of the following values: |
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| 334 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) |
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| 335 | * @arg UART_FLAG_LBD: LIN Break detection flag |
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| 336 | * @arg UART_FLAG_TXE: Transmit data register empty flag |
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| 337 | * @arg UART_FLAG_TC: Transmission Complete flag |
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| 338 | * @arg UART_FLAG_RXNE: Receive data register not empty flag |
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| 339 | * @arg UART_FLAG_IDLE: Idle Line detection flag |
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| 340 | * @arg UART_FLAG_ORE: OverRun Error flag |
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| 341 | * @arg UART_FLAG_NE: Noise Error flag |
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| 342 | * @arg UART_FLAG_FE: Framing Error flag |
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| 343 | * @arg UART_FLAG_PE: Parity Error flag |
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| 344 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
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| 345 | */ |
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| 346 | #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
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| 347 | |||
| 348 | /** @brief Clear the specified UART pending flag. |
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| 349 | * @param __HANDLE__: specifies the UART Handle. |
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| 350 | * UART Handle selects the USARTx or UARTy peripheral |
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| 351 | * (USART,UART availability and x,y values depending on device). |
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| 352 | * @param __FLAG__: specifies the flag to check. |
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| 353 | * This parameter can be any combination of the following values: |
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| 354 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). |
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| 355 | * @arg UART_FLAG_LBD: LIN Break detection flag. |
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| 356 | * @arg UART_FLAG_TC: Transmission Complete flag. |
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| 357 | * @arg UART_FLAG_RXNE: Receive data register not empty flag. |
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| 358 | * |
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| 359 | * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun |
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| 360 | * error) and IDLE (Idle line detected) flags are cleared by software |
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| 361 | * sequence: a read operation to USART_SR register followed by a read |
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| 362 | * operation to USART_DR register. |
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| 363 | * @note RXNE flag can be also cleared by a read to the USART_DR register. |
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| 364 | * @note TC flag can be also cleared by software sequence: a read operation to |
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| 365 | * USART_SR register followed by a write operation to USART_DR register. |
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| 366 | * @note TXE flag is cleared only by a write to the USART_DR register. |
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| 367 | * |
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| 368 | * @retval None |
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| 369 | */ |
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| 370 | #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) |
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| 371 | |||
| 372 | /** @brief Clear the UART PE pending flag. |
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| 373 | * @param __HANDLE__: specifies the UART Handle. |
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| 374 | * UART Handle selects the USARTx or UARTy peripheral |
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| 375 | * (USART,UART availability and x,y values depending on device). |
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| 376 | * @retval None |
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| 377 | */ |
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| 378 | #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \ |
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| 379 | do{ \ |
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| 380 | __IO uint32_t tmpreg; \ |
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| 381 | tmpreg = (__HANDLE__)->Instance->SR; \ |
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| 382 | tmpreg = (__HANDLE__)->Instance->DR; \ |
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| 383 | UNUSED(tmpreg); \ |
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| 384 | }while(0) |
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| 385 | |||
| 386 | |||
| 387 | |||
| 388 | /** @brief Clear the UART FE pending flag. |
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| 389 | * @param __HANDLE__: specifies the UART Handle. |
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| 390 | * UART Handle selects the USARTx or UARTy peripheral |
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| 391 | * (USART,UART availability and x,y values depending on device). |
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| 392 | * @retval None |
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| 393 | */ |
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| 394 | #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
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| 395 | |||
| 396 | /** @brief Clear the UART NE pending flag. |
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| 397 | * @param __HANDLE__: specifies the UART Handle. |
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| 398 | * UART Handle selects the USARTx or UARTy peripheral |
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| 399 | * (USART,UART availability and x,y values depending on device). |
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| 400 | * @retval None |
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| 401 | */ |
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| 402 | #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
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| 403 | |||
| 404 | /** @brief Clear the UART ORE pending flag. |
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| 405 | * @param __HANDLE__: specifies the UART Handle. |
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| 406 | * UART Handle selects the USARTx or UARTy peripheral |
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| 407 | * (USART,UART availability and x,y values depending on device). |
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| 408 | * @retval None |
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| 409 | */ |
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| 410 | #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
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| 411 | |||
| 412 | /** @brief Clear the UART IDLE pending flag. |
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| 413 | * @param __HANDLE__: specifies the UART Handle. |
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| 414 | * UART Handle selects the USARTx or UARTy peripheral |
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| 415 | * (USART,UART availability and x,y values depending on device). |
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| 416 | * @retval None |
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| 417 | */ |
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| 418 | #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
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| 419 | |||
| 420 | /** @brief Enable the specified UART interrupt. |
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| 421 | * @param __HANDLE__: specifies the UART Handle. |
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| 422 | * UART Handle selects the USARTx or UARTy peripheral |
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| 423 | * (USART,UART availability and x,y values depending on device). |
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| 424 | * @param __INTERRUPT__: specifies the UART interrupt source to enable. |
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| 425 | * This parameter can be one of the following values: |
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| 426 | * @arg UART_IT_CTS: CTS change interrupt |
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| 427 | * @arg UART_IT_LBD: LIN Break detection interrupt |
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| 428 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
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| 429 | * @arg UART_IT_TC: Transmission complete interrupt |
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| 430 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
| 431 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
| 432 | * @arg UART_IT_PE: Parity Error interrupt |
||
| 433 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
||
| 434 | * @retval None |
||
| 435 | */ |
||
| 436 | #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
||
| 437 | (((__INTERRUPT__) >> 28) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
||
| 438 | ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK))) |
||
| 439 | |||
| 440 | |||
| 441 | /** @brief Disable the specified UART interrupt. |
||
| 442 | * @param __HANDLE__: specifies the UART Handle. |
||
| 443 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 444 | * (USART,UART availability and x,y values depending on device). |
||
| 445 | * @param __INTERRUPT__: specifies the UART interrupt source to disable. |
||
| 446 | * This parameter can be one of the following values: |
||
| 447 | * @arg UART_IT_CTS: CTS change interrupt |
||
| 448 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
| 449 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
| 450 | * @arg UART_IT_TC: Transmission complete interrupt |
||
| 451 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
| 452 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
| 453 | * @arg UART_IT_PE: Parity Error interrupt |
||
| 454 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
||
| 455 | * @retval None |
||
| 456 | */ |
||
| 457 | #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
||
| 458 | (((__INTERRUPT__) >> 28) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
||
| 459 | ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK))) |
||
| 460 | |||
| 461 | /** @brief Check whether the specified UART interrupt has occurred or not. |
||
| 462 | * @param __HANDLE__: specifies the UART Handle. |
||
| 463 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 464 | * (USART,UART availability and x,y values depending on device). |
||
| 465 | * @param __IT__: specifies the UART interrupt source to check. |
||
| 466 | * This parameter can be one of the following values: |
||
| 467 | * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) |
||
| 468 | * @arg UART_IT_LBD: LIN Break detection interrupt |
||
| 469 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
||
| 470 | * @arg UART_IT_TC: Transmission complete interrupt |
||
| 471 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
||
| 472 | * @arg UART_IT_IDLE: Idle line detection interrupt |
||
| 473 | * @arg UART_IT_ERR: Error interrupt |
||
| 474 | * @retval The new state of __IT__ (TRUE or FALSE). |
||
| 475 | */ |
||
| 476 | #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28) == UART_CR2_REG_INDEX)? \ |
||
| 477 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK)) |
||
| 478 | |||
| 479 | /** @brief macros to enables or disables the UART's one bit sampling method |
||
| 480 | * @param __HANDLE__: specifies the UART Handle. |
||
| 481 | * This parameter can be USARTx with x: 1, 2 or 3, or UARTy with y:4 or 5 to select the USART or |
||
| 482 | * UART peripheral (availability depending on device for UARTy). |
||
| 483 | * @retval None |
||
| 484 | */ |
||
| 485 | #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
||
| 486 | #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT)) |
||
| 487 | |||
| 488 | /** @brief Enable CTS flow control |
||
| 489 | * This macro allows to enable CTS hardware flow control for a given UART instance, |
||
| 490 | * without need to call HAL_UART_Init() function. |
||
| 491 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 492 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
||
| 493 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 494 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 495 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
| 496 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
| 497 | * @param __HANDLE__: specifies the UART Handle. |
||
| 498 | * This parameter can be any USARTx (supporting the HW Flow control feature). |
||
| 499 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
| 500 | * @retval None |
||
| 501 | */ |
||
| 502 | #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ |
||
| 503 | do{ \ |
||
| 504 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
||
| 505 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ |
||
| 506 | } while(0) |
||
| 507 | |||
| 508 | /** @brief Disable CTS flow control |
||
| 509 | * This macro allows to disable CTS hardware flow control for a given UART instance, |
||
| 510 | * without need to call HAL_UART_Init() function. |
||
| 511 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 512 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
||
| 513 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 514 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 515 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
| 516 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
| 517 | * @param __HANDLE__: specifies the UART Handle. |
||
| 518 | * This parameter can be any USARTx (supporting the HW Flow control feature). |
||
| 519 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
| 520 | * @retval None |
||
| 521 | */ |
||
| 522 | #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ |
||
| 523 | do{ \ |
||
| 524 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
||
| 525 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ |
||
| 526 | } while(0) |
||
| 527 | |||
| 528 | /** @brief Enable RTS flow control |
||
| 529 | * This macro allows to enable RTS hardware flow control for a given UART instance, |
||
| 530 | * without need to call HAL_UART_Init() function. |
||
| 531 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 532 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
||
| 533 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 534 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 535 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
| 536 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
| 537 | * @param __HANDLE__: specifies the UART Handle. |
||
| 538 | * This parameter can be any USARTx (supporting the HW Flow control feature). |
||
| 539 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
| 540 | * @retval None |
||
| 541 | */ |
||
| 542 | #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ |
||
| 543 | do{ \ |
||
| 544 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ |
||
| 545 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ |
||
| 546 | } while(0) |
||
| 547 | |||
| 548 | /** @brief Disable RTS flow control |
||
| 549 | * This macro allows to disable RTS hardware flow control for a given UART instance, |
||
| 550 | * without need to call HAL_UART_Init() function. |
||
| 551 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
||
| 552 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
||
| 553 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
||
| 554 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
||
| 555 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
||
| 556 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
||
| 557 | * @param __HANDLE__: specifies the UART Handle. |
||
| 558 | * This parameter can be any USARTx (supporting the HW Flow control feature). |
||
| 559 | * It is used to select the USART peripheral (USART availability and x value depending on device). |
||
| 560 | * @retval None |
||
| 561 | */ |
||
| 562 | #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ |
||
| 563 | do{ \ |
||
| 564 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ |
||
| 565 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ |
||
| 566 | } while(0) |
||
| 567 | |||
| 568 | |||
| 569 | /** @brief Enable UART |
||
| 570 | * @param __HANDLE__: specifies the UART Handle. |
||
| 571 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 572 | * (USART,UART availability and x,y values depending on device). |
||
| 573 | * @retval None |
||
| 574 | */ |
||
| 575 | #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
||
| 576 | |||
| 577 | /** @brief Disable UART |
||
| 578 | * UART Handle selects the USARTx or UARTy peripheral |
||
| 579 | * (USART,UART availability and x,y values depending on device). |
||
| 580 | * @retval None |
||
| 581 | */ |
||
| 582 | #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
||
| 583 | |||
| 584 | /** |
||
| 585 | * @} |
||
| 586 | */ |
||
| 587 | |||
| 588 | |||
| 589 | /* Private macros --------------------------------------------------------*/ |
||
| 590 | /** @defgroup UART_Private_Macros UART Private Macros |
||
| 591 | * @{ |
||
| 592 | */ |
||
| 593 | |||
| 594 | #define UART_CR1_REG_INDEX 1 |
||
| 595 | #define UART_CR2_REG_INDEX 2 |
||
| 596 | #define UART_CR3_REG_INDEX 3 |
||
| 597 | |||
| 598 | #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25)/(4*(_BAUD_))) |
||
| 599 | #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100) |
||
| 600 | #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100) |
||
| 601 | /* UART BRR = mantissa + overflow + fraction |
||
| 602 | = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0F) */ |
||
| 603 | #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4) + \ |
||
| 604 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0)) + \ |
||
| 605 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0F)) |
||
| 606 | #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25)/(2*(_BAUD_))) |
||
| 607 | #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100) |
||
| 608 | #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100)) * 8 + 50) / 100) |
||
| 609 | /* UART BRR = mantissa + overflow + fraction |
||
| 610 | = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07) */ |
||
| 611 | #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4) + \ |
||
| 612 | ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8) << 1)) + \ |
||
| 613 | (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07)) |
||
| 614 | #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \ |
||
| 615 | ((LENGTH) == UART_WORDLENGTH_9B)) |
||
| 616 | #define IS_UART_LIN_WORD_LENGTH(LENGTH) ((LENGTH) == UART_WORDLENGTH_8B) |
||
| 617 | |||
| 618 | #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \ |
||
| 619 | ((STOPBITS) == UART_STOPBITS_2)) |
||
| 620 | |||
| 621 | #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \ |
||
| 622 | ((PARITY) == UART_PARITY_EVEN) || \ |
||
| 623 | ((PARITY) == UART_PARITY_ODD)) |
||
| 624 | |||
| 625 | #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ |
||
| 626 | (((CONTROL) == UART_HWCONTROL_NONE) || \ |
||
| 627 | ((CONTROL) == UART_HWCONTROL_RTS) || \ |
||
| 628 | ((CONTROL) == UART_HWCONTROL_CTS) || \ |
||
| 629 | ((CONTROL) == UART_HWCONTROL_RTS_CTS)) |
||
| 630 | |||
| 631 | #define IS_UART_MODE(MODE) ((((MODE) & (~((uint32_t)UART_MODE_TX_RX))) == 0x00) && \ |
||
| 632 | ((MODE) != (uint32_t)0x00000000)) |
||
| 633 | |||
| 634 | #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \ |
||
| 635 | ((STATE) == UART_STATE_ENABLE)) |
||
| 636 | |||
| 637 | #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \ |
||
| 638 | ((SAMPLING) == UART_OVERSAMPLING_8)) |
||
| 639 | #define IS_UART_LIN_OVERSAMPLING(SAMPLING) ((SAMPLING) == UART_OVERSAMPLING_16) |
||
| 640 | |||
| 641 | #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \ |
||
| 642 | ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B)) |
||
| 643 | |||
| 644 | #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \ |
||
| 645 | ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK)) |
||
| 646 | |||
| 647 | |||
| 648 | /** Check UART Baud rate |
||
| 649 | * __BAUDRATE__: Baudrate specified by the user |
||
| 650 | * The maximum Baud Rate is derived from the maximum clock on APB (i.e. 32 MHz) |
||
| 651 | * divided by the smallest oversampling used on the USART (i.e. 8) |
||
| 652 | * Return : TRUE or FALSE |
||
| 653 | */ |
||
| 654 | #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 4000001) |
||
| 655 | |||
| 656 | /** Check UART Node Address |
||
| 657 | * __ADDRESS__: UART Node address specified by the user |
||
| 658 | * UART Node address is used in Multi processor communication for wakeup |
||
| 659 | * with address mark detection. |
||
| 660 | * This parameter must be a number between Min_Data = 0 and Max_Data = 15 |
||
| 661 | * Return : TRUE or FALSE |
||
| 662 | */ |
||
| 663 | #define IS_UART_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xF) |
||
| 664 | |||
| 665 | /** UART interruptions flag mask |
||
| 666 | */ |
||
| 667 | #define UART_IT_MASK ((uint32_t) USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | \ |
||
| 668 | USART_CR1_IDLEIE | USART_CR2_LBDIE | USART_CR3_CTSIE | USART_CR3_EIE ) |
||
| 669 | |||
| 670 | /** |
||
| 671 | * @} |
||
| 672 | */ |
||
| 673 | |||
| 674 | /* Exported functions --------------------------------------------------------*/ |
||
| 675 | |||
| 676 | /** @addtogroup UART_Exported_Functions UART Exported Functions |
||
| 677 | * @{ |
||
| 678 | */ |
||
| 679 | |||
| 680 | /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions |
||
| 681 | * @{ |
||
| 682 | */ |
||
| 683 | |||
| 684 | /* Initialization and de-initialization functions ****************************/ |
||
| 685 | HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); |
||
| 686 | HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); |
||
| 687 | HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); |
||
| 688 | HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); |
||
| 689 | HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart); |
||
| 690 | void HAL_UART_MspInit(UART_HandleTypeDef *huart); |
||
| 691 | void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); |
||
| 692 | |||
| 693 | /** |
||
| 694 | * @} |
||
| 695 | */ |
||
| 696 | |||
| 697 | /** @addtogroup UART_Exported_Functions_Group2 IO operation functions |
||
| 698 | * @{ |
||
| 699 | */ |
||
| 700 | |||
| 701 | /* IO operation functions *****************************************************/ |
||
| 702 | HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
| 703 | HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
||
| 704 | HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 705 | HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 706 | HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 707 | HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
||
| 708 | HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); |
||
| 709 | HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); |
||
| 710 | HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); |
||
| 711 | void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); |
||
| 712 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); |
||
| 713 | void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); |
||
| 714 | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); |
||
| 715 | void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); |
||
| 716 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); |
||
| 717 | |||
| 718 | /** |
||
| 719 | * @} |
||
| 720 | */ |
||
| 721 | |||
| 722 | /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions |
||
| 723 | * @{ |
||
| 724 | */ |
||
| 725 | |||
| 726 | /* Peripheral Control functions ************************************************/ |
||
| 727 | HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); |
||
| 728 | HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); |
||
| 729 | HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart); |
||
| 730 | HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); |
||
| 731 | HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); |
||
| 732 | |||
| 733 | /** |
||
| 734 | * @} |
||
| 735 | */ |
||
| 736 | |||
| 737 | /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Errors functions |
||
| 738 | * @{ |
||
| 739 | */ |
||
| 740 | |||
| 741 | /* Peripheral State and Errors functions **************************************************/ |
||
| 742 | HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); |
||
| 743 | uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); |
||
| 744 | |||
| 745 | /** |
||
| 746 | * @} |
||
| 747 | */ |
||
| 748 | |||
| 749 | /** |
||
| 750 | * @} |
||
| 751 | */ |
||
| 752 | |||
| 753 | /** |
||
| 754 | * @} |
||
| 755 | */ |
||
| 756 | |||
| 757 | /** |
||
| 758 | * @} |
||
| 759 | */ |
||
| 760 | |||
| 761 | #ifdef __cplusplus |
||
| 762 | } |
||
| 763 | #endif |
||
| 764 | |||
| 765 | #endif /* __STM32L1xx_HAL_UART_H */ |
||
| 766 | |||
| 767 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |