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| Rev | Author | Line No. | Line |
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| 56 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
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| 3 | * @file stm32l1xx_hal_iwdg.h |
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| 4 | * @author MCD Application Team |
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| 5 | * @brief Header file of IWDG HAL module. |
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| 6 | ****************************************************************************** |
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| 7 | * @attention |
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| 8 | * |
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| 9 | * <h2><center>© Copyright (c) 2016 STMicroelectronics. |
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| 10 | * All rights reserved.</center></h2> |
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| 11 | * |
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| 12 | * This software component is licensed by ST under BSD 3-Clause license, |
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| 13 | * the "License"; You may not use this file except in compliance with the |
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| 14 | * License. You may obtain a copy of the License at: |
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| 15 | * opensource.org/licenses/BSD-3-Clause |
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| 16 | * |
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| 17 | ****************************************************************************** |
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| 18 | */ |
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| 19 | |||
| 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
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| 21 | #ifndef STM32L1xx_HAL_IWDG_H |
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| 22 | #define STM32L1xx_HAL_IWDG_H |
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| 23 | |||
| 24 | #ifdef __cplusplus |
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| 25 | extern "C" { |
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| 26 | #endif |
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| 27 | |||
| 28 | /* Includes ------------------------------------------------------------------*/ |
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| 29 | #include "stm32l1xx_hal_def.h" |
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| 30 | |||
| 31 | /** @addtogroup STM32L1xx_HAL_Driver |
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| 32 | * @{ |
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| 33 | */ |
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| 34 | |||
| 35 | /** @defgroup IWDG IWDG |
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| 36 | * @{ |
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| 37 | */ |
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| 38 | |||
| 39 | /* Exported types ------------------------------------------------------------*/ |
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| 40 | /** @defgroup IWDG_Exported_Types IWDG Exported Types |
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| 41 | * @{ |
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| 42 | */ |
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| 43 | |||
| 44 | /** |
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| 45 | * @brief IWDG Init structure definition |
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| 46 | */ |
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| 47 | typedef struct |
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| 48 | { |
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| 49 | uint32_t Prescaler; /*!< Select the prescaler of the IWDG. |
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| 50 | This parameter can be a value of @ref IWDG_Prescaler */ |
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| 51 | |||
| 52 | uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. |
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| 53 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ |
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| 54 | |||
| 55 | } IWDG_InitTypeDef; |
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| 56 | |||
| 57 | /** |
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| 58 | * @brief IWDG Handle Structure definition |
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| 59 | */ |
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| 60 | typedef struct |
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| 61 | { |
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| 62 | IWDG_TypeDef *Instance; /*!< Register base address */ |
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| 63 | |||
| 64 | IWDG_InitTypeDef Init; /*!< IWDG required parameters */ |
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| 65 | } IWDG_HandleTypeDef; |
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| 66 | |||
| 67 | |||
| 68 | /** |
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| 69 | * @} |
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| 70 | */ |
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| 71 | |||
| 72 | /* Exported constants --------------------------------------------------------*/ |
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| 73 | /** @defgroup IWDG_Exported_Constants IWDG Exported Constants |
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| 74 | * @{ |
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| 75 | */ |
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| 76 | |||
| 77 | /** @defgroup IWDG_Prescaler IWDG Prescaler |
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| 78 | * @{ |
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| 79 | */ |
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| 80 | #define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */ |
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| 81 | #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ |
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| 82 | #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ |
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| 83 | #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ |
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| 84 | #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ |
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| 85 | #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ |
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| 86 | #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ |
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| 87 | /** |
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| 88 | * @} |
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| 89 | */ |
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| 90 | |||
| 91 | /** |
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| 92 | * @} |
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| 93 | */ |
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| 94 | |||
| 95 | /* Exported macros -----------------------------------------------------------*/ |
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| 96 | /** @defgroup IWDG_Exported_Macros IWDG Exported Macros |
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| 97 | * @{ |
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| 98 | */ |
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| 99 | |||
| 100 | /** |
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| 101 | * @brief Enable the IWDG peripheral. |
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| 102 | * @param __HANDLE__ IWDG handle |
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| 103 | * @retval None |
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| 104 | */ |
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| 105 | #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) |
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| 106 | |||
| 107 | /** |
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| 108 | * @brief Reload IWDG counter with value defined in the reload register |
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| 61 | mjames | 109 | * (write access to IWDG_PR and IWDG_RLR registers disabled). |
| 56 | mjames | 110 | * @param __HANDLE__ IWDG handle |
| 111 | * @retval None |
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| 112 | */ |
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| 113 | #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) |
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| 114 | |||
| 115 | /** |
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| 116 | * @} |
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| 117 | */ |
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| 118 | |||
| 119 | /* Exported functions --------------------------------------------------------*/ |
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| 120 | /** @defgroup IWDG_Exported_Functions IWDG Exported Functions |
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| 121 | * @{ |
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| 122 | */ |
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| 123 | |||
| 124 | /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions |
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| 125 | * @{ |
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| 126 | */ |
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| 127 | /* Initialization/Start functions ********************************************/ |
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| 61 | mjames | 128 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); |
| 56 | mjames | 129 | /** |
| 130 | * @} |
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| 131 | */ |
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| 132 | |||
| 133 | /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions |
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| 134 | * @{ |
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| 135 | */ |
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| 136 | /* I/O operation functions ****************************************************/ |
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| 61 | mjames | 137 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); |
| 56 | mjames | 138 | /** |
| 139 | * @} |
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| 140 | */ |
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| 141 | |||
| 142 | /** |
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| 143 | * @} |
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| 144 | */ |
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| 145 | |||
| 146 | /* Private constants ---------------------------------------------------------*/ |
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| 147 | /** @defgroup IWDG_Private_Constants IWDG Private Constants |
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| 148 | * @{ |
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| 149 | */ |
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| 150 | |||
| 151 | /** |
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| 152 | * @brief IWDG Key Register BitMask |
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| 153 | */ |
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| 154 | #define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */ |
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| 155 | #define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */ |
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| 156 | #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */ |
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| 157 | #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */ |
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| 158 | |||
| 159 | /** |
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| 160 | * @} |
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| 161 | */ |
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| 162 | |||
| 163 | /* Private macros ------------------------------------------------------------*/ |
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| 164 | /** @defgroup IWDG_Private_Macros IWDG Private Macros |
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| 165 | * @{ |
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| 166 | */ |
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| 167 | |||
| 168 | /** |
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| 61 | mjames | 169 | * @brief Enable write access to IWDG_PR and IWDG_RLR registers. |
| 56 | mjames | 170 | * @param __HANDLE__ IWDG handle |
| 171 | * @retval None |
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| 172 | */ |
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| 173 | #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) |
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| 174 | |||
| 175 | /** |
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| 61 | mjames | 176 | * @brief Disable write access to IWDG_PR and IWDG_RLR registers. |
| 56 | mjames | 177 | * @param __HANDLE__ IWDG handle |
| 178 | * @retval None |
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| 179 | */ |
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| 180 | #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) |
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| 181 | |||
| 182 | /** |
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| 183 | * @brief Check IWDG prescaler value. |
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| 184 | * @param __PRESCALER__ IWDG prescaler value |
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| 185 | * @retval None |
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| 186 | */ |
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| 187 | #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ |
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| 188 | ((__PRESCALER__) == IWDG_PRESCALER_8) || \ |
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| 189 | ((__PRESCALER__) == IWDG_PRESCALER_16) || \ |
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| 190 | ((__PRESCALER__) == IWDG_PRESCALER_32) || \ |
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| 191 | ((__PRESCALER__) == IWDG_PRESCALER_64) || \ |
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| 192 | ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ |
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| 193 | ((__PRESCALER__) == IWDG_PRESCALER_256)) |
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| 194 | |||
| 195 | /** |
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| 196 | * @brief Check IWDG reload value. |
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| 197 | * @param __RELOAD__ IWDG reload value |
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| 198 | * @retval None |
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| 199 | */ |
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| 200 | #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) |
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| 201 | |||
| 202 | |||
| 203 | |||
| 204 | /** |
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| 205 | * @} |
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| 206 | */ |
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| 207 | |||
| 208 | /** |
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| 209 | * @} |
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| 210 | */ |
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| 211 | |||
| 212 | /** |
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| 213 | * @} |
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| 214 | */ |
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| 215 | |||
| 216 | |||
| 217 | #ifdef __cplusplus |
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| 218 | } |
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| 219 | #endif |
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| 220 | |||
| 221 | #endif /* STM32L1xx_HAL_IWDG_H */ |
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| 222 | |||
| 223 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |