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2 | mjames | 1 | /* ---------------------------------------------------------------------------- |
2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. |
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3 | * |
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4 | * $Date: 19. March 2015 |
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5 | * $Revision: V.1.4.5 |
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6 | * |
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7 | * Project: CMSIS DSP Library |
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8 | * Title: arm_q31_to_q15.c |
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9 | * |
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10 | * Description: Converts the elements of the Q31 vector to Q15 vector. |
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11 | * |
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12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
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13 | * |
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14 | * Redistribution and use in source and binary forms, with or without |
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15 | * modification, are permitted provided that the following conditions |
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16 | * are met: |
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17 | * - Redistributions of source code must retain the above copyright |
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18 | * notice, this list of conditions and the following disclaimer. |
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19 | * - Redistributions in binary form must reproduce the above copyright |
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20 | * notice, this list of conditions and the following disclaimer in |
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21 | * the documentation and/or other materials provided with the |
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22 | * distribution. |
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23 | * - Neither the name of ARM LIMITED nor the names of its contributors |
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24 | * may be used to endorse or promote products derived from this |
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25 | * software without specific prior written permission. |
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26 | * |
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27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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38 | * POSSIBILITY OF SUCH DAMAGE. |
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39 | * ---------------------------------------------------------------------------- */ |
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40 | |||
41 | #include "arm_math.h" |
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42 | |||
43 | /** |
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44 | * @ingroup groupSupport |
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45 | */ |
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46 | |||
47 | /** |
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48 | * @addtogroup q31_to_x |
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49 | * @{ |
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50 | */ |
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51 | |||
52 | /** |
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53 | * @brief Converts the elements of the Q31 vector to Q15 vector. |
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54 | * @param[in] *pSrc points to the Q31 input vector |
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55 | * @param[out] *pDst points to the Q15 output vector |
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56 | * @param[in] blockSize length of the input vector |
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57 | * @return none. |
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58 | * |
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59 | * \par Description: |
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60 | * |
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61 | * The equation used for the conversion process is: |
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62 | * |
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63 | * <pre> |
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64 | * pDst[n] = (q15_t) pSrc[n] >> 16; 0 <= n < blockSize. |
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65 | * </pre> |
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66 | * |
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67 | */ |
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68 | |||
69 | |||
70 | void arm_q31_to_q15( |
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71 | q31_t * pSrc, |
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72 | q15_t * pDst, |
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73 | uint32_t blockSize) |
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74 | { |
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75 | q31_t *pIn = pSrc; /* Src pointer */ |
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76 | uint32_t blkCnt; /* loop counter */ |
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77 | |||
78 | #ifndef ARM_MATH_CM0_FAMILY |
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79 | |||
80 | /* Run the below code for Cortex-M4 and Cortex-M3 */ |
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81 | q31_t in1, in2, in3, in4; |
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82 | q31_t out1, out2; |
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83 | |||
84 | /*loop Unrolling */ |
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85 | blkCnt = blockSize >> 2u; |
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86 | |||
87 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. |
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88 | ** a second loop below computes the remaining 1 to 3 samples. */ |
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89 | while(blkCnt > 0u) |
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90 | { |
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91 | /* C = (q15_t) A >> 16 */ |
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92 | /* convert from q31 to q15 and then store the results in the destination buffer */ |
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93 | in1 = *pIn++; |
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94 | in2 = *pIn++; |
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95 | in3 = *pIn++; |
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96 | in4 = *pIn++; |
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97 | |||
98 | /* pack two higher 16-bit values from two 32-bit values */ |
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99 | #ifndef ARM_MATH_BIG_ENDIAN |
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100 | |||
101 | out1 = __PKHTB(in2, in1, 16); |
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102 | out2 = __PKHTB(in4, in3, 16); |
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103 | |||
104 | #else |
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105 | |||
106 | out1 = __PKHTB(in1, in2, 16); |
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107 | out2 = __PKHTB(in3, in4, 16); |
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108 | |||
109 | #endif // #ifdef ARM_MATH_BIG_ENDIAN |
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110 | |||
111 | *__SIMD32(pDst)++ = out1; |
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112 | *__SIMD32(pDst)++ = out2; |
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113 | |||
114 | /* Decrement the loop counter */ |
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115 | blkCnt--; |
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116 | } |
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117 | |||
118 | /* If the blockSize is not a multiple of 4, compute any remaining output samples here. |
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119 | ** No loop unrolling is used. */ |
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120 | blkCnt = blockSize % 0x4u; |
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121 | |||
122 | #else |
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123 | |||
124 | /* Run the below code for Cortex-M0 */ |
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125 | |||
126 | /* Loop over blockSize number of values */ |
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127 | blkCnt = blockSize; |
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128 | |||
129 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
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130 | |||
131 | while(blkCnt > 0u) |
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132 | { |
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133 | /* C = (q15_t) A >> 16 */ |
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134 | /* convert from q31 to q15 and then store the results in the destination buffer */ |
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135 | *pDst++ = (q15_t) (*pIn++ >> 16); |
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136 | |||
137 | /* Decrement the loop counter */ |
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138 | blkCnt--; |
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139 | } |
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140 | |||
141 | } |
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142 | |||
143 | /** |
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144 | * @} end of q31_to_x group |
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145 | */ |