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| 2 | mjames | 1 | /* ---------------------------------------------------------------------- |
| 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. |
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| 3 | * |
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| 4 | * $Date: 19. March 2015 |
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| 5 | * $Revision: V.1.4.5 |
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| 6 | * |
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| 7 | * Project: CMSIS DSP Library |
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| 8 | * Title: arm_mat_trans_q31.c |
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| 9 | * |
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| 10 | * Description: Q31 matrix transpose. |
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| 11 | * |
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| 12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
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| 13 | * |
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| 14 | * Redistribution and use in source and binary forms, with or without |
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| 15 | * modification, are permitted provided that the following conditions |
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| 16 | * are met: |
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| 17 | * - Redistributions of source code must retain the above copyright |
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| 18 | * notice, this list of conditions and the following disclaimer. |
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| 19 | * - Redistributions in binary form must reproduce the above copyright |
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| 20 | * notice, this list of conditions and the following disclaimer in |
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| 21 | * the documentation and/or other materials provided with the |
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| 22 | * distribution. |
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| 23 | * - Neither the name of ARM LIMITED nor the names of its contributors |
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| 24 | * may be used to endorse or promote products derived from this |
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| 25 | * software without specific prior written permission. |
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| 26 | * |
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| 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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| 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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| 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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| 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
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| 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
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| 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
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| 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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| 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
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| 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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| 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
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| 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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| 38 | * POSSIBILITY OF SUCH DAMAGE. |
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| 39 | * -------------------------------------------------------------------- */ |
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| 40 | |||
| 41 | #include "arm_math.h" |
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| 42 | |||
| 43 | /** |
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| 44 | * @ingroup groupMatrix |
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| 45 | */ |
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| 46 | |||
| 47 | /** |
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| 48 | * @addtogroup MatrixTrans |
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| 49 | * @{ |
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| 50 | */ |
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| 51 | |||
| 52 | /* |
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| 53 | * @brief Q31 matrix transpose. |
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| 54 | * @param[in] *pSrc points to the input matrix |
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| 55 | * @param[out] *pDst points to the output matrix |
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| 56 | * @return The function returns either <code>ARM_MATH_SIZE_MISMATCH</code> |
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| 57 | * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking. |
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| 58 | */ |
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| 59 | |||
| 60 | arm_status arm_mat_trans_q31( |
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| 61 | const arm_matrix_instance_q31 * pSrc, |
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| 62 | arm_matrix_instance_q31 * pDst) |
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| 63 | { |
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| 64 | q31_t *pIn = pSrc->pData; /* input data matrix pointer */ |
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| 65 | q31_t *pOut = pDst->pData; /* output data matrix pointer */ |
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| 66 | q31_t *px; /* Temporary output data matrix pointer */ |
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| 67 | uint16_t nRows = pSrc->numRows; /* number of nRows */ |
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| 68 | uint16_t nColumns = pSrc->numCols; /* number of nColumns */ |
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| 69 | |||
| 70 | #ifndef ARM_MATH_CM0_FAMILY |
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| 71 | |||
| 72 | /* Run the below code for Cortex-M4 and Cortex-M3 */ |
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| 73 | |||
| 74 | uint16_t blkCnt, i = 0u, row = nRows; /* loop counters */ |
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| 75 | arm_status status; /* status of matrix transpose */ |
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| 76 | |||
| 77 | |||
| 78 | #ifdef ARM_MATH_MATRIX_CHECK |
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| 79 | |||
| 80 | |||
| 81 | /* Check for matrix mismatch condition */ |
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| 82 | if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) |
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| 83 | { |
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| 84 | /* Set status as ARM_MATH_SIZE_MISMATCH */ |
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| 85 | status = ARM_MATH_SIZE_MISMATCH; |
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| 86 | } |
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| 87 | else |
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| 88 | #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ |
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| 89 | |||
| 90 | { |
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| 91 | /* Matrix transpose by exchanging the rows with columns */ |
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| 92 | /* row loop */ |
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| 93 | do |
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| 94 | { |
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| 95 | /* Apply loop unrolling and exchange the columns with row elements */ |
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| 96 | blkCnt = nColumns >> 2u; |
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| 97 | |||
| 98 | /* The pointer px is set to starting address of the column being processed */ |
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| 99 | px = pOut + i; |
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| 100 | |||
| 101 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. |
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| 102 | ** a second loop below computes the remaining 1 to 3 samples. */ |
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| 103 | while(blkCnt > 0u) |
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| 104 | { |
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| 105 | /* Read and store the input element in the destination */ |
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| 106 | *px = *pIn++; |
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| 107 | |||
| 108 | /* Update the pointer px to point to the next row of the transposed matrix */ |
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| 109 | px += nRows; |
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| 110 | |||
| 111 | /* Read and store the input element in the destination */ |
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| 112 | *px = *pIn++; |
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| 113 | |||
| 114 | /* Update the pointer px to point to the next row of the transposed matrix */ |
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| 115 | px += nRows; |
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| 116 | |||
| 117 | /* Read and store the input element in the destination */ |
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| 118 | *px = *pIn++; |
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| 119 | |||
| 120 | /* Update the pointer px to point to the next row of the transposed matrix */ |
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| 121 | px += nRows; |
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| 122 | |||
| 123 | /* Read and store the input element in the destination */ |
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| 124 | *px = *pIn++; |
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| 125 | |||
| 126 | /* Update the pointer px to point to the next row of the transposed matrix */ |
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| 127 | px += nRows; |
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| 128 | |||
| 129 | /* Decrement the column loop counter */ |
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| 130 | blkCnt--; |
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| 131 | } |
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| 132 | |||
| 133 | /* Perform matrix transpose for last 3 samples here. */ |
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| 134 | blkCnt = nColumns % 0x4u; |
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| 135 | |||
| 136 | while(blkCnt > 0u) |
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| 137 | { |
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| 138 | /* Read and store the input element in the destination */ |
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| 139 | *px = *pIn++; |
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| 140 | |||
| 141 | /* Update the pointer px to point to the next row of the transposed matrix */ |
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| 142 | px += nRows; |
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| 143 | |||
| 144 | /* Decrement the column loop counter */ |
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| 145 | blkCnt--; |
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| 146 | } |
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| 147 | |||
| 148 | #else |
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| 149 | |||
| 150 | /* Run the below code for Cortex-M0 */ |
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| 151 | |||
| 152 | uint16_t col, i = 0u, row = nRows; /* loop counters */ |
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| 153 | arm_status status; /* status of matrix transpose */ |
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| 154 | |||
| 155 | |||
| 156 | #ifdef ARM_MATH_MATRIX_CHECK |
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| 157 | |||
| 158 | /* Check for matrix mismatch condition */ |
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| 159 | if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) |
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| 160 | { |
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| 161 | /* Set status as ARM_MATH_SIZE_MISMATCH */ |
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| 162 | status = ARM_MATH_SIZE_MISMATCH; |
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| 163 | } |
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| 164 | else |
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| 165 | #endif /* #ifdef ARM_MATH_MATRIX_CHECK */ |
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| 166 | |||
| 167 | { |
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| 168 | /* Matrix transpose by exchanging the rows with columns */ |
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| 169 | /* row loop */ |
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| 170 | do |
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| 171 | { |
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| 172 | /* The pointer px is set to starting address of the column being processed */ |
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| 173 | px = pOut + i; |
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| 174 | |||
| 175 | /* Initialize column loop counter */ |
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| 176 | col = nColumns; |
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| 177 | |||
| 178 | while(col > 0u) |
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| 179 | { |
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| 180 | /* Read and store the input element in the destination */ |
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| 181 | *px = *pIn++; |
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| 182 | |||
| 183 | /* Update the pointer px to point to the next row of the transposed matrix */ |
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| 184 | px += nRows; |
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| 185 | |||
| 186 | /* Decrement the column loop counter */ |
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| 187 | col--; |
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| 188 | } |
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| 189 | |||
| 190 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
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| 191 | |||
| 192 | i++; |
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| 193 | |||
| 194 | /* Decrement the row loop counter */ |
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| 195 | row--; |
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| 196 | |||
| 197 | } |
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| 198 | while(row > 0u); /* row loop end */ |
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| 199 | |||
| 200 | /* set status as ARM_MATH_SUCCESS */ |
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| 201 | status = ARM_MATH_SUCCESS; |
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| 202 | } |
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| 203 | |||
| 204 | /* Return to application */ |
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| 205 | return (status); |
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| 206 | } |
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| 207 | |||
| 208 | /** |
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| 209 | * @} end of MatrixTrans group |
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| 210 | */ |