Rev 33 | Go to most recent revision | Details | Compare with Previous | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 30 | mjames | 1 | /** |
| 2 | ****************************************************************************** |
||
| 3 | * @file stm32l1xx_it.c |
||
| 4 | * @brief Interrupt Service Routines. |
||
| 5 | ****************************************************************************** |
||
| 6 | * |
||
| 7 | * COPYRIGHT(c) 2017 STMicroelectronics |
||
| 8 | * |
||
| 9 | * Redistribution and use in source and binary forms, with or without modification, |
||
| 10 | * are permitted provided that the following conditions are met: |
||
| 11 | * 1. Redistributions of source code must retain the above copyright notice, |
||
| 12 | * this list of conditions and the following disclaimer. |
||
| 13 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
||
| 14 | * this list of conditions and the following disclaimer in the documentation |
||
| 15 | * and/or other materials provided with the distribution. |
||
| 16 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
||
| 17 | * may be used to endorse or promote products derived from this software |
||
| 18 | * without specific prior written permission. |
||
| 19 | * |
||
| 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||
| 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||
| 22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||
| 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||
| 24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||
| 25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||
| 26 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||
| 27 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||
| 28 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||
| 29 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||
| 30 | * |
||
| 31 | ****************************************************************************** |
||
| 32 | */ |
||
| 33 | /* Includes ------------------------------------------------------------------*/ |
||
| 34 | #include "stm32l1xx_hal.h" |
||
| 35 | #include "stm32l1xx.h" |
||
| 36 | #include "stm32l1xx_it.h" |
||
| 37 | |||
| 38 | /* USER CODE BEGIN 0 */ |
||
| 39 | |||
| 40 | /* USER CODE END 0 */ |
||
| 41 | |||
| 42 | /* External variables --------------------------------------------------------*/ |
||
| 43 | |||
| 44 | /******************************************************************************/ |
||
| 45 | /* Cortex-M3 Processor Interruption and Exception Handlers */ |
||
| 46 | /******************************************************************************/ |
||
| 47 | |||
| 48 | /** |
||
| 49 | * @brief This function handles Non maskable interrupt. |
||
| 50 | */ |
||
| 51 | void NMI_Handler(void) |
||
| 52 | { |
||
| 53 | /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ |
||
| 54 | |||
| 55 | /* USER CODE END NonMaskableInt_IRQn 0 */ |
||
| 56 | /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ |
||
| 57 | |||
| 58 | /* USER CODE END NonMaskableInt_IRQn 1 */ |
||
| 59 | } |
||
| 60 | |||
| 61 | /** |
||
| 62 | * @brief This function handles Hard fault interrupt. |
||
| 63 | */ |
||
| 64 | void HardFault_Handler(void) |
||
| 65 | { |
||
| 66 | /* USER CODE BEGIN HardFault_IRQn 0 */ |
||
| 67 | |||
| 68 | /* USER CODE END HardFault_IRQn 0 */ |
||
| 69 | while (1) |
||
| 70 | { |
||
| 71 | } |
||
| 72 | /* USER CODE BEGIN HardFault_IRQn 1 */ |
||
| 73 | |||
| 74 | /* USER CODE END HardFault_IRQn 1 */ |
||
| 75 | } |
||
| 76 | |||
| 77 | /** |
||
| 78 | * @brief This function handles Memory management fault. |
||
| 79 | */ |
||
| 80 | void MemManage_Handler(void) |
||
| 81 | { |
||
| 82 | /* USER CODE BEGIN MemoryManagement_IRQn 0 */ |
||
| 83 | |||
| 84 | /* USER CODE END MemoryManagement_IRQn 0 */ |
||
| 85 | while (1) |
||
| 86 | { |
||
| 87 | } |
||
| 88 | /* USER CODE BEGIN MemoryManagement_IRQn 1 */ |
||
| 89 | |||
| 90 | /* USER CODE END MemoryManagement_IRQn 1 */ |
||
| 91 | } |
||
| 92 | |||
| 93 | /** |
||
| 94 | * @brief This function handles Pre-fetch fault, memory access fault. |
||
| 95 | */ |
||
| 96 | void BusFault_Handler(void) |
||
| 97 | { |
||
| 98 | /* USER CODE BEGIN BusFault_IRQn 0 */ |
||
| 99 | |||
| 100 | /* USER CODE END BusFault_IRQn 0 */ |
||
| 101 | while (1) |
||
| 102 | { |
||
| 103 | } |
||
| 104 | /* USER CODE BEGIN BusFault_IRQn 1 */ |
||
| 105 | |||
| 106 | /* USER CODE END BusFault_IRQn 1 */ |
||
| 107 | } |
||
| 108 | |||
| 109 | /** |
||
| 110 | * @brief This function handles Undefined instruction or illegal state. |
||
| 111 | */ |
||
| 112 | void UsageFault_Handler(void) |
||
| 113 | { |
||
| 114 | /* USER CODE BEGIN UsageFault_IRQn 0 */ |
||
| 115 | |||
| 116 | /* USER CODE END UsageFault_IRQn 0 */ |
||
| 117 | while (1) |
||
| 118 | { |
||
| 119 | } |
||
| 120 | /* USER CODE BEGIN UsageFault_IRQn 1 */ |
||
| 121 | |||
| 122 | /* USER CODE END UsageFault_IRQn 1 */ |
||
| 123 | } |
||
| 124 | |||
| 125 | /** |
||
| 126 | * @brief This function handles System service call via SWI instruction. |
||
| 127 | */ |
||
| 128 | void SVC_Handler(void) |
||
| 129 | { |
||
| 130 | /* USER CODE BEGIN SVC_IRQn 0 */ |
||
| 131 | |||
| 132 | /* USER CODE END SVC_IRQn 0 */ |
||
| 133 | /* USER CODE BEGIN SVC_IRQn 1 */ |
||
| 134 | |||
| 135 | /* USER CODE END SVC_IRQn 1 */ |
||
| 136 | } |
||
| 137 | |||
| 138 | /** |
||
| 139 | * @brief This function handles Debug monitor. |
||
| 140 | */ |
||
| 141 | void DebugMon_Handler(void) |
||
| 142 | { |
||
| 143 | /* USER CODE BEGIN DebugMonitor_IRQn 0 */ |
||
| 144 | |||
| 145 | /* USER CODE END DebugMonitor_IRQn 0 */ |
||
| 146 | /* USER CODE BEGIN DebugMonitor_IRQn 1 */ |
||
| 147 | |||
| 148 | /* USER CODE END DebugMonitor_IRQn 1 */ |
||
| 149 | } |
||
| 150 | |||
| 151 | /** |
||
| 152 | * @brief This function handles Pendable request for system service. |
||
| 153 | */ |
||
| 154 | void PendSV_Handler(void) |
||
| 155 | { |
||
| 156 | /* USER CODE BEGIN PendSV_IRQn 0 */ |
||
| 157 | |||
| 158 | /* USER CODE END PendSV_IRQn 0 */ |
||
| 159 | /* USER CODE BEGIN PendSV_IRQn 1 */ |
||
| 160 | |||
| 161 | /* USER CODE END PendSV_IRQn 1 */ |
||
| 162 | } |
||
| 163 | |||
| 164 | /** |
||
| 165 | * @brief This function handles System tick timer. |
||
| 166 | */ |
||
| 167 | void SysTick_Handler(void) |
||
| 168 | { |
||
| 169 | /* USER CODE BEGIN SysTick_IRQn 0 */ |
||
| 170 | |||
| 171 | /* USER CODE END SysTick_IRQn 0 */ |
||
| 172 | HAL_IncTick(); |
||
| 173 | HAL_SYSTICK_IRQHandler(); |
||
| 174 | /* USER CODE BEGIN SysTick_IRQn 1 */ |
||
| 175 | |||
| 176 | /* USER CODE END SysTick_IRQn 1 */ |
||
| 177 | } |
||
| 178 | |||
| 179 | /******************************************************************************/ |
||
| 180 | /* STM32L1xx Peripheral Interrupt Handlers */ |
||
| 181 | /* Add here the Interrupt Handlers for the used peripherals. */ |
||
| 182 | /* For the available peripheral interrupt handler names, */ |
||
| 183 | /* please refer to the startup file (startup_stm32l1xx.s). */ |
||
| 184 | /******************************************************************************/ |
||
| 185 | |||
| 186 | /* USER CODE BEGIN 1 */ |
||
| 187 | |||
| 188 | /* USER CODE END 1 */ |
||
| 189 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |