Subversion Repositories DashDisplay

Rev

Details | Last modification | View Log | RSS feed

Rev Author Line No. Line
30 mjames 1 
/**
2 
  ******************************************************************************
3 
  * @file    stm32l1xx_hal_tim_ex.h
4 
  * @author  MCD Application Team
5 
  * @version V1.2.0
6 
  * @date    01-July-2016
7 
  * @brief   Header file of TIM HAL Extension module.
8 
  ******************************************************************************
9 
  * @attention
10 
  *
11 
  * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
12 
  *
13 
  * Redistribution and use in source and binary forms, with or without modification,
14 
  * are permitted provided that the following conditions are met:
15 
  *   1. Redistributions of source code must retain the above copyright notice,
16 
  *      this list of conditions and the following disclaimer.
17 
  *   2. Redistributions in binary form must reproduce the above copyright notice,
18 
  *      this list of conditions and the following disclaimer in the documentation
19 
  *      and/or other materials provided with the distribution.
20 
  *   3. Neither the name of STMicroelectronics nor the names of its contributors
21 
  *      may be used to endorse or promote products derived from this software
22 
  *      without specific prior written permission.
23 
  *
24 
  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 
  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 
  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 
  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 
  *
35 
  ******************************************************************************
36 
  */
37 
 
38 
/* Define to prevent recursive inclusion -------------------------------------*/
39 
#ifndef __STM32L1xx_HAL_TIM_EX_H
40 
#define __STM32L1xx_HAL_TIM_EX_H
41 
 
42 
#ifdef __cplusplus
43 
 extern "C" {
44 
#endif
45 
 
46 
/* Includes ------------------------------------------------------------------*/
47 
#include "stm32l1xx_hal_def.h"
48 
 
49 
/** @addtogroup STM32L1xx_HAL_Driver
50 
  * @{
51 
  */
52 
 
53 
/** @addtogroup TIMEx
54 
  * @{
55 
  */
56 
 
57 
/* Exported types ------------------------------------------------------------*/
58 
/** @defgroup TIMEx_Exported_Types TIMEx Exported Types
59 
  * @{
60 
  */
61 
 
62 
/**
63 
  * @brief  TIM Master configuration Structure definition  
64 
  */
65 
typedef struct {
66 
  uint32_t  MasterOutputTrigger;   /*!< Trigger output (TRGO) selection
67 
                                      This parameter can be a value of @ref TIM_Master_Mode_Selection */
68 
  uint32_t  MasterSlaveMode;       /*!< Master/slave mode selection
69 
                                      This parameter can be a value of @ref TIM_Master_Slave_Mode */
70 
}TIM_MasterConfigTypeDef;
71 
 
72 
/**
73 
  * @}
74 
  */
75 
 
76 
/* Exported constants --------------------------------------------------------*/
77 
/** @defgroup TIMEx_Exported_Constants TIMEx Exported Constants
78 
  * @{
79 
  */
80 
 
81 
/** @defgroup TIMEx_Remap TIMEx Remap
82 
  * @{
83 
  */
84 
 
85 
#if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
86 
#define TIM_TIM2_ITR1_TIM10_OC        (0x00000000)       /*!< TIM2 ITR1 input is connected to TIM10 OC */
87 
#define TIM_TIM2_ITR1_TIM5_TGO        TIM2_OR_ITR1_RMP   /*!< TIM2 ITR1 input is connected to TIM5 TGO */
88 
#endif /* defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) */
89 
 
90 
#if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
91 
#define TIM_TIM3_ITR2_TIM11_OC        (0x00000000)       /*!< TIM3 ITR2 input is connected to TIM11 OC */
92 
#define TIM_TIM3_ITR2_TIM5_TGO        TIM2_OR_ITR1_RMP   /*!< TIM3 ITR2 input is connected to TIM5 TGO */
93 
#endif /* defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) */
94 
 
95 
#if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
96 
#define TIM_TIM9_ITR1_TIM3_TGO        (0x00000000)       /*!< TIM9 ITR1 input is connected to TIM3 TGO */
97 
#define TIM_TIM9_ITR1_TS              TIM9_OR_ITR1_RMP   /*!< TIM9 ITR1 input is connected to touch sensing I/O */
98 
#endif /* defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) */
99 
#define TIM_TIM9_GPIO                 (0x00000000)       /*!< TIM9 Channel1 is connected to GPIO */
100 
#define TIM_TIM9_LSE                  TIM_OR_TI1RMP_0    /*!< TIM9 Channel1 is connected to LSE internal clock */
101 
#define TIM_TIM9_GPIO1                TIM_OR_TI1RMP_1    /*!< TIM9 Channel1 is connected to GPIO */
102 
#define TIM_TIM9_GPIO2                TIM_OR_TI1RMP      /*!< TIM9 Channel1 is connected to GPIO */
103 
 
104 
 
105 
#if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
106 
#define TIM_TIM10_TI1RMP              (0x00000000)       /*!< TIM10 Channel 1 depends on TI1_RMP */
107 
#define TIM_TIM10_RI                  TIM_OR_TI1_RMP_RI  /*!< TIM10 Channel 1 is connected to RI */
108 
#define TIM_TIM10_ETR_LSE             (0x00000000)       /*!< TIM10 ETR input is connected to LSE clock */
109 
#define TIM_TIM10_ETR_TIM9_TGO        TIM_OR_ETR_RMP     /*!< TIM10 ETR input is connected to TIM9 TGO */
110 
#endif /* defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) */
111 
#define TIM_TIM10_GPIO                (0x00000000)       /*!< TIM10 Channel1 is connected to GPIO */
112 
#define TIM_TIM10_LSI                 TIM_OR_TI1RMP_0    /*!< TIM10 Channel1 is connected to LSI internal clock */
113 
#define TIM_TIM10_LSE                 TIM_OR_TI1RMP_1    /*!< TIM10 Channel1 is connected to LSE internal clock */
114 
#define TIM_TIM10_RTC                 TIM_OR_TI1RMP      /*!< TIM10 Channel1 is connected to RTC wakeup interrupt */
115 
 
116 
#if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
117 
#define TIM_TIM11_TI1RMP              (0x00000000)       /*!< TIM11 Channel 1 depends on TI1_RMP */
118 
#define TIM_TIM11_RI                  TIM_OR_TI1_RMP_RI  /*!< TIM11 Channel 1 is connected to RI */
119 
#define TIM_TIM11_ETR_LSE             (0x00000000)       /*!< TIM11 ETR input is connected to LSE clock */
120 
#define TIM_TIM11_ETR_TIM9_TGO        TIM_OR_ETR_RMP     /*!< TIM11 ETR input is connected to TIM9 TGO */
121 
#endif /* defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) */
122 
#define TIM_TIM11_GPIO                (0x00000000)       /*!< TIM11 Channel1 is connected to GPIO */
123 
#define TIM_TIM11_MSI                 TIM_OR_TI1RMP_0    /*!< TIM11 Channel1 is connected to MSI internal clock */
124 
#define TIM_TIM11_HSE_RTC             TIM_OR_TI1RMP_1    /*!< TIM11 Channel1 is connected to HSE_RTC clock */
125 
#define TIM_TIM11_GPIO1               TIM_OR_TI1RMP      /*!< TIM11 Channel1 is connected to GPIO */
126 
 
127 
 
128 
#if defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX)
129 
#define IS_TIM_REMAP(INSTANCE, TIM_REMAP)               \
130 
        ( (((INSTANCE) == TIM2)  && (((TIM_REMAP) == TIM_TIM2_ITR1_TIM10_OC) || ((TIM_REMAP) == TIM_TIM2_ITR1_TIM5_TGO)))  || \
131 
          (((INSTANCE) == TIM3)  && (((TIM_REMAP) == TIM_TIM3_ITR2_TIM11_OC) || ((TIM_REMAP) == TIM_TIM3_ITR2_TIM5_TGO)))  || \
132 
          (((INSTANCE) == TIM9)  && ((TIM_REMAP) <= (TIM_TIM9_ITR1_TS | TIM_TIM9_GPIO2)))                                  || \
133 
          (((INSTANCE) == TIM10) && ((TIM_REMAP) <= (TIM_TIM10_RI | TIM_TIM10_ETR_TIM9_TGO | TIM_TIM10_RTC)))              || \
134 
          (((INSTANCE) == TIM11) && ((TIM_REMAP) <= (TIM_TIM11_RI | TIM_TIM11_ETR_TIM9_TGO | TIM_TIM11_GPIO1)))               \
135 
        )
136 
#else /* defined (STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) || defined (STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L151xE) || defined (STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) */
137 
#define IS_TIM_REMAP(INSTANCE, TIM_REMAP)               \
138 
        ( (((INSTANCE) == TIM9)  && (((TIM_REMAP) == TIM_TIM9_GPIO) || ((TIM_REMAP) == TIM_TIM9_LSE) || ((TIM_REMAP) == TIM_TIM9_GPIO1) || ((TIM_REMAP) == TIM_TIM9_GPIO2)))       || \
139 
          (((INSTANCE) == TIM10) && (((TIM_REMAP) == TIM_TIM10_GPIO) || ((TIM_REMAP) == TIM_TIM10_LSI) || ((TIM_REMAP) == TIM_TIM10_LSE) || ((TIM_REMAP) == TIM_TIM10_RTC)))       || \
140 
          (((INSTANCE) == TIM11) && (((TIM_REMAP) == TIM_TIM11_GPIO) || ((TIM_REMAP) == TIM_TIM11_MSI) || ((TIM_REMAP) == TIM_TIM11_HSE_RTC) || ((TIM_REMAP) == TIM_TIM11_GPIO1)))    \
141 
        )
142 
#endif
143 
 
144 
 
145 
/**
146 
  * @}
147 
  */
148 
 
149 
/**
150 
  * @}
151 
  */
152 
 
153 
/* Exported macro ------------------------------------------------------------*/
154 
 
155 
/* Exported functions --------------------------------------------------------*/
156 
/** @addtogroup TIMEx_Exported_Functions
157 
  * @{
158 
  */
159 
 
160 
/** @addtogroup TIMEx_Exported_Functions_Group1
161 
  * @{
162 
  */
163 
/* Extension Control functions  ************************************************/
164 
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig);
165 
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
166 
/**
167 
  * @}
168 
  */
169 
 
170 
/* Extension Peripheral State functions  **************************************/
171 
/**
172 
  * @}
173 
  */
174 
 
175 
/**
176 
  * @}
177 
  */
178 
 
179 
/**
180 
  * @}
181 
  */
182 
 
183 
/**
184 
  * @}
185 
  */
186 
 
187 
#ifdef __cplusplus
188 
}
189 
#endif
190 
 
191 
 
192 
#endif /* __STM32L1xx_HAL_TIM_EX_H */
193 
 
194 
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/