Go to most recent revision | Details | Last modification | View Log | RSS feed
Rev | Author | Line No. | Line |
---|---|---|---|
30 | mjames | 1 | /** |
2 | ****************************************************************************** |
||
3 | * @file stm32l1xx_hal_flash.h |
||
4 | * @author MCD Application Team |
||
5 | * @version V1.2.0 |
||
6 | * @date 01-July-2016 |
||
7 | * @brief Header file of Flash HAL module. |
||
8 | ****************************************************************************** |
||
9 | * @attention |
||
10 | * |
||
11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
||
12 | * |
||
13 | * Redistribution and use in source and binary forms, with or without modification, |
||
14 | * are permitted provided that the following conditions are met: |
||
15 | * 1. Redistributions of source code must retain the above copyright notice, |
||
16 | * this list of conditions and the following disclaimer. |
||
17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
||
18 | * this list of conditions and the following disclaimer in the documentation |
||
19 | * and/or other materials provided with the distribution. |
||
20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
||
21 | * may be used to endorse or promote products derived from this software |
||
22 | * without specific prior written permission. |
||
23 | * |
||
24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
||
25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||
26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
||
27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
||
28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||
29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
||
30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||
31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
||
32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
||
33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
||
34 | * |
||
35 | ****************************************************************************** |
||
36 | */ |
||
37 | |||
38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
||
39 | #ifndef __STM32L1xx_HAL_FLASH_EX_H |
||
40 | #define __STM32L1xx_HAL_FLASH_EX_H |
||
41 | |||
42 | #ifdef __cplusplus |
||
43 | extern "C" { |
||
44 | #endif |
||
45 | |||
46 | /* Includes ------------------------------------------------------------------*/ |
||
47 | #include "stm32l1xx_hal_def.h" |
||
48 | |||
49 | /** @addtogroup STM32L1xx_HAL_Driver |
||
50 | * @{ |
||
51 | */ |
||
52 | |||
53 | /** @addtogroup FLASHEx |
||
54 | * @{ |
||
55 | */ |
||
56 | |||
57 | /** @addtogroup FLASHEx_Private_Constants |
||
58 | * @{ |
||
59 | */ |
||
60 | #if defined(FLASH_SR_RDERR) && defined(FLASH_SR_OPTVERRUSR) |
||
61 | |||
62 | #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ |
||
63 | FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \ |
||
64 | |||
65 | #elif defined(FLASH_SR_RDERR) |
||
66 | |||
67 | #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ |
||
68 | FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \ |
||
69 | FLASH_FLAG_RDERR) |
||
70 | |||
71 | #elif defined(FLASH_SR_OPTVERRUSR) |
||
72 | |||
73 | #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ |
||
74 | FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | \ |
||
75 | FLASH_FLAG_OPTVERRUSR) |
||
76 | |||
77 | #else |
||
78 | |||
79 | #define FLASH_FLAG_MASK ( FLASH_FLAG_EOP | FLASH_FLAG_ENDHV | FLASH_FLAG_WRPERR | \ |
||
80 | FLASH_FLAG_OPTVERR | FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR) |
||
81 | |||
82 | #endif /* FLASH_SR_RDERR & FLASH_SR_OPTVERRUSR */ |
||
83 | |||
84 | #if defined(STM32L100xB) || defined(STM32L151xB) || defined(STM32L152xB) || defined(STM32L100xBA) \ |
||
85 | || defined(STM32L151xBA) || defined(STM32L152xBA) |
||
86 | |||
87 | /******* Devices with FLASH 128K *******/ |
||
88 | #define FLASH_NBPAGES_MAX 512 /* 512 pages from page 0 to page 511 */ |
||
89 | |||
90 | #elif defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \ |
||
91 | || defined(STM32L151xCA) || defined(STM32L152xCA) || defined(STM32L162xCA) |
||
92 | |||
93 | /******* Devices with FLASH 256K *******/ |
||
94 | #define FLASH_NBPAGES_MAX 1025 /* 1025 pages from page 0 to page 1024 */ |
||
95 | |||
96 | #elif defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \ |
||
97 | || defined(STM32L162xD) || defined(STM32L162xDX) |
||
98 | |||
99 | /******* Devices with FLASH 384K *******/ |
||
100 | #define FLASH_NBPAGES_MAX 1536 /* 1536 pages from page 0 to page 1535 */ |
||
101 | |||
102 | #elif defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) |
||
103 | |||
104 | /******* Devices with FLASH 512K *******/ |
||
105 | #define FLASH_NBPAGES_MAX 2048 /* 2048 pages from page 0 to page 2047 */ |
||
106 | |||
107 | #endif /* STM32L100xB || STM32L151xB || STM32L152xB || STM32L100xBA || STM32L151xBA || STM32L152xBA */ |
||
108 | |||
109 | #define WRP_MASK_LOW ((uint32_t)0x0000FFFFU) |
||
110 | #define WRP_MASK_HIGH ((uint32_t)0xFFFF0000U) |
||
111 | |||
112 | /** |
||
113 | * @} |
||
114 | */ |
||
115 | |||
116 | /** @addtogroup FLASHEx_Private_Macros |
||
117 | * @{ |
||
118 | */ |
||
119 | |||
120 | #define IS_FLASH_TYPEERASE(__VALUE__) (((__VALUE__) == FLASH_TYPEERASE_PAGES)) |
||
121 | |||
122 | #define IS_OPTIONBYTE(__VALUE__) (((__VALUE__) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR))) |
||
123 | |||
124 | #define IS_WRPSTATE(__VALUE__) (((__VALUE__) == OB_WRPSTATE_DISABLE) || \ |
||
125 | ((__VALUE__) == OB_WRPSTATE_ENABLE)) |
||
126 | |||
127 | #define IS_OB_WRP(__PAGE__) (((__PAGE__) != 0x0000000U)) |
||
128 | |||
129 | #define IS_OB_RDP(__LEVEL__) (((__LEVEL__) == OB_RDP_LEVEL_0) ||\ |
||
130 | ((__LEVEL__) == OB_RDP_LEVEL_1) ||\ |
||
131 | ((__LEVEL__) == OB_RDP_LEVEL_2)) |
||
132 | |||
133 | #define IS_OB_BOR_LEVEL(__LEVEL__) (((__LEVEL__) == OB_BOR_OFF) || \ |
||
134 | ((__LEVEL__) == OB_BOR_LEVEL1) || \ |
||
135 | ((__LEVEL__) == OB_BOR_LEVEL2) || \ |
||
136 | ((__LEVEL__) == OB_BOR_LEVEL3) || \ |
||
137 | ((__LEVEL__) == OB_BOR_LEVEL4) || \ |
||
138 | ((__LEVEL__) == OB_BOR_LEVEL5)) |
||
139 | |||
140 | #define IS_OB_IWDG_SOURCE(__SOURCE__) (((__SOURCE__) == OB_IWDG_SW) || ((__SOURCE__) == OB_IWDG_HW)) |
||
141 | |||
142 | #define IS_OB_STOP_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STOP_NORST) || ((__SOURCE__) == OB_STOP_RST)) |
||
143 | |||
144 | #define IS_OB_STDBY_SOURCE(__SOURCE__) (((__SOURCE__) == OB_STDBY_NORST) || ((__SOURCE__) == OB_STDBY_RST)) |
||
145 | |||
146 | #if defined(FLASH_OBR_SPRMOD) && defined(FLASH_OBR_nRST_BFB2) |
||
147 | |||
148 | #define IS_OBEX(__VALUE__) (((__VALUE__) == OPTIONBYTE_PCROP) || ((__VALUE__) == OPTIONBYTE_BOOTCONFIG)) |
||
149 | |||
150 | #elif defined(FLASH_OBR_SPRMOD) && !defined(FLASH_OBR_nRST_BFB2) |
||
151 | |||
152 | #define IS_OBEX(__VALUE__) ((__VALUE__) == OPTIONBYTE_PCROP) |
||
153 | |||
154 | #elif !defined(FLASH_OBR_SPRMOD) && defined(FLASH_OBR_nRST_BFB2) |
||
155 | |||
156 | #define IS_OBEX(__VALUE__) ((__VALUE__) == OPTIONBYTE_BOOTCONFIG) |
||
157 | |||
158 | #endif /* FLASH_OBR_SPRMOD && FLASH_OBR_nRST_BFB2 */ |
||
159 | |||
160 | #if defined(FLASH_OBR_SPRMOD) |
||
161 | |||
162 | #define IS_PCROPSTATE(__VALUE__) (((__VALUE__) == OB_PCROP_STATE_DISABLE) || \ |
||
163 | ((__VALUE__) == OB_PCROP_STATE_ENABLE)) |
||
164 | |||
165 | #define IS_OB_PCROP(__PAGE__) (((__PAGE__) != 0x0000000U)) |
||
166 | #endif /* FLASH_OBR_SPRMOD */ |
||
167 | |||
168 | #if defined(FLASH_OBR_nRST_BFB2) |
||
169 | |||
170 | #define IS_OB_BOOT_BANK(__BANK__) (((__BANK__) == OB_BOOT_BANK2) || ((__BANK__) == OB_BOOT_BANK1)) |
||
171 | |||
172 | #endif /* FLASH_OBR_nRST_BFB2 */ |
||
173 | |||
174 | #define IS_TYPEERASEDATA(__VALUE__) (((__VALUE__) == FLASH_TYPEERASEDATA_BYTE) || \ |
||
175 | ((__VALUE__) == FLASH_TYPEERASEDATA_HALFWORD) || \ |
||
176 | ((__VALUE__) == FLASH_TYPEERASEDATA_WORD)) |
||
177 | |||
178 | #define IS_TYPEPROGRAMDATA(__VALUE__) (((__VALUE__) == FLASH_TYPEPROGRAMDATA_BYTE) || \ |
||
179 | ((__VALUE__) == FLASH_TYPEPROGRAMDATA_HALFWORD) || \ |
||
180 | ((__VALUE__) == FLASH_TYPEPROGRAMDATA_WORD) || \ |
||
181 | ((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTBYTE) || \ |
||
182 | ((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTHALFWORD) || \ |
||
183 | ((__VALUE__) == FLASH_TYPEPROGRAMDATA_FASTWORD)) |
||
184 | |||
185 | /** @defgroup FLASHEx_Address FLASHEx Address |
||
186 | * @{ |
||
187 | */ |
||
188 | |||
189 | #define IS_FLASH_DATA_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_EEPROM_BASE) && ((__ADDRESS__) <= FLASH_EEPROM_END)) |
||
190 | |||
191 | #if defined(STM32L100xB) || defined(STM32L151xB) || defined(STM32L152xB) || defined(STM32L100xBA) \ |
||
192 | || defined(STM32L151xBA) || defined(STM32L152xBA) || defined(STM32L100xC) || defined(STM32L151xC) \ |
||
193 | || defined(STM32L152xC) || defined(STM32L162xC) || defined(STM32L151xCA) || defined(STM32L152xCA) \ |
||
194 | || defined(STM32L162xCA) |
||
195 | |||
196 | #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_END)) |
||
197 | |||
198 | #else /*STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
||
199 | |||
200 | #define IS_FLASH_PROGRAM_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_BANK2_END)) |
||
201 | #define IS_FLASH_PROGRAM_BANK1_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BASE) && ((__ADDRESS__) <= FLASH_BANK1_END)) |
||
202 | #define IS_FLASH_PROGRAM_BANK2_ADDRESS(__ADDRESS__) (((__ADDRESS__) >= FLASH_BANK2_BASE) && ((__ADDRESS__) <= FLASH_BANK2_END)) |
||
203 | |||
204 | #endif /* STM32L100xB || STM32L151xB || STM32L152xB || (...) || STM32L151xCA || STM32L152xCA || STM32L162xCA */ |
||
205 | |||
206 | #define IS_NBPAGES(__PAGES__) (((__PAGES__) >= 1) && ((__PAGES__) <= FLASH_NBPAGES_MAX)) |
||
207 | |||
208 | /** |
||
209 | * @} |
||
210 | */ |
||
211 | |||
212 | /** |
||
213 | * @} |
||
214 | */ |
||
215 | /* Exported types ------------------------------------------------------------*/ |
||
216 | |||
217 | /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types |
||
218 | * @{ |
||
219 | */ |
||
220 | |||
221 | /** |
||
222 | * @brief FLASH Erase structure definition |
||
223 | */ |
||
224 | typedef struct |
||
225 | { |
||
226 | uint32_t TypeErase; /*!< TypeErase: Page Erase only. |
||
227 | This parameter can be a value of @ref FLASHEx_Type_Erase */ |
||
228 | |||
229 | uint32_t PageAddress; /*!< PageAddress: Initial FLASH address to be erased |
||
230 | This parameter must be a value belonging to FLASH Programm address (depending on the devices) */ |
||
231 | |||
232 | uint32_t NbPages; /*!< NbPages: Number of pages to be erased. |
||
233 | This parameter must be a value between 1 and (max number of pages - value of Initial page)*/ |
||
234 | |||
235 | } FLASH_EraseInitTypeDef; |
||
236 | |||
237 | /** |
||
238 | * @brief FLASH Option Bytes PROGRAM structure definition |
||
239 | */ |
||
240 | typedef struct |
||
241 | { |
||
242 | uint32_t OptionType; /*!< OptionType: Option byte to be configured. |
||
243 | This parameter can be a value of @ref FLASHEx_Option_Type */ |
||
244 | |||
245 | uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation. |
||
246 | This parameter can be a value of @ref FLASHEx_WRP_State */ |
||
247 | |||
248 | uint32_t WRPSector0To31; /*!< WRPSector0To31: specifies the sector(s) which are write protected between Sector 0 to 31 |
||
249 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection1 */ |
||
250 | |||
251 | #if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \ |
||
252 | || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xCA) \ |
||
253 | || defined(STM32L152xD) || defined(STM32L152xDX) || defined(STM32L162xCA) || defined(STM32L162xD) \ |
||
254 | || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) |
||
255 | uint32_t WRPSector32To63; /*!< WRPSector32To63: specifies the sector(s) which are write protected between Sector 32 to 63 |
||
256 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection2 */ |
||
257 | #endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L151xE || STM32L152xE || STM32L162xE */ |
||
258 | |||
259 | #if defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \ |
||
260 | || defined(STM32L162xD) || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) \ |
||
261 | || defined(STM32L162xE) |
||
262 | uint32_t WRPSector64To95; /*!< WRPSector64to95: specifies the sector(s) which are write protected between Sector 64 to 95 |
||
263 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection3 */ |
||
264 | #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
||
265 | |||
266 | #if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) || defined(STM32L151xDX) \ |
||
267 | || defined(STM32L152xDX) || defined(STM32L162xDX) |
||
268 | uint32_t WRPSector96To127; /*!< WRPSector96To127: specifies the sector(s) which are write protected between Sector 96 to 127 or |
||
269 | Sectors 96 to 111 for STM32L1xxxDX devices. |
||
270 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_Write_Protection4 */ |
||
271 | #endif /* STM32L151xE || STM32L152xE || STM32L162xE || STM32L151xDX || ... */ |
||
272 | |||
273 | uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level. |
||
274 | This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */ |
||
275 | |||
276 | uint8_t BORLevel; /*!< BORLevel: Set the BOR Level. |
||
277 | This parameter can be a value of @ref FLASHEx_Option_Bytes_BOR_Level */ |
||
278 | |||
279 | uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. |
||
280 | This parameter can be a combination of @ref FLASHEx_Option_Bytes_IWatchdog, |
||
281 | @ref FLASHEx_Option_Bytes_nRST_STOP and @ref FLASHEx_Option_Bytes_nRST_STDBY*/ |
||
282 | } FLASH_OBProgramInitTypeDef; |
||
283 | |||
284 | #if defined(FLASH_OBR_SPRMOD) || defined(FLASH_OBR_nRST_BFB2) |
||
285 | /** |
||
286 | * @brief FLASH Advanced Option Bytes Program structure definition |
||
287 | */ |
||
288 | typedef struct |
||
289 | { |
||
290 | uint32_t OptionType; /*!< OptionType: Option byte to be configured for extension . |
||
291 | This parameter can be a value of @ref FLASHEx_OptionAdv_Type */ |
||
292 | |||
293 | #if defined(FLASH_OBR_SPRMOD) |
||
294 | uint32_t PCROPState; /*!< PCROPState: PCROP activation or deactivation. |
||
295 | This parameter can be a value of @ref FLASHEx_PCROP_State */ |
||
296 | |||
297 | uint32_t PCROPSector0To31; /*!< PCROPSector0To31: specifies the sector(s) set for PCROP |
||
298 | This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection1 */ |
||
299 | |||
300 | #if defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) |
||
301 | uint32_t PCROPSector32To63; /*!< PCROPSector32To63: specifies the sector(s) set for PCROP |
||
302 | This parameter can be a value of @ref FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 */ |
||
303 | #endif /* STM32L151xC || STM32L152xC || STM32L162xC */ |
||
304 | #endif /* FLASH_OBR_SPRMOD */ |
||
305 | |||
306 | #if defined(FLASH_OBR_nRST_BFB2) |
||
307 | uint16_t BootConfig; /*!< BootConfig: specifies Option bytes for boot config |
||
308 | This parameter can be a value of @ref FLASHEx_Option_Bytes_BOOT */ |
||
309 | #endif /* FLASH_OBR_nRST_BFB2*/ |
||
310 | } FLASH_AdvOBProgramInitTypeDef; |
||
311 | |||
312 | /** |
||
313 | * @} |
||
314 | */ |
||
315 | #endif /* FLASH_OBR_SPRMOD || FLASH_OBR_nRST_BFB2 */ |
||
316 | |||
317 | /* Exported constants --------------------------------------------------------*/ |
||
318 | |||
319 | |||
320 | /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants |
||
321 | * @{ |
||
322 | */ |
||
323 | |||
324 | /** @defgroup FLASHEx_Type_Erase FLASHEx_Type_Erase |
||
325 | * @{ |
||
326 | */ |
||
327 | #define FLASH_TYPEERASE_PAGES ((uint32_t)0x00U) /*!<Page erase only*/ |
||
328 | |||
329 | /** |
||
330 | * @} |
||
331 | */ |
||
332 | |||
333 | /** @defgroup FLASHEx_Option_Type FLASHEx Option Type |
||
334 | * @{ |
||
335 | */ |
||
336 | #define OPTIONBYTE_WRP ((uint32_t)0x01U) /*!<WRP option byte configuration*/ |
||
337 | #define OPTIONBYTE_RDP ((uint32_t)0x02U) /*!<RDP option byte configuration*/ |
||
338 | #define OPTIONBYTE_USER ((uint32_t)0x04U) /*!<USER option byte configuration*/ |
||
339 | #define OPTIONBYTE_BOR ((uint32_t)0x08U) /*!<BOR option byte configuration*/ |
||
340 | |||
341 | /** |
||
342 | * @} |
||
343 | */ |
||
344 | |||
345 | /** @defgroup FLASHEx_WRP_State FLASHEx WRP State |
||
346 | * @{ |
||
347 | */ |
||
348 | #define OB_WRPSTATE_DISABLE ((uint32_t)0x00U) /*!<Disable the write protection of the desired sectors*/ |
||
349 | #define OB_WRPSTATE_ENABLE ((uint32_t)0x01U) /*!<Enable the write protection of the desired sectors*/ |
||
350 | |||
351 | /** |
||
352 | * @} |
||
353 | */ |
||
354 | |||
355 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection1 FLASHEx Option Bytes Write Protection1 |
||
356 | * @{ |
||
357 | */ |
||
358 | |||
359 | /* Common pages for Cat1, Cat2, Cat3, Cat4 & Cat5 devices */ |
||
360 | #define OB_WRP1_PAGES0TO15 ((uint32_t)0x00000001) /* Write protection of Sector0 */ |
||
361 | #define OB_WRP1_PAGES16TO31 ((uint32_t)0x00000002) /* Write protection of Sector1 */ |
||
362 | #define OB_WRP1_PAGES32TO47 ((uint32_t)0x00000004) /* Write protection of Sector2 */ |
||
363 | #define OB_WRP1_PAGES48TO63 ((uint32_t)0x00000008) /* Write protection of Sector3 */ |
||
364 | #define OB_WRP1_PAGES64TO79 ((uint32_t)0x00000010) /* Write protection of Sector4 */ |
||
365 | #define OB_WRP1_PAGES80TO95 ((uint32_t)0x00000020) /* Write protection of Sector5 */ |
||
366 | #define OB_WRP1_PAGES96TO111 ((uint32_t)0x00000040) /* Write protection of Sector6 */ |
||
367 | #define OB_WRP1_PAGES112TO127 ((uint32_t)0x00000080) /* Write protection of Sector7 */ |
||
368 | #define OB_WRP1_PAGES128TO143 ((uint32_t)0x00000100) /* Write protection of Sector8 */ |
||
369 | #define OB_WRP1_PAGES144TO159 ((uint32_t)0x00000200) /* Write protection of Sector9 */ |
||
370 | #define OB_WRP1_PAGES160TO175 ((uint32_t)0x00000400) /* Write protection of Sector10 */ |
||
371 | #define OB_WRP1_PAGES176TO191 ((uint32_t)0x00000800) /* Write protection of Sector11 */ |
||
372 | #define OB_WRP1_PAGES192TO207 ((uint32_t)0x00001000) /* Write protection of Sector12 */ |
||
373 | #define OB_WRP1_PAGES208TO223 ((uint32_t)0x00002000) /* Write protection of Sector13 */ |
||
374 | #define OB_WRP1_PAGES224TO239 ((uint32_t)0x00004000) /* Write protection of Sector14 */ |
||
375 | #define OB_WRP1_PAGES240TO255 ((uint32_t)0x00008000) /* Write protection of Sector15 */ |
||
376 | #define OB_WRP1_PAGES256TO271 ((uint32_t)0x00010000) /* Write protection of Sector16 */ |
||
377 | #define OB_WRP1_PAGES272TO287 ((uint32_t)0x00020000) /* Write protection of Sector17 */ |
||
378 | #define OB_WRP1_PAGES288TO303 ((uint32_t)0x00040000) /* Write protection of Sector18 */ |
||
379 | #define OB_WRP1_PAGES304TO319 ((uint32_t)0x00080000) /* Write protection of Sector19 */ |
||
380 | #define OB_WRP1_PAGES320TO335 ((uint32_t)0x00100000) /* Write protection of Sector20 */ |
||
381 | #define OB_WRP1_PAGES336TO351 ((uint32_t)0x00200000) /* Write protection of Sector21 */ |
||
382 | #define OB_WRP1_PAGES352TO367 ((uint32_t)0x00400000) /* Write protection of Sector22 */ |
||
383 | #define OB_WRP1_PAGES368TO383 ((uint32_t)0x00800000) /* Write protection of Sector23 */ |
||
384 | #define OB_WRP1_PAGES384TO399 ((uint32_t)0x01000000) /* Write protection of Sector24 */ |
||
385 | #define OB_WRP1_PAGES400TO415 ((uint32_t)0x02000000) /* Write protection of Sector25 */ |
||
386 | #define OB_WRP1_PAGES416TO431 ((uint32_t)0x04000000) /* Write protection of Sector26 */ |
||
387 | #define OB_WRP1_PAGES432TO447 ((uint32_t)0x08000000) /* Write protection of Sector27 */ |
||
388 | #define OB_WRP1_PAGES448TO463 ((uint32_t)0x10000000) /* Write protection of Sector28 */ |
||
389 | #define OB_WRP1_PAGES464TO479 ((uint32_t)0x20000000) /* Write protection of Sector29 */ |
||
390 | #define OB_WRP1_PAGES480TO495 ((uint32_t)0x40000000) /* Write protection of Sector30 */ |
||
391 | #define OB_WRP1_PAGES496TO511 ((uint32_t)0x80000000U) /* Write protection of Sector31 */ |
||
392 | |||
393 | #define OB_WRP1_ALLPAGES ((uint32_t)FLASH_WRPR1_WRP) /*!< Write protection of all Sectors */ |
||
394 | |||
395 | /** |
||
396 | * @} |
||
397 | */ |
||
398 | |||
399 | #if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \ |
||
400 | || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xCA) \ |
||
401 | || defined(STM32L152xD) || defined(STM32L152xDX) || defined(STM32L162xCA) || defined(STM32L162xD) \ |
||
402 | || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) |
||
403 | |||
404 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection2 FLASHEx Option Bytes Write Protection2 |
||
405 | * @{ |
||
406 | */ |
||
407 | |||
408 | /* Pages for Cat3, Cat4 & Cat5 devices*/ |
||
409 | #define OB_WRP2_PAGES512TO527 ((uint32_t)0x00000001) /* Write protection of Sector32 */ |
||
410 | #define OB_WRP2_PAGES528TO543 ((uint32_t)0x00000002) /* Write protection of Sector33 */ |
||
411 | #define OB_WRP2_PAGES544TO559 ((uint32_t)0x00000004) /* Write protection of Sector34 */ |
||
412 | #define OB_WRP2_PAGES560TO575 ((uint32_t)0x00000008) /* Write protection of Sector35 */ |
||
413 | #define OB_WRP2_PAGES576TO591 ((uint32_t)0x00000010) /* Write protection of Sector36 */ |
||
414 | #define OB_WRP2_PAGES592TO607 ((uint32_t)0x00000020) /* Write protection of Sector37 */ |
||
415 | #define OB_WRP2_PAGES608TO623 ((uint32_t)0x00000040) /* Write protection of Sector38 */ |
||
416 | #define OB_WRP2_PAGES624TO639 ((uint32_t)0x00000080) /* Write protection of Sector39 */ |
||
417 | #define OB_WRP2_PAGES640TO655 ((uint32_t)0x00000100) /* Write protection of Sector40 */ |
||
418 | #define OB_WRP2_PAGES656TO671 ((uint32_t)0x00000200) /* Write protection of Sector41 */ |
||
419 | #define OB_WRP2_PAGES672TO687 ((uint32_t)0x00000400) /* Write protection of Sector42 */ |
||
420 | #define OB_WRP2_PAGES688TO703 ((uint32_t)0x00000800) /* Write protection of Sector43 */ |
||
421 | #define OB_WRP2_PAGES704TO719 ((uint32_t)0x00001000) /* Write protection of Sector44 */ |
||
422 | #define OB_WRP2_PAGES720TO735 ((uint32_t)0x00002000) /* Write protection of Sector45 */ |
||
423 | #define OB_WRP2_PAGES736TO751 ((uint32_t)0x00004000) /* Write protection of Sector46 */ |
||
424 | #define OB_WRP2_PAGES752TO767 ((uint32_t)0x00008000) /* Write protection of Sector47 */ |
||
425 | |||
426 | #if defined(STM32L100xC) || defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) \ |
||
427 | || defined(STM32L151xCA) || defined(STM32L151xD) || defined(STM32L152xCA) || defined(STM32L152xD) \ |
||
428 | || defined(STM32L162xCA) || defined(STM32L162xD) || defined(STM32L151xE) || defined(STM32L152xE) \ |
||
429 | || defined(STM32L162xE) |
||
430 | |||
431 | #define OB_WRP2_PAGES768TO783 ((uint32_t)0x00010000) /* Write protection of Sector48 */ |
||
432 | #define OB_WRP2_PAGES784TO799 ((uint32_t)0x00020000) /* Write protection of Sector49 */ |
||
433 | #define OB_WRP2_PAGES800TO815 ((uint32_t)0x00040000) /* Write protection of Sector50 */ |
||
434 | #define OB_WRP2_PAGES816TO831 ((uint32_t)0x00080000) /* Write protection of Sector51 */ |
||
435 | #define OB_WRP2_PAGES832TO847 ((uint32_t)0x00100000) /* Write protection of Sector52 */ |
||
436 | #define OB_WRP2_PAGES848TO863 ((uint32_t)0x00200000) /* Write protection of Sector53 */ |
||
437 | #define OB_WRP2_PAGES864TO879 ((uint32_t)0x00400000) /* Write protection of Sector54 */ |
||
438 | #define OB_WRP2_PAGES880TO895 ((uint32_t)0x00800000) /* Write protection of Sector55 */ |
||
439 | #define OB_WRP2_PAGES896TO911 ((uint32_t)0x01000000) /* Write protection of Sector56 */ |
||
440 | #define OB_WRP2_PAGES912TO927 ((uint32_t)0x02000000) /* Write protection of Sector57 */ |
||
441 | #define OB_WRP2_PAGES928TO943 ((uint32_t)0x04000000) /* Write protection of Sector58 */ |
||
442 | #define OB_WRP2_PAGES944TO959 ((uint32_t)0x08000000) /* Write protection of Sector59 */ |
||
443 | #define OB_WRP2_PAGES960TO975 ((uint32_t)0x10000000) /* Write protection of Sector60 */ |
||
444 | #define OB_WRP2_PAGES976TO991 ((uint32_t)0x20000000) /* Write protection of Sector61 */ |
||
445 | #define OB_WRP2_PAGES992TO1007 ((uint32_t)0x40000000) /* Write protection of Sector62 */ |
||
446 | #define OB_WRP2_PAGES1008TO1023 ((uint32_t)0x80000000U) /* Write protection of Sector63 */ |
||
447 | |||
448 | #endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE */ |
||
449 | |||
450 | #define OB_WRP2_ALLPAGES ((uint32_t)FLASH_WRPR2_WRP) /*!< Write protection of all Sectors */ |
||
451 | |||
452 | /** |
||
453 | * @} |
||
454 | */ |
||
455 | |||
456 | #endif /* STM32L100xC || STM32L151xC || STM32L152xC || (...) || STM32L162xD || STM32L151xDX || STM32L152xE || STM32L162xE */ |
||
457 | |||
458 | #if defined(STM32L151xD) || defined(STM32L151xDX) || defined(STM32L152xD) || defined(STM32L152xDX) \ |
||
459 | || defined(STM32L162xD) || defined(STM32L162xDX) || defined(STM32L151xE) || defined(STM32L152xE) \ |
||
460 | || defined(STM32L162xE) |
||
461 | |||
462 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection3 FLASHEx Option Bytes Write Protection3 |
||
463 | * @{ |
||
464 | */ |
||
465 | |||
466 | /* Pages for devices with FLASH >= 256KB*/ |
||
467 | #define OB_WRP3_PAGES1024TO1039 ((uint32_t)0x00000001) /* Write protection of Sector64 */ |
||
468 | #define OB_WRP3_PAGES1040TO1055 ((uint32_t)0x00000002) /* Write protection of Sector65 */ |
||
469 | #define OB_WRP3_PAGES1056TO1071 ((uint32_t)0x00000004) /* Write protection of Sector66 */ |
||
470 | #define OB_WRP3_PAGES1072TO1087 ((uint32_t)0x00000008) /* Write protection of Sector67 */ |
||
471 | #define OB_WRP3_PAGES1088TO1103 ((uint32_t)0x00000010) /* Write protection of Sector68 */ |
||
472 | #define OB_WRP3_PAGES1104TO1119 ((uint32_t)0x00000020) /* Write protection of Sector69 */ |
||
473 | #define OB_WRP3_PAGES1120TO1135 ((uint32_t)0x00000040) /* Write protection of Sector70 */ |
||
474 | #define OB_WRP3_PAGES1136TO1151 ((uint32_t)0x00000080) /* Write protection of Sector71 */ |
||
475 | #define OB_WRP3_PAGES1152TO1167 ((uint32_t)0x00000100) /* Write protection of Sector72 */ |
||
476 | #define OB_WRP3_PAGES1168TO1183 ((uint32_t)0x00000200) /* Write protection of Sector73 */ |
||
477 | #define OB_WRP3_PAGES1184TO1199 ((uint32_t)0x00000400) /* Write protection of Sector74 */ |
||
478 | #define OB_WRP3_PAGES1200TO1215 ((uint32_t)0x00000800) /* Write protection of Sector75 */ |
||
479 | #define OB_WRP3_PAGES1216TO1231 ((uint32_t)0x00001000) /* Write protection of Sector76 */ |
||
480 | #define OB_WRP3_PAGES1232TO1247 ((uint32_t)0x00002000) /* Write protection of Sector77 */ |
||
481 | #define OB_WRP3_PAGES1248TO1263 ((uint32_t)0x00004000) /* Write protection of Sector78 */ |
||
482 | #define OB_WRP3_PAGES1264TO1279 ((uint32_t)0x00008000) /* Write protection of Sector79 */ |
||
483 | #define OB_WRP3_PAGES1280TO1295 ((uint32_t)0x00010000) /* Write protection of Sector80 */ |
||
484 | #define OB_WRP3_PAGES1296TO1311 ((uint32_t)0x00020000) /* Write protection of Sector81 */ |
||
485 | #define OB_WRP3_PAGES1312TO1327 ((uint32_t)0x00040000) /* Write protection of Sector82 */ |
||
486 | #define OB_WRP3_PAGES1328TO1343 ((uint32_t)0x00080000) /* Write protection of Sector83 */ |
||
487 | #define OB_WRP3_PAGES1344TO1359 ((uint32_t)0x00100000) /* Write protection of Sector84 */ |
||
488 | #define OB_WRP3_PAGES1360TO1375 ((uint32_t)0x00200000) /* Write protection of Sector85 */ |
||
489 | #define OB_WRP3_PAGES1376TO1391 ((uint32_t)0x00400000) /* Write protection of Sector86 */ |
||
490 | #define OB_WRP3_PAGES1392TO1407 ((uint32_t)0x00800000) /* Write protection of Sector87 */ |
||
491 | #define OB_WRP3_PAGES1408TO1423 ((uint32_t)0x01000000) /* Write protection of Sector88 */ |
||
492 | #define OB_WRP3_PAGES1424TO1439 ((uint32_t)0x02000000) /* Write protection of Sector89 */ |
||
493 | #define OB_WRP3_PAGES1440TO1455 ((uint32_t)0x04000000) /* Write protection of Sector90 */ |
||
494 | #define OB_WRP3_PAGES1456TO1471 ((uint32_t)0x08000000) /* Write protection of Sector91 */ |
||
495 | #define OB_WRP3_PAGES1472TO1487 ((uint32_t)0x10000000) /* Write protection of Sector92 */ |
||
496 | #define OB_WRP3_PAGES1488TO1503 ((uint32_t)0x20000000) /* Write protection of Sector93 */ |
||
497 | #define OB_WRP3_PAGES1504TO1519 ((uint32_t)0x40000000) /* Write protection of Sector94 */ |
||
498 | #define OB_WRP3_PAGES1520TO1535 ((uint32_t)0x80000000U) /* Write protection of Sector95 */ |
||
499 | |||
500 | #define OB_WRP3_ALLPAGES ((uint32_t)FLASH_WRPR3_WRP) /*!< Write protection of all Sectors */ |
||
501 | |||
502 | /** |
||
503 | * @} |
||
504 | */ |
||
505 | |||
506 | #endif /* STM32L151xD || STM32L152xD || STM32L162xD || STM32L151xE || STM32L152xE || STM32L162xE*/ |
||
507 | |||
508 | #if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) || defined(STM32L151xDX) \ |
||
509 | || defined(STM32L152xDX) || defined(STM32L162xDX) |
||
510 | |||
511 | /** @defgroup FLASHEx_Option_Bytes_Write_Protection4 FLASHEx Option Bytes Write Protection4 |
||
512 | * @{ |
||
513 | */ |
||
514 | |||
515 | /* Pages for Cat5 devices*/ |
||
516 | #define OB_WRP4_PAGES1536TO1551 ((uint32_t)0x00000001)/* Write protection of Sector96*/ |
||
517 | #define OB_WRP4_PAGES1552TO1567 ((uint32_t)0x00000002)/* Write protection of Sector97*/ |
||
518 | #define OB_WRP4_PAGES1568TO1583 ((uint32_t)0x00000004)/* Write protection of Sector98*/ |
||
519 | #define OB_WRP4_PAGES1584TO1599 ((uint32_t)0x00000008)/* Write protection of Sector99*/ |
||
520 | #define OB_WRP4_PAGES1600TO1615 ((uint32_t)0x00000010) /* Write protection of Sector100*/ |
||
521 | #define OB_WRP4_PAGES1616TO1631 ((uint32_t)0x00000020) /* Write protection of Sector101*/ |
||
522 | #define OB_WRP4_PAGES1632TO1647 ((uint32_t)0x00000040) /* Write protection of Sector102*/ |
||
523 | #define OB_WRP4_PAGES1648TO1663 ((uint32_t)0x00000080) /* Write protection of Sector103*/ |
||
524 | #define OB_WRP4_PAGES1664TO1679 ((uint32_t)0x00000100) /* Write protection of Sector104*/ |
||
525 | #define OB_WRP4_PAGES1680TO1695 ((uint32_t)0x00000200) /* Write protection of Sector105*/ |
||
526 | #define OB_WRP4_PAGES1696TO1711 ((uint32_t)0x00000400) /* Write protection of Sector106*/ |
||
527 | #define OB_WRP4_PAGES1712TO1727 ((uint32_t)0x00000800) /* Write protection of Sector107*/ |
||
528 | #define OB_WRP4_PAGES1728TO1743 ((uint32_t)0x00001000) /* Write protection of Sector108*/ |
||
529 | #define OB_WRP4_PAGES1744TO1759 ((uint32_t)0x00002000) /* Write protection of Sector109*/ |
||
530 | #define OB_WRP4_PAGES1760TO1775 ((uint32_t)0x00004000) /* Write protection of Sector110*/ |
||
531 | #define OB_WRP4_PAGES1776TO1791 ((uint32_t)0x00008000) /* Write protection of Sector111*/ |
||
532 | |||
533 | #if defined(STM32L151xE) || defined(STM32L152xE) || defined(STM32L162xE) |
||
534 | |||
535 | #define OB_WRP4_PAGES1792TO1807 ((uint32_t)0x00010000) /* Write protection of Sector112*/ |
||
536 | #define OB_WRP4_PAGES1808TO1823 ((uint32_t)0x00020000) /* Write protection of Sector113*/ |
||
537 | #define OB_WRP4_PAGES1824TO1839 ((uint32_t)0x00040000) /* Write protection of Sector114*/ |
||
538 | #define OB_WRP4_PAGES1840TO1855 ((uint32_t)0x00080000) /* Write protection of Sector115*/ |
||
539 | #define OB_WRP4_PAGES1856TO1871 ((uint32_t)0x00100000) /* Write protection of Sector116*/ |
||
540 | #define OB_WRP4_PAGES1872TO1887 ((uint32_t)0x00200000) /* Write protection of Sector117*/ |
||
541 | #define OB_WRP4_PAGES1888TO1903 ((uint32_t)0x00400000) /* Write protection of Sector118*/ |
||
542 | #define OB_WRP4_PAGES1904TO1919 ((uint32_t)0x00800000) /* Write protection of Sector119*/ |
||
543 | #define OB_WRP4_PAGES1920TO1935 ((uint32_t)0x01000000) /* Write protection of Sector120*/ |
||
544 | #define OB_WRP4_PAGES1936TO1951 ((uint32_t)0x02000000) /* Write protection of Sector121*/ |
||
545 | #define OB_WRP4_PAGES1952TO1967 ((uint32_t)0x04000000) /* Write protection of Sector122*/ |
||
546 | #define OB_WRP4_PAGES1968TO1983 ((uint32_t)0x08000000) /* Write protection of Sector123*/ |
||
547 | #define OB_WRP4_PAGES1984TO1999 ((uint32_t)0x10000000) /* Write protection of Sector124*/ |
||
548 | #define OB_WRP4_PAGES2000TO2015 ((uint32_t)0x20000000) /* Write protection of Sector125*/ |
||
549 | #define OB_WRP4_PAGES2016TO2031 ((uint32_t)0x40000000) /* Write protection of Sector126*/ |
||
550 | #define OB_WRP4_PAGES2032TO2047 ((uint32_t)0x80000000U) /* Write protection of Sector127*/ |
||
551 | |||
552 | #endif /* STM32L151xE || STM32L152xE || STM32L162xE */ |
||
553 | |||
554 | #define OB_WRP4_ALLPAGES ((uint32_t)FLASH_WRPR4_WRP) /*!< Write protection of all Sectors */ |
||
555 | |||
556 | /** |
||
557 | * @} |
||
558 | */ |
||
559 | |||
560 | #endif /* STM32L151xE || STM32L152xE || STM32L162xE || STM32L151xDX || ... */ |
||
561 | |||
562 | /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASHEx Option Bytes Read Protection |
||
563 | * @{ |
||
564 | */ |
||
565 | #define OB_RDP_LEVEL_0 ((uint8_t)0xAAU) |
||
566 | #define OB_RDP_LEVEL_1 ((uint8_t)0xBBU) |
||
567 | #define OB_RDP_LEVEL_2 ((uint8_t)0xCCU) /* Warning: When enabling read protection level 2 |
||
568 | it is no more possible to go back to level 1 or 0 */ |
||
569 | |||
570 | /** |
||
571 | * @} |
||
572 | */ |
||
573 | |||
574 | /** @defgroup FLASHEx_Option_Bytes_BOR_Level FLASHEx Option Bytes BOR Level |
||
575 | * @{ |
||
576 | */ |
||
577 | |||
578 | #define OB_BOR_OFF ((uint8_t)0x00U) /*!< BOR is disabled at power down, the reset is asserted when the VDD |
||
579 | power supply reaches the PDR(Power Down Reset) threshold (1.5V) */ |
||
580 | #define OB_BOR_LEVEL1 ((uint8_t)0x08U) /*!< BOR Reset threshold levels for 1.7V - 1.8V VDD power supply */ |
||
581 | #define OB_BOR_LEVEL2 ((uint8_t)0x09U) /*!< BOR Reset threshold levels for 1.9V - 2.0V VDD power supply */ |
||
582 | #define OB_BOR_LEVEL3 ((uint8_t)0x0AU) /*!< BOR Reset threshold levels for 2.3V - 2.4V VDD power supply */ |
||
583 | #define OB_BOR_LEVEL4 ((uint8_t)0x0BU) /*!< BOR Reset threshold levels for 2.55V - 2.65V VDD power supply */ |
||
584 | #define OB_BOR_LEVEL5 ((uint8_t)0x0CU) /*!< BOR Reset threshold levels for 2.8V - 2.9V VDD power supply */ |
||
585 | |||
586 | /** |
||
587 | * @} |
||
588 | */ |
||
589 | |||
590 | /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASHEx Option Bytes IWatchdog |
||
591 | * @{ |
||
592 | */ |
||
593 | |||
594 | #define OB_IWDG_SW ((uint8_t)0x10U) /*!< Software WDG selected */ |
||
595 | #define OB_IWDG_HW ((uint8_t)0x00U) /*!< Hardware WDG selected */ |
||
596 | |||
597 | /** |
||
598 | * @} |
||
599 | */ |
||
600 | |||
601 | /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASHEx Option Bytes nRST_STOP |
||
602 | * @{ |
||
603 | */ |
||
604 | |||
605 | #define OB_STOP_NORST ((uint8_t)0x20U) /*!< No reset generated when entering in STOP */ |
||
606 | #define OB_STOP_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STOP */ |
||
607 | /** |
||
608 | * @} |
||
609 | */ |
||
610 | |||
611 | /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASHEx Option Bytes nRST_STDBY |
||
612 | * @{ |
||
613 | */ |
||
614 | |||
615 | #define OB_STDBY_NORST ((uint8_t)0x40U) /*!< No reset generated when entering in STANDBY */ |
||
616 | #define OB_STDBY_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STANDBY */ |
||
617 | |||
618 | /** |
||
619 | * @} |
||
620 | */ |
||
621 | |||
622 | #if defined(FLASH_OBR_SPRMOD) |
||
623 | |||
624 | /** @defgroup FLASHEx_OptionAdv_Type FLASHEx Option Advanced Type |
||
625 | * @{ |
||
626 | */ |
||
627 | |||
628 | #define OPTIONBYTE_PCROP ((uint32_t)0x01U) /*!<PCROP option byte configuration*/ |
||
629 | |||
630 | /** |
||
631 | * @} |
||
632 | */ |
||
633 | |||
634 | #endif /* FLASH_OBR_SPRMOD */ |
||
635 | |||
636 | #if defined(FLASH_OBR_nRST_BFB2) |
||
637 | |||
638 | /** @defgroup FLASHEx_OptionAdv_Type FLASHEx Option Advanced Type |
||
639 | * @{ |
||
640 | */ |
||
641 | |||
642 | #define OPTIONBYTE_BOOTCONFIG ((uint32_t)0x02U) /*!<BOOTConfig option byte configuration*/ |
||
643 | |||
644 | /** |
||
645 | * @} |
||
646 | */ |
||
647 | |||
648 | #endif /* FLASH_OBR_nRST_BFB2 */ |
||
649 | |||
650 | #if defined(FLASH_OBR_SPRMOD) |
||
651 | |||
652 | /** @defgroup FLASHEx_PCROP_State FLASHEx PCROP State |
||
653 | * @{ |
||
654 | */ |
||
655 | #define OB_PCROP_STATE_DISABLE ((uint32_t)0x00U) /*!<Disable PCROP for selected sectors */ |
||
656 | #define OB_PCROP_STATE_ENABLE ((uint32_t)0x01U) /*!<Enable PCROP for selected sectors */ |
||
657 | |||
658 | /** |
||
659 | * @} |
||
660 | */ |
||
661 | |||
662 | /** @defgroup FLASHEx_Selection_Protection_Mode FLASHEx Selection Protection Mode |
||
663 | * @{ |
||
664 | */ |
||
665 | #define OB_PCROP_DESELECTED ((uint16_t)0x0000U) /*!< Disabled PCROP, nWPRi bits used for Write Protection on sector i */ |
||
666 | #define OB_PCROP_SELECTED ((uint16_t)FLASH_OBR_SPRMOD) /*!< Enable PCROP, nWPRi bits used for PCRoP Protection on sector i */ |
||
667 | |||
668 | /** |
||
669 | * @} |
||
670 | */ |
||
671 | #endif /* FLASH_OBR_SPRMOD */ |
||
672 | |||
673 | #if defined(STM32L151xBA) || defined(STM32L152xBA) || defined(STM32L151xC) || defined(STM32L152xC) \ |
||
674 | || defined(STM32L162xC) |
||
675 | /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection1 FLASHEx Option Bytes PC ReadWrite Protection 1 |
||
676 | * @{ |
||
677 | */ |
||
678 | |||
679 | /* Common pages for Cat1, Cat2, Cat3, Cat4 & Cat5 devices */ |
||
680 | #define OB_PCROP1_PAGES0TO15 ((uint32_t)0x00000001U) /* PC Read/Write protection of Sector0 */ |
||
681 | #define OB_PCROP1_PAGES16TO31 ((uint32_t)0x00000002U) /* PC Read/Write protection of Sector1 */ |
||
682 | #define OB_PCROP1_PAGES32TO47 ((uint32_t)0x00000004U) /* PC Read/Write protection of Sector2 */ |
||
683 | #define OB_PCROP1_PAGES48TO63 ((uint32_t)0x00000008U) /* PC Read/Write protection of Sector3 */ |
||
684 | #define OB_PCROP1_PAGES64TO79 ((uint32_t)0x00000010U) /* PC Read/Write protection of Sector4 */ |
||
685 | #define OB_PCROP1_PAGES80TO95 ((uint32_t)0x00000020U) /* PC Read/Write protection of Sector5 */ |
||
686 | #define OB_PCROP1_PAGES96TO111 ((uint32_t)0x00000040U) /* PC Read/Write protection of Sector6 */ |
||
687 | #define OB_PCROP1_PAGES112TO127 ((uint32_t)0x00000080U) /* PC Read/Write protection of Sector7 */ |
||
688 | #define OB_PCROP1_PAGES128TO143 ((uint32_t)0x00000100U) /* PC Read/Write protection of Sector8 */ |
||
689 | #define OB_PCROP1_PAGES144TO159 ((uint32_t)0x00000200U) /* PC Read/Write protection of Sector9 */ |
||
690 | #define OB_PCROP1_PAGES160TO175 ((uint32_t)0x00000400U) /* PC Read/Write protection of Sector10 */ |
||
691 | #define OB_PCROP1_PAGES176TO191 ((uint32_t)0x00000800U) /* PC Read/Write protection of Sector11 */ |
||
692 | #define OB_PCROP1_PAGES192TO207 ((uint32_t)0x00001000U) /* PC Read/Write protection of Sector12 */ |
||
693 | #define OB_PCROP1_PAGES208TO223 ((uint32_t)0x00002000U) /* PC Read/Write protection of Sector13 */ |
||
694 | #define OB_PCROP1_PAGES224TO239 ((uint32_t)0x00004000U) /* PC Read/Write protection of Sector14 */ |
||
695 | #define OB_PCROP1_PAGES240TO255 ((uint32_t)0x00008000U) /* PC Read/Write protection of Sector15 */ |
||
696 | #define OB_PCROP1_PAGES256TO271 ((uint32_t)0x00010000U) /* PC Read/Write protection of Sector16 */ |
||
697 | #define OB_PCROP1_PAGES272TO287 ((uint32_t)0x00020000U) /* PC Read/Write protection of Sector17 */ |
||
698 | #define OB_PCROP1_PAGES288TO303 ((uint32_t)0x00040000U) /* PC Read/Write protection of Sector18 */ |
||
699 | #define OB_PCROP1_PAGES304TO319 ((uint32_t)0x00080000U) /* PC Read/Write protection of Sector19 */ |
||
700 | #define OB_PCROP1_PAGES320TO335 ((uint32_t)0x00100000U) /* PC Read/Write protection of Sector20 */ |
||
701 | #define OB_PCROP1_PAGES336TO351 ((uint32_t)0x00200000U) /* PC Read/Write protection of Sector21 */ |
||
702 | #define OB_PCROP1_PAGES352TO367 ((uint32_t)0x00400000U) /* PC Read/Write protection of Sector22 */ |
||
703 | #define OB_PCROP1_PAGES368TO383 ((uint32_t)0x00800000U) /* PC Read/Write protection of Sector23 */ |
||
704 | #define OB_PCROP1_PAGES384TO399 ((uint32_t)0x01000000U) /* PC Read/Write protection of Sector24 */ |
||
705 | #define OB_PCROP1_PAGES400TO415 ((uint32_t)0x02000000U) /* PC Read/Write protection of Sector25 */ |
||
706 | #define OB_PCROP1_PAGES416TO431 ((uint32_t)0x04000000U) /* PC Read/Write protection of Sector26 */ |
||
707 | #define OB_PCROP1_PAGES432TO447 ((uint32_t)0x08000000U) /* PC Read/Write protection of Sector27 */ |
||
708 | #define OB_PCROP1_PAGES448TO463 ((uint32_t)0x10000000U) /* PC Read/Write protection of Sector28 */ |
||
709 | #define OB_PCROP1_PAGES464TO479 ((uint32_t)0x20000000U) /* PC Read/Write protection of Sector29 */ |
||
710 | #define OB_PCROP1_PAGES480TO495 ((uint32_t)0x40000000U) /* PC Read/Write protection of Sector30 */ |
||
711 | #define OB_PCROP1_PAGES496TO511 ((uint32_t)0x80000000U) /* PC Read/Write protection of Sector31 */ |
||
712 | |||
713 | #define OB_PCROP1_ALLPAGES ((uint32_t)0xFFFFFFFFU) /*!< PC Read/Write protection of all Sectors */ |
||
714 | |||
715 | /** |
||
716 | * @} |
||
717 | */ |
||
718 | #endif /* STM32L151xBA || STM32L152xBA || STM32L151xC || STM32L152xC || STM32L162xC */ |
||
719 | |||
720 | #if defined(STM32L151xC) || defined(STM32L152xC) || defined(STM32L162xC) |
||
721 | |||
722 | /** @defgroup FLASHEx_Option_Bytes_PC_ReadWrite_Protection2 FLASHEx Option Bytes PC ReadWrite Protection 2 |
||
723 | * @{ |
||
724 | */ |
||
725 | |||
726 | /* Pages for Cat3, Cat4 & Cat5 devices*/ |
||
727 | #define OB_PCROP2_PAGES512TO527 ((uint32_t)0x00000001U) /* PC Read/Write protection of Sector32 */ |
||
728 | #define OB_PCROP2_PAGES528TO543 ((uint32_t)0x00000002U) /* PC Read/Write protection of Sector33 */ |
||
729 | #define OB_PCROP2_PAGES544TO559 ((uint32_t)0x00000004U) /* PC Read/Write protection of Sector34 */ |
||
730 | #define OB_PCROP2_PAGES560TO575 ((uint32_t)0x00000008U) /* PC Read/Write protection of Sector35 */ |
||
731 | #define OB_PCROP2_PAGES576TO591 ((uint32_t)0x00000010U) /* PC Read/Write protection of Sector36 */ |
||
732 | #define OB_PCROP2_PAGES592TO607 ((uint32_t)0x00000020U) /* PC Read/Write protection of Sector37 */ |
||
733 | #define OB_PCROP2_PAGES608TO623 ((uint32_t)0x00000040U) /* PC Read/Write protection of Sector38 */ |
||
734 | #define OB_PCROP2_PAGES624TO639 ((uint32_t)0x00000080U) /* PC Read/Write protection of Sector39 */ |
||
735 | #define OB_PCROP2_PAGES640TO655 ((uint32_t)0x00000100U) /* PC Read/Write protection of Sector40 */ |
||
736 | #define OB_PCROP2_PAGES656TO671 ((uint32_t)0x00000200U) /* PC Read/Write protection of Sector41 */ |
||
737 | #define OB_PCROP2_PAGES672TO687 ((uint32_t)0x00000400U) /* PC Read/Write protection of Sector42 */ |
||
738 | #define OB_PCROP2_PAGES688TO703 ((uint32_t)0x00000800U) /* PC Read/Write protection of Sector43 */ |
||
739 | #define OB_PCROP2_PAGES704TO719 ((uint32_t)0x00001000U) /* PC Read/Write protection of Sector44 */ |
||
740 | #define OB_PCROP2_PAGES720TO735 ((uint32_t)0x00002000U) /* PC Read/Write protection of Sector45 */ |
||
741 | #define OB_PCROP2_PAGES736TO751 ((uint32_t)0x00004000U) /* PC Read/Write protection of Sector46 */ |
||
742 | #define OB_PCROP2_PAGES752TO767 ((uint32_t)0x00008000U) /* PC Read/Write protection of Sector47 */ |
||
743 | #define OB_PCROP2_PAGES768TO783 ((uint32_t)0x00010000U) /* PC Read/Write protection of Sector48 */ |
||
744 | #define OB_PCROP2_PAGES784TO799 ((uint32_t)0x00020000U) /* PC Read/Write protection of Sector49 */ |
||
745 | #define OB_PCROP2_PAGES800TO815 ((uint32_t)0x00040000U) /* PC Read/Write protection of Sector50 */ |
||
746 | #define OB_PCROP2_PAGES816TO831 ((uint32_t)0x00080000U) /* PC Read/Write protection of Sector51 */ |
||
747 | #define OB_PCROP2_PAGES832TO847 ((uint32_t)0x00100000U) /* PC Read/Write protection of Sector52 */ |
||
748 | #define OB_PCROP2_PAGES848TO863 ((uint32_t)0x00200000U) /* PC Read/Write protection of Sector53 */ |
||
749 | #define OB_PCROP2_PAGES864TO879 ((uint32_t)0x00400000U) /* PC Read/Write protection of Sector54 */ |
||
750 | #define OB_PCROP2_PAGES880TO895 ((uint32_t)0x00800000U) /* PC Read/Write protection of Sector55 */ |
||
751 | #define OB_PCROP2_PAGES896TO911 ((uint32_t)0x01000000U) /* PC Read/Write protection of Sector56 */ |
||
752 | #define OB_PCROP2_PAGES912TO927 ((uint32_t)0x02000000U) /* PC Read/Write protection of Sector57 */ |
||
753 | #define OB_PCROP2_PAGES928TO943 ((uint32_t)0x04000000U) /* PC Read/Write protection of Sector58 */ |
||
754 | #define OB_PCROP2_PAGES944TO959 ((uint32_t)0x08000000U) /* PC Read/Write protection of Sector59 */ |
||
755 | #define OB_PCROP2_PAGES960TO975 ((uint32_t)0x10000000U) /* PC Read/Write protection of Sector60 */ |
||
756 | #define OB_PCROP2_PAGES976TO991 ((uint32_t)0x20000000U) /* PC Read/Write protection of Sector61 */ |
||
757 | #define OB_PCROP2_PAGES992TO1007 ((uint32_t)0x40000000U) /* PC Read/Write protection of Sector62 */ |
||
758 | #define OB_PCROP2_PAGES1008TO1023 ((uint32_t)0x80000000U) /* PC Read/Write protection of Sector63 */ |
||
759 | |||
760 | #define OB_PCROP2_ALLPAGES ((uint32_t)0xFFFFFFFFU) /*!< PC Read/Write protection of all Sectors */ |
||
761 | |||
762 | /** |
||
763 | * @} |
||
764 | */ |
||
765 | #endif /* STM32L151xC || STM32L152xC || STM32L162xC */ |
||
766 | |||
767 | /** @defgroup FLASHEx_Type_Erase_Data FLASHEx Type Erase Data |
||
768 | * @{ |
||
769 | */ |
||
770 | #define FLASH_TYPEERASEDATA_BYTE ((uint32_t)0x00U) /*!<Erase byte (8-bit) at a specified address.*/ |
||
771 | #define FLASH_TYPEERASEDATA_HALFWORD ((uint32_t)0x01U) /*!<Erase a half-word (16-bit) at a specified address.*/ |
||
772 | #define FLASH_TYPEERASEDATA_WORD ((uint32_t)0x02U) /*!<Erase a word (32-bit) at a specified address.*/ |
||
773 | |||
774 | /** |
||
775 | * @} |
||
776 | */ |
||
777 | |||
778 | /** @defgroup FLASHEx_Type_Program_Data FLASHEx Type Program Data |
||
779 | * @{ |
||
780 | */ |
||
781 | #define FLASH_TYPEPROGRAMDATA_BYTE ((uint32_t)0x00U) /*!<Program byte (8-bit) at a specified address.*/ |
||
782 | #define FLASH_TYPEPROGRAMDATA_HALFWORD ((uint32_t)0x01U) /*!<Program a half-word (16-bit) at a specified address.*/ |
||
783 | #define FLASH_TYPEPROGRAMDATA_WORD ((uint32_t)0x02U) /*!<Program a word (32-bit) at a specified address.*/ |
||
784 | #define FLASH_TYPEPROGRAMDATA_FASTBYTE ((uint32_t)0x04U) /*!<Fast Program byte (8-bit) at a specified address.*/ |
||
785 | #define FLASH_TYPEPROGRAMDATA_FASTHALFWORD ((uint32_t)0x08U) /*!<Fast Program a half-word (16-bit) at a specified address.*/ |
||
786 | #define FLASH_TYPEPROGRAMDATA_FASTWORD ((uint32_t)0x10U) /*!<Fast Program a word (32-bit) at a specified address.*/ |
||
787 | |||
788 | /** |
||
789 | * @} |
||
790 | */ |
||
791 | |||
792 | #if defined(FLASH_OBR_nRST_BFB2) |
||
793 | |||
794 | /** @defgroup FLASHEx_Option_Bytes_BOOT FLASHEx Option Bytes BOOT |
||
795 | * @{ |
||
796 | */ |
||
797 | |||
798 | #define OB_BOOT_BANK2 ((uint8_t)0x00U) /*!< At startup, if boot pins are set in boot from user Flash position |
||
799 | and this parameter is selected the device will boot from Bank 2 |
||
800 | or Bank 1, depending on the activation of the bank */ |
||
801 | #define OB_BOOT_BANK1 ((uint8_t)(FLASH_OBR_nRST_BFB2 >> 16)) /*!< At startup, if boot pins are set in boot from user Flash position |
||
802 | and this parameter is selected the device will boot from Bank1(Default) */ |
||
803 | |||
804 | /** |
||
805 | * @} |
||
806 | */ |
||
807 | #endif /* FLASH_OBR_nRST_BFB2 */ |
||
808 | |||
809 | /** |
||
810 | * @} |
||
811 | */ |
||
812 | |||
813 | /* Exported macro ------------------------------------------------------------*/ |
||
814 | |||
815 | /** @defgroup FLASHEx_Exported_Macros FLASHEx Exported Macros |
||
816 | * @{ |
||
817 | */ |
||
818 | |||
819 | /** |
||
820 | * @brief Set the FLASH Latency. |
||
821 | * @param __LATENCY__ FLASH Latency |
||
822 | * This parameter can be one of the following values: |
||
823 | * @arg @ref FLASH_LATENCY_0 FLASH Zero Latency cycle |
||
824 | * @arg @ref FLASH_LATENCY_1 FLASH One Latency cycle |
||
825 | * @retval none |
||
826 | */ |
||
827 | #define __HAL_FLASH_SET_LATENCY(__LATENCY__) do { \ |
||
828 | if ((__LATENCY__) == FLASH_LATENCY_1) {__HAL_FLASH_ACC64_ENABLE();} \ |
||
829 | MODIFY_REG((FLASH->ACR), FLASH_ACR_LATENCY, (__LATENCY__)); \ |
||
830 | } while(0) |
||
831 | |||
832 | /** |
||
833 | * @brief Get the FLASH Latency. |
||
834 | * @retval FLASH Latency |
||
835 | * This parameter can be one of the following values: |
||
836 | * @arg @ref FLASH_LATENCY_0 FLASH Zero Latency cycle |
||
837 | * @arg @ref FLASH_LATENCY_1 FLASH One Latency cycle |
||
838 | */ |
||
839 | #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)) |
||
840 | |||
841 | /** |
||
842 | * @brief Enable the FLASH 64-bit access. |
||
843 | * @note Read access 64 bit is used. |
||
844 | * @note This bit cannot be written at the same time as the LATENCY and |
||
845 | * PRFTEN bits. |
||
846 | * @retval none |
||
847 | */ |
||
848 | #define __HAL_FLASH_ACC64_ENABLE() (SET_BIT((FLASH->ACR), FLASH_ACR_ACC64)) |
||
849 | |||
850 | /** |
||
851 | * @brief Disable the FLASH 64-bit access. |
||
852 | * @note Read access 32 bit is used |
||
853 | * @note To reset this bit, the LATENCY should be zero wait state and the |
||
854 | * prefetch off. |
||
855 | * @retval none |
||
856 | */ |
||
857 | #define __HAL_FLASH_ACC64_DISABLE() (CLEAR_BIT((FLASH->ACR), FLASH_ACR_ACC64)) |
||
858 | |||
859 | /** |
||
860 | * @brief Enable the FLASH prefetch buffer. |
||
861 | * @retval none |
||
862 | */ |
||
863 | #define __HAL_FLASH_PREFETCH_BUFFER_ENABLE() do { __HAL_FLASH_ACC64_ENABLE(); \ |
||
864 | SET_BIT((FLASH->ACR), FLASH_ACR_PRFTEN); \ |
||
865 | } while(0) |
||
866 | |||
867 | /** |
||
868 | * @brief Disable the FLASH prefetch buffer. |
||
869 | * @retval none |
||
870 | */ |
||
871 | #define __HAL_FLASH_PREFETCH_BUFFER_DISABLE() CLEAR_BIT((FLASH->ACR), FLASH_ACR_PRFTEN) |
||
872 | |||
873 | /** |
||
874 | * @brief Enable the FLASH power down during Sleep mode |
||
875 | * @retval none |
||
876 | */ |
||
877 | #define __HAL_FLASH_SLEEP_POWERDOWN_ENABLE() SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) |
||
878 | |||
879 | /** |
||
880 | * @brief Disable the FLASH power down during Sleep mode |
||
881 | * @retval none |
||
882 | */ |
||
883 | #define __HAL_FLASH_SLEEP_POWERDOWN_DISABLE() CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD) |
||
884 | |||
885 | /** |
||
886 | * @brief Enable the Flash Run power down mode. |
||
887 | * @note Writing this bit to 0 this bit, automatically the keys are |
||
888 | * loss and a new unlock sequence is necessary to re-write it to 1. |
||
889 | */ |
||
890 | #define __HAL_FLASH_POWER_DOWN_ENABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \ |
||
891 | FLASH->PDKEYR = FLASH_PDKEY2; \ |
||
892 | SET_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \ |
||
893 | } while (0) |
||
894 | |||
895 | /** |
||
896 | * @brief Disable the Flash Run power down mode. |
||
897 | * @note Writing this bit to 0 this bit, automatically the keys are |
||
898 | * loss and a new unlock sequence is necessary to re-write it to 1. |
||
899 | */ |
||
900 | #define __HAL_FLASH_POWER_DOWN_DISABLE() do { FLASH->PDKEYR = FLASH_PDKEY1; \ |
||
901 | FLASH->PDKEYR = FLASH_PDKEY2; \ |
||
902 | CLEAR_BIT((FLASH->ACR), FLASH_ACR_RUN_PD); \ |
||
903 | } while (0) |
||
904 | |||
905 | /** |
||
906 | * @} |
||
907 | */ |
||
908 | |||
909 | /* Exported functions --------------------------------------------------------*/ |
||
910 | |||
911 | /** @addtogroup FLASHEx_Exported_Functions |
||
912 | * @{ |
||
913 | */ |
||
914 | |||
915 | /** @addtogroup FLASHEx_Exported_Functions_Group1 |
||
916 | * @{ |
||
917 | */ |
||
918 | |||
919 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); |
||
920 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); |
||
921 | |||
922 | /** |
||
923 | * @} |
||
924 | */ |
||
925 | |||
926 | /** @addtogroup FLASHEx_Exported_Functions_Group2 |
||
927 | * @{ |
||
928 | */ |
||
929 | |||
930 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); |
||
931 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); |
||
932 | |||
933 | #if defined(FLASH_OBR_SPRMOD) || defined(FLASH_OBR_nRST_BFB2) |
||
934 | |||
935 | HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); |
||
936 | void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit); |
||
937 | |||
938 | #endif /* FLASH_OBR_SPRMOD || FLASH_OBR_nRST_BFB2 */ |
||
939 | |||
940 | #if defined(FLASH_OBR_SPRMOD) |
||
941 | |||
942 | HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void); |
||
943 | HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void); |
||
944 | |||
945 | #endif /* FLASH_OBR_SPRMOD */ |
||
946 | |||
947 | /** |
||
948 | * @} |
||
949 | */ |
||
950 | |||
951 | /** @addtogroup FLASHEx_Exported_Functions_Group3 |
||
952 | * @{ |
||
953 | */ |
||
954 | |||
955 | HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Unlock(void); |
||
956 | HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Lock(void); |
||
957 | |||
958 | HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Erase(uint32_t TypeErase, uint32_t Address); |
||
959 | HAL_StatusTypeDef HAL_FLASHEx_DATAEEPROM_Program(uint32_t TypeProgram, uint32_t Address, uint32_t Data); |
||
960 | void HAL_FLASHEx_DATAEEPROM_EnableFixedTimeProgram(void); |
||
961 | void HAL_FLASHEx_DATAEEPROM_DisableFixedTimeProgram(void); |
||
962 | |||
963 | /** |
||
964 | * @} |
||
965 | */ |
||
966 | |||
967 | /** |
||
968 | * @} |
||
969 | */ |
||
970 | |||
971 | /** |
||
972 | * @} |
||
973 | */ |
||
974 | |||
975 | /** |
||
976 | * @} |
||
977 | */ |
||
978 | |||
979 | #ifdef __cplusplus |
||
980 | } |
||
981 | #endif |
||
982 | |||
983 | #endif /* __STM32L1xx_HAL_FLASH_EX_H */ |
||
984 | |||
985 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |