Rev 2 | Details | Compare with Previous | Last modification | View Log | RSS feed
| Rev | Author | Line No. | Line |
|---|---|---|---|
| 2 | mjames | 1 | /* ---------------------------------------------------------------------- |
| 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. |
||
| 3 | * |
||
| 4 | * $Date: 19. March 2015 |
||
| 5 | * $Revision: V.1.4.5 |
||
| 6 | * |
||
| 7 | * Project: CMSIS DSP Library |
||
| 8 | * Title: arm_cmplx_mag_q15.c |
||
| 9 | * |
||
| 10 | * Description: Q15 complex magnitude. |
||
| 11 | * |
||
| 12 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
||
| 13 | * |
||
| 14 | * Redistribution and use in source and binary forms, with or without |
||
| 15 | * modification, are permitted provided that the following conditions |
||
| 16 | * are met: |
||
| 17 | * - Redistributions of source code must retain the above copyright |
||
| 18 | * notice, this list of conditions and the following disclaimer. |
||
| 19 | * - Redistributions in binary form must reproduce the above copyright |
||
| 20 | * notice, this list of conditions and the following disclaimer in |
||
| 21 | * the documentation and/or other materials provided with the |
||
| 22 | * distribution. |
||
| 23 | * - Neither the name of ARM LIMITED nor the names of its contributors |
||
| 24 | * may be used to endorse or promote products derived from this |
||
| 25 | * software without specific prior written permission. |
||
| 26 | * |
||
| 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
||
| 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
||
| 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
||
| 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
||
| 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
||
| 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
||
| 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
||
| 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
||
| 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||
| 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
||
| 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
||
| 38 | * POSSIBILITY OF SUCH DAMAGE. |
||
| 39 | * ---------------------------------------------------------------------------- */ |
||
| 40 | |||
| 41 | #include "arm_math.h" |
||
| 42 | |||
| 43 | /** |
||
| 44 | * @ingroup groupCmplxMath |
||
| 45 | */ |
||
| 46 | |||
| 47 | /** |
||
| 48 | * @addtogroup cmplx_mag |
||
| 49 | * @{ |
||
| 50 | */ |
||
| 51 | |||
| 52 | |||
| 53 | /** |
||
| 54 | * @brief Q15 complex magnitude |
||
| 55 | * @param *pSrc points to the complex input vector |
||
| 56 | * @param *pDst points to the real output vector |
||
| 57 | * @param numSamples number of complex samples in the input vector |
||
| 58 | * @return none. |
||
| 59 | * |
||
| 60 | * <b>Scaling and Overflow Behavior:</b> |
||
| 61 | * \par |
||
| 62 | * The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format. |
||
| 63 | */ |
||
| 64 | |||
| 65 | void arm_cmplx_mag_q15( |
||
| 66 | q15_t * pSrc, |
||
| 67 | q15_t * pDst, |
||
| 68 | uint32_t numSamples) |
||
| 69 | { |
||
| 70 | q31_t acc0, acc1; /* Accumulators */ |
||
| 71 | |||
| 72 | #ifndef ARM_MATH_CM0_FAMILY |
||
| 73 | |||
| 74 | /* Run the below code for Cortex-M4 and Cortex-M3 */ |
||
| 75 | uint32_t blkCnt; /* loop counter */ |
||
| 76 | q31_t in1, in2, in3, in4; |
||
| 77 | q31_t acc2, acc3; |
||
| 78 | |||
| 79 | |||
| 80 | /*loop Unrolling */ |
||
| 81 | blkCnt = numSamples >> 2u; |
||
| 82 | |||
| 83 | /* First part of the processing with loop unrolling. Compute 4 outputs at a time. |
||
| 84 | ** a second loop below computes the remaining 1 to 3 samples. */ |
||
| 85 | while(blkCnt > 0u) |
||
| 86 | { |
||
| 87 | |||
| 88 | /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ |
||
| 89 | in1 = *__SIMD32(pSrc)++; |
||
| 90 | in2 = *__SIMD32(pSrc)++; |
||
| 91 | in3 = *__SIMD32(pSrc)++; |
||
| 92 | in4 = *__SIMD32(pSrc)++; |
||
| 93 | |||
| 94 | acc0 = __SMUAD(in1, in1); |
||
| 95 | acc1 = __SMUAD(in2, in2); |
||
| 96 | acc2 = __SMUAD(in3, in3); |
||
| 97 | acc3 = __SMUAD(in4, in4); |
||
| 98 | |||
| 99 | /* store the result in 2.14 format in the destination buffer. */ |
||
| 100 | arm_sqrt_q15((q15_t) ((acc0) >> 17), pDst++); |
||
| 101 | arm_sqrt_q15((q15_t) ((acc1) >> 17), pDst++); |
||
| 102 | arm_sqrt_q15((q15_t) ((acc2) >> 17), pDst++); |
||
| 103 | arm_sqrt_q15((q15_t) ((acc3) >> 17), pDst++); |
||
| 104 | |||
| 105 | /* Decrement the loop counter */ |
||
| 106 | blkCnt--; |
||
| 107 | } |
||
| 108 | |||
| 109 | /* If the numSamples is not a multiple of 4, compute any remaining output samples here. |
||
| 110 | ** No loop unrolling is used. */ |
||
| 111 | blkCnt = numSamples % 0x4u; |
||
| 112 | |||
| 113 | while(blkCnt > 0u) |
||
| 114 | { |
||
| 115 | /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */ |
||
| 116 | in1 = *__SIMD32(pSrc)++; |
||
| 117 | acc0 = __SMUAD(in1, in1); |
||
| 118 | |||
| 119 | /* store the result in 2.14 format in the destination buffer. */ |
||
| 120 | arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++); |
||
| 121 | |||
| 122 | /* Decrement the loop counter */ |
||
| 123 | blkCnt--; |
||
| 124 | } |
||
| 125 | |||
| 126 | #else |
||
| 127 | |||
| 128 | /* Run the below code for Cortex-M0 */ |
||
| 129 | q15_t real, imag; /* Temporary variables to hold input values */ |
||
| 130 | |||
| 131 | while(numSamples > 0u) |
||
| 132 | { |
||
| 133 | /* out = sqrt(real * real + imag * imag) */ |
||
| 134 | real = *pSrc++; |
||
| 135 | imag = *pSrc++; |
||
| 136 | |||
| 137 | acc0 = (real * real); |
||
| 138 | acc1 = (imag * imag); |
||
| 139 | |||
| 140 | /* store the result in 2.14 format in the destination buffer. */ |
||
| 141 | arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++); |
||
| 142 | |||
| 143 | /* Decrement the loop counter */ |
||
| 144 | numSamples--; |
||
| 145 | } |
||
| 146 | |||
| 147 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
||
| 148 | |||
| 149 | } |
||
| 150 | |||
| 151 | /** |
||
| 152 | * @} end of cmplx_mag group |
||
| 153 | */ |